IC Phoenix
 
Home ›  MM61 > MAX5100AEUP-MAX5100BEUP,+2.7V to +5.5V, Low-Power, Quad, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs
MAX5100AEUP-MAX5100BEUP Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
MAX5100AEUPMAXINN/a34avai+2.7V to +5.5V, Low-Power, Quad, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs
MAX5100BEUPMAXN/a5avai+2.7V to +5.5V, Low-Power, Quad, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs


MAX5100AEUP ,+2.7V to +5.5V, Low-Power, Quad, Parallel 8-Bit DAC with Rail-to-Rail Voltage OutputsFeaturesThe MAX5100 parallel-input, voltage-output, quad 8-bit +2.7V to +5.5V Single-Supply Operat ..
MAX5100BEUP ,+2.7V to +5.5V, Low-Power, Quad, Parallel 8-Bit DAC with Rail-to-Rail Voltage OutputsELECTRICAL CHARACTERISTICS(V = V = +2.7V to +5.5V, R = 10kΩ , C = 100pF, T = T to T , unless otherw ..
MAX5101AEUE+T ,+2.7V to +5.5V, Low-Power, Triple, Parallel 8-Bit DAC with Rail-to-Rail Voltage OutputsApplicationsOrdering InformationDigital Gain and Offset AdjustmentPIN- INLPART TEMP RANGEPACKAGE (L ..
MAX5102AEUE ,+2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage OutputsELECTRICAL CHARACTERISTICS(V = V = +2.7V to +5.5V, GND = 0V, R = 10kΩ , C = 100pF, T = T to T , unl ..
MAX5102AEUE ,+2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage OutputsApplications (LSB)MAX5102AEUE -40°C to +85°C 16 TSSOP ±1Digital Gain and Offset AdjustmentMAX5102BE ..
MAX5102AEUE+T ,+2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage OutputsApplications (LSB)MAX5102AEUE -40°C to +85°C 16 TSSOP ±1Digital Gain and Offset AdjustmentMAX5102BE ..
MAX942CSA-T ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail, Single-Supply ComparatorsMAX941/MAX942/ High-Speed, Low-Power, 3V/5V, Rail-to-Rail, MAX944 Single-Supply Comparators
MAX942CUA ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail, Single-Supply Comparatorsfeatures latch enable and device shutdown.The single MAX941 and dual MAX942 are offered in a Orderi ..
MAX942EPA ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail Single-Supply ComparatorsGeneral Description ________
MAX942ESA ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail Single-Supply ComparatorsELECTRICAL CHARACTERISTICS(V+ = 2.7V to 6.0V, T = T to T , unless otherwise noted. Typical values a ..
MAX942ESA ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail Single-Supply ComparatorsELECTRICAL CHARACTERISTICS(V+ = 2.7V to 6.0V, T = T to T , unless otherwise noted. Typical values a ..
MAX942ESA ,High-Speed, Low-Power, 3V/5V, Rail-to-Rail Single-Supply ComparatorsMAX941/MAX942/MAX94419-0229; Rev 3; 6/97High-Speed, Low-Power, 3V/5V, Rail-to-Rail Single-Supply Co ..


MAX5100AEUP-MAX5100BEUP
+2.7V to +5.5V, Low-Power, Quad, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs
General Description
The MAX5100 parallel-input, voltage-output, quad 8-bit
digital-to-analog converter (DAC) operates from a sin-
gle +2.7V to +5.5V supply and comes in a space-sav-
ing 20-pin TSSOP package. Internal precision buffers
swing Rail-to-Rail®, and the reference input range
includes both ground and the positive rail. All four
DACs share a common reference input.
The MAX5100 provides double-buffered logic inputs:
four 8-bit buffer registers followed by four 8-bit DAC
registers. This keeps the DAC outputs from changing
during the write operation. An asynchronous control
pin, LDAC, allows for simultaneous updating of the
DAC registers.
The MAX5100 features a shutdown mode that reduces
current to 1nA, as well as a power-on reset mode that
resets all registers to code 00 hex on power-up.
Applications

Digital Gain and Offset Adjustments
Programmable Attenuators
Portable Instruments
Power-Amp Bias Control
Features
+2.7V to +5.5V Single-Supply OperationUltra-Low Supply Current
0.4mA while Operating
1nA in Shutdown Mode
Ultra-Small 20-Pin TSSOP PackageGround to VDDReference Input RangeOutput Buffer Amplifiers Swing Rail-to-RailDouble-Buffered Registers for Synchronous
Updating
Power-On Reset Sets All Registers to Zero
MAX5100
+2.7V to +5.5V, Low-Power, Quad, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs

19-1557; Rev 0; 10/99
Pin Configuration
Ordering Information

Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
MAX5100
+2.7V to +5.5V, Low-Power, Quad, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VDD= VREF= +2.7V to +5.5V, RL= 10kΩ, CL= 100pF, TA= TMINto TMAX, unless otherwise noted. Typical values are at VDD= VREF
= +3V and TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND..............................................................-0.3V to +6V
D_, A_, WR, SHDN, LDACto GND...........................-0.3V to +6V
REF to GND................................................-0.3V to (VDD+ 0.3V)
OUT_ to GND...........................................................-0.3V to VDD
Maximum Current into Any Pin.........................................±50mA
Continuous Power Dissipation (TA= +70°C)
20-Pin TSSOP (derate 7.0mW/°C above +70°C).......559mW
Operating Temperature Range
MAX5100_EUP..............................................-40°C to +85°C
Maximum Junction Temperature.....................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10sec).............................+300°C
MAX5100
+2.7V to +5.5V, Low-Power, Quad, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
Note 1:
Reduced digital code range (code 00 hex to code F0 hex) due to swing limitations when the output amplifier is loaded.
Note 2:
Gain error is: [100 (VF0,meas- ZCE - VF0,ideal) / VREF]. Where VF0,measis the DAC output voltage with input code F0 hex,
and VF0,idealis the ideal DAC output voltage with input code F0 hex (i.e., VREF·240 / 256).
Note 3:
Output settling time is measured from the 50% point of the falling edge of WRto ±1/2LSB of VOUT’s final value.
Note 4:
Channel-to-channel isolation is defined as the glitch energy at a DAC output in response to a full-scale step change on any
other DAC output. The measured channel has a fixed code of 80 hex.
Note 5:
Digital feedthrough is defined as the glitch energy at any DAC output in response to a full-scale step change on all eight
data inputs with WRat VDD.
Note 6:
RL= ∞, digital inputs at GND or VDD.
Note 7:
Timing measurement reference level is (VIH+ VIL) / 2.
Note 8:
If LDACis activated prior to WR’s rising edge, it must stay low for tLD(or longer) after WRgoes high.
ELECTRICAL CHARACTERISTICS (continued)

(VDD= VREF= +2.7V to +5.5V, RL= 10kΩ, CL= 100pF, TA= TMINto TMAX, unless otherwise noted. Typical values are at VDD= VREF
= +3V and TA= +25°C.)
MAX5100
+2.7V to +5.5V, Low-Power, Quad, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
Typical Operating Characteristics

(VDD= VREF= +3V, RL= 10kΩ, CL= 100pF, code = FF hex, TA= +25°C, unless otherwise noted.)
Figure 1. Timing Diagram
MAX5100
+2.7V to +5.5V, Low-Power, Quad, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs

TOTAL HARMONIC DISTORTION PLUS NOISE
AT DAC OUTPUT vs. REFERENCE FREQUENCY
MAX5100 toc07
FREQUENCY (kHz)
THD + NOISE (dB)
REFERENCE INPUT
FREQUENCY RESPONSE
MAX5100 toc08
FREQUENCY (MHz)
OUTPUT AMPLITUDE (dB)
WORST-CASE 1LSB DIGITAL STEP CHANGE
(NEGATIVE)

MAX55100 toc09
1µs/div
WORST-CASE 1LSB DIGITAL STEP CHANGE
(POSITIVE)

MAX55100 toc10
1µs/div
DIGITAL FEEDTHROUGH GLITCH IMPULSE
(0 TO 1 DIGITAL TRANSITION)

MAX55100 toc11
20ns/div
DIGITAL FEEDTHROUGH GLITCH IMPULSE
(1 TO 0 DIGITAL TRANSITION)

MAX55100 toc12
20ns/div
POSITIVE SETTLING TIME

MAX55100 toc13
1µs/div
NEGATIVE SETTLING TIME

MAX55100 toc14
1µs/div
INTEGRAL AND DIFFERENTIAL NONLINEARITY
vs. DIGITAL CODE
MAX5100 toc15
DIGITAL CODE
INL/DNL (LSB)
Typical Operating Characteristics (continued)

(VDD= VREF= +3V, RL= 10kΩ, CL= 100pF, code = FF hex, TA= +25°C, unless otherwise noted.)
MAX5100
+2.7V to +5.5V, Low-Power, Quad, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
Pin Description
Detailed Description
Digital-to-Analog Section

The MAX5100 uses a matrix decoding architecture for
the DACs. The external reference voltage is divided
down by a resistor string placed in a matrix fashion.
Row and column decoders select the appropriate tab
from the resistor string to provide the needed analog
voltages. The resistor network converts the 8-bit digital
input into an equivalent analog output voltage in pro-
portion to the applied reference voltage input. The
resistor string presents a code-independent input
impedance to the reference and guarantees a monoton-
ic output.
The device can be used in multiplying applications.
The voltages are buffered by rail-to-rail op amps con-
nected in a follower configuration to provide a rail-to-rail
output. The functional block diagram for the MAX5100
is shown in Figure 2.
Low-Power Shutdown Mode

The MAX5100 features a shutdown mode that reduces
current consumption to 1nA. A high voltage on the
shutdown pin shuts down the DACs and the output
amplifiers. In shutdown mode, the output amplifiers
enter a high-impedance state. When bringing the
device out of shutdown, allow 13µs for the output to
stabilize.
Output Buffer Amplifiers

The DAC outputs are internally buffered by precision
amplifiers with a typical slew rate of 0.6V/µs. The typical
settling time to ±1/2LSB at the output is 6µs when
loaded with 10kΩin parallel with 100pF.
Reference Input

The MAX5100 provides a code-independent input
impedance on the REF input. The input impedance is
typically 460kΩin parallel with 15pF, and the reference
input voltage range is 0 to VDD. The reference input
accepts positive DC signals as well as AC signals with
peak values between 0 and VDD. The voltage at REF
sets the full-scale output voltage for the DAC. The out-
put voltage (VOUT) for any DAC is represented by a
digitally programmable voltage source as follows:
VOUT= (NB·VREF) / 256
where NBis the numeric value of the DAC binary input
code.
Digital Inputs and Interface Logic

In the MAX5100, address lines A0 and A1 select the
DAC that receives data from D0–D7, as shown in Table 1.
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED