MAX5073ETI ,2.2MHz, Dual-Output Buck or Boost Converter with Internal Power MOSFETsFeatures● 4.5V to 5.5V or 5.5V to 23V Input Supply The MAX5073 is a dual-output DC-DC converter wi ..
MAX5073ETI+T ,2.2MHz, Dual-Output Buck or Boost Converter with Internal Power MOSFETsApplications SOURCE1 23 13 VL● Point-of-Load DC-DC ConvertersSOURCE1 24 12 VL● Telecom Line CardSGN ..
MAX5078AATT ,4 to 15 V, 4 A, 20 ns, MOSFET driverFeaturesThe MAX5078A/MAX5078B high-speed MOSFET drivers♦ 4V to 15V Single Power Supplysource and si ..
MAX5078BATT+T ,4A, 20ns, MOSFET DriverFeatures♦ 4V to 15V Single Power SupplyThe MAX5078A/MAX5078B high-speed MOSFET driverssource and si ..
MAX5078BATT+T ,4A, 20ns, MOSFET DriverApplications*EP = Exposed pad./V denotes an automotive qualified part.Power MOSFET Switching Motor ..
MAX5079EUD ,ORing MOSFET Controller with Ultra-Fast 200ns Turn-OffApplicationsC+ C- FTH GNDCR STHSTHParalleled DC-DC Converter ModulesRFTHCEXTN+1 Redundant Power Sys ..
MAX934CSE+ ,Ultra-Low-Power, Low-Cost Comparators with 2% ReferenceELECTRICAL CHARACTERISTICS—5V Operation(V+ = 5V, V- = GND = 0V, T = T to T , unless otherwise noted ..
MAX934CSE+T ,Ultra-Low-Power, Low-Cost Comparators with 2% ReferenceGeneral Description ________
MAX934CSET ,Ultra-Low-Power, Low-Cost Comparators with 2% ReferenceELECTRICAL CHARACTERISTICS—5V Operation(V+ = 5V, V- = GND = 0V, T = T to T , unless otherwise noted ..
MAX934EPE ,Ultra Low-Power, Low-Cost Comparators with 2eferenceApplications5 HYSTBattery-Powered SystemsThreshold Detectors6 REFMAX931Window ComparatorsV- GND21Os ..
MAX934ESE ,Ultra Low-Power, Low-Cost Comparators with 2eferenceapplications, the' Internal 1.182V ±2% Bandgap Reference MAX931-MAX934 operate from a single +2.5V ..
MAX934ESE ,Ultra Low-Power, Low-Cost Comparators with 2eferenceMAX931-MAX93419-0194; Rev 1; 2/97Ultra Low-Power, Low-CostComparators with 2% Reference____________ ..
MAX5073ETI-MAX5073ETI+T
2.2MHz, Dual-Output Buck or Boost Converter with Internal Power MOSFETs
Ordering Information continued at end of data sheet.
General DescriptionThe MAX5073 is a dual-output DC-DC converter with
integrated high-side n-channel power MOSFETs. Each
output can be configured either as a buck converter or a
boost converter. The device is capable of operating from
a wide 5.5V to 23V input voltage range. Each output is
programmable down to 0.8V in the buck mode and up to
28V in the boost mode with an output voltage accuracy
of ±1%. In the buck mode, converter 1 and converter 2
can deliver 2A and 1A, respectively. The output switching
frequency of each converter can be programmed from
200kHz to 2.2MHz to avoid harmonics in a radio power
supply or to reduce the size of the power supply. Each
output operates 180° out-of-phase thus reducing input-
capacitor ripple current, size, and cost. A SYNC input
facilitates external frequency synchronization. Moreover,
a CLKOUT output provides out-of-phase clock signal
with respect to converter 2, allowing four-phase operation
using two MAX5073 ICs in master-slave configuration.
The MAX5073 includes an internal digital soft-start that reduc-
es inrush current, eliminates output-voltage overshoot, and
ensures monotonic rise in output voltage during power-up.
The device includes individual shutdown and a power-good
output for each converter. Protection features include output
short-circuit protection for buck mode and maximum duty-
cycle limit for boost operation, as well as thermal shutdown.
The MAX5073 is available in a thermally enhanced 28-pin
thin QFN package that can dissipate 2.7W at +70°C ambi-
ent temperature. The device is rated for operation over the
-40°C to +85°C extended, or -40°C to +125°C automotive
temperature range.
Applications●Point-of-Load DC-DC Converters●Telecom Line Card●Networking Line Card ●Power-Over-Ethernet Postregulation for PDs
Features●4.5V to 5.5V or 5.5V to 23V Input Supply
Voltage Range●0.8V (Buck) to 28V (Boost) Output Voltage●Two Independent Output DC-DC Converters
with Internal Power MOSFETs●Each Output can be Configured in Buck or Boost
Mode●IOUT1 and IOUT2 of 2A and 1A (Respectively) in
Buck Mode●180° Out-of-Phase Operation●Clock Output for Four Phase Operation●Switching Frequency Programmable from 200kHz to
2.2MHz●Digital Soft-Start and Sync Input●Individual Converter Shutdown and Power-Good
Output ●Short-Circuit Protection (Buck)/Maximum Duty-Cycle
Limit (Boost)●Thermal Shutdown●Thermally Enhanced 28-Pin Thin QFN Package
Dissipates up to 2.7W at +70°C
*EP = Exposed pad.
+Denotes lead-free package.
PARTTEMP RANGEPIN-
PACKAGE
PACKAGE
CODEMAX5073ETI-40°C to +125°C28 Thin QFN-EP*
(5mm x 5mm)T2855-6
MAX5073ETI+ -40°C to +125°C28 Thin QFN-EP*
(5mm x 5mm)T2855-6201918171615234567
MAX5073
THIN QFNTOP VIEW
SOURCE1
PGOOD2
SOURCE1
SGND
PGND
SOURCE2
SOURCE2
PGOOD1BST1/VDD1DRAIN1DRAIN1EN1FB1COMP1
BYPASS
OSC
N.C.
SYNC
COMP2
FB2EN2
DRAIN2DRAIN2
BST2/VDD2
CLKOUT
MAX50732.2MHz, Dual-Output Buck or Boost Converter
with Internal Power MOSFETs
Pin Coniguration
Ordering Information
EVALUATION KIT AVAILABLE
V+ to PGND ..........................................................-0.3V to +25V
SGND to PGND ....................................................-0.3V to +0.3V
VL to SGND .................-0.3V to the lower of +6V or (V+ + 0.3V)
BST1/VDD1, BST2/VDD2, DRAIN_, PGOOD2, PGOOD1 to
SGND ................................................................-0.3V to +30V
BST1/VDD1 to SOURCE1,
BST2/VDD2 to SOURCE2 .................................-0.3V to +6V
SOURCE_ to SGND..............................................-0.6V to +25V
EN_ to SGND ...........................................-0.3V to (VL to +0.3V)
CLKOUT, BYPASS, OSC, COMP1,
COMP2, SYNC, FB_ to SGND................-0.3V to (VL + 0.3V)
SOURCE1, DRAIN1 Peak Current ............................5A for 1ms
SOURCE2, DRAIN2 Peak Current ............................3A for 1ms
VL, BYPASS to SGND Short Circuit .........................Continuous
Continuous Power Dissipation (TA = +70°C)
28-Pin Thin QFN (derate 21.3mW/°C above +70°C) ..2758mW*Package Junction-to-Case Thermal Resistance (θJC) ......2°C/W
Operating Temperature Ranges:
MAX5073ETI (TMIN to TMAX) .........................-40°C to +85°C
MAX5073ATI (TMIN to TMAX) .......................-40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
*As per JEDEC51 standard.
(V+ = VL = 5.2V or V+ = 5.5V to 23V, EN_ = VL, SYNC = GND, IVL = 0mA, PGND = SGND, CBYPASS = 0.22µF, CVL = 4.7µF (ceramic),
ROSC = 10kΩ (circuit of Figure 1), TA = TJ = TMIN to TMAX, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
SYSTEM SPECIFICATIONSInput Voltage RangeV+(Note 2)5.523.0VVL = V+4.55.5
Operating Supply CurrentIQVL unloaded, no switching, VFB_ = 1V,
V+ = 12V, ROSC = 60kΩ2.24mA
V+ Standby Supply CurrentISTBY
EN_ = 0, PGOOD_ loating, V+ = 12V,
ROSC = 60kΩ (MAX5073ETI)0.61.2EN_ = 0, PGOOD_ loating, V+ = 12V,
ROSC = 60kΩ (MAX5073ATI)0.61.4
Eficiencyη
VOUT1 = 3.3V at 1.5A,
VOUT2 = 2.5V at 0.75A
(fSW = 1.25MHz)
V+ = VL = 5V82V+ = 12V80
V+ = 16V78
STARTUP/VL REGULATORVL Undervoltage Lockout Trip
LevelUVLOVL falling3.954.14.25V
VL Undervoltage Lockout
Hysteresis175mV
VL Output VoltageVLV+ = 5.5V to 23V, ISOURCE = 0 to 40mA4.95.25.5V
BYPASS OUTPUTBYPASS VoltageVBYPASSIBYPASS = 0, ROSC = 60kΩ (MAX5073ETI)1.982.002.02VIBYPASS = 0, ROSC = 60kΩ (MAX5073ATI)1.9752.002.025
BYPASS Load Regulation∆VBYPASS0 ≤ IBYPASS ≤ 50µA, ROSC = 60kΩ0210mV
SOFT-STARTDigital Ramp PeriodInternal 6-bit DAC2048
fOSC
clock
cyclesSteps
MAX50732.2MHz, Dual-Output Buck or Boost Converter
with Internal Power MOSFETs
Absolute Maximum RatingsStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(V+ = VL = 5.2V or V+ = 5.5V to 23V, EN_ = VL, SYNC = GND, IVL = 0mA, PGND = SGND, CBYPASS = 0.22µF, CVL = 4.7µF (ceramic),
ROSC = 10kΩ (circuit of Figure 1), TA = TJ = TMIN to TMAX, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
VOLTAGE-ERROR AMPLIFIERFB_ Input Bias CurrentIB(EA)250nA
FB_ Input Voltage Set Point
0°C ≤ TA ≤ +70°C0.7920.80.808-40°C ≤ TA ≤ +85°C0.7880.80.812
-40°C ≤ TJ ≤ +125°C (MAX5073ATI only)0.7880.80.812
FB_ to COMP_
TransconductancegM
0°C to +85°C1.2522.7040°C to +85°C1.222.9
-40°C to +125°C (MAX5073ATI only)1.222.9
INTERNAL PMOSFETSOn-Resistance Converter 1RON1
ISWITCH = 100mA,
VBST1/VDD1 to VSOURCE1 = 5.2V
(MAX5073ETI)
ISWITCH = 100mA,
VBST1/VDD1 to VSOURCE1 = 5.2V
(MAX5073ATI)
ISWITCH = 100mA,
VBST1/VDD1 to VSOURCE1 = 4.5V
(MAX5073ETI)
ISWITCH = 100mA,
VBST1/VDD1 to VSOURCE1 = 4.5V
(MAX5073ATI)
On-Resistance Converter 2RON2
ISWITCH = 100mA, BST2/VDD2 to VSOURCE2 = 5.2V330630mΩ
ISWITCH = 100mA, BST2/VDD2 to VSOURCE2 = 4.5V350690
Minimum Converter 1 Output
CurrentIOUT1VOUT1 = 3.3V, V+ = 12V (Note 3)2A
Minimum Converter 2 Output
CurrentIOUT2VOUT2 = 2.5V, V+ = 12V (Note 3)1A
Converter 1 MOSFET Leakage
CurrentILK1EN1 = 0V, VDS = 23V10µA
Converter 2 MOSFET Leakage
CurrentILK2EN2 = 0V, VDS = 23V10µA
INTERNAL SWITCH CURRENT LIMITCurrent-Limit Converter 1ICL1
V+ = 12V (MAX5073ETI)2.334.3A
V+ = 12V (MAX5073ATI)2.334.6
Current-Limit Converter 2ICL2MAX5073ETI1.381.82.10A
MAX5073ATI1.381.82.20
MAX50732.2MHz, Dual-Output Buck or Boost Converter
with Internal Power MOSFETs
Electrical Characteristics (continued)
(V+ = VL = 5.2V or V+ = 5.5V to 23V, EN_ = VL, SYNC = GND, IVL = 0mA, PGND = SGND, CBYPASS = 0.22µF, CVL = 4.7µF (ceramic),
ROSC = 10kΩ (circuit of Figure 1), TA = TJ = TMIN to TMAX, unless otherwise noted.) (Note 1)
Note 1: Specifications at -40°C are guaranteed by design and not production tested.
Note 2: Operating supply range (V+) is guaranteed by VL line regulation test. Connect V+ to VL for 5V operation.
Note 3: Output current may be limited by the power dissipation of the package, refer to the Power Dissipation section in the
Applications Information.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
INTERNAL OSCILLATOR/SYNCMaximum Duty CycleDMAXSYNC = SGND, fSW = 1.25MHz848695%
SYNC = SGND, fSW = 2.2MHz848695
Switching Frequency RangefSWEach converter2002200kHz
Switching FrequencyfSETROSC = 10kΩ, each converter112512501375kHz
Switching Frequency Accuracy5.6kΩ ≤ ROSC ≤ 56kΩ, 1% each converter-15+15%
SYNC Frequency RangefSYNCSYNC input frequency is twice the
individual converter frequency4004400kHZ
SYNC High ThresholdVSYNCH2.4V
SYNC Low ThresholdVSYNCL0.8V
SYNC Input Min Pulse WidthtSYNCIN100ns
Clock Output Phase DelayCLKOUT
PHASE
ROSC = 60kΩ, 1%, with respect to
converter 2 / SOURCE2 waveform45degrees
SYNC to SOURCE1 Phase
DelaySYNCPHASEROSC = 60kΩ, 1%45degrees
Clock Output High LevelVCLKOUTHVL = 5.2V, sourcing 5mA4V
Clock Output Low LevelVCLKOUTLVL = 5.2V, sinking 5mA0.4V
EN_ INPUTSEN_ Input High ThresholdVIHV+ = VL = 5.2V2.41.8V
EN_ Input Low ThresholdVILV+ = VL = 5.2V1.20.8V
EN_ Bias CurrentIB(EN)250nA
POWER-GOOD OUTPUT (PGOOD_)PGOOD_ ThresholdPGOODVTH_PGOOD goes high after VOUT crosses
PGOOD_ threshold9092.595%VOUT
PGOOD_ Output VoltageVPGOOD_ISINK = 3mA (MAX5073ETI)0.4VISINK = 3mA (MAX5073ATI)0.52
PGOOD_ Output Leakage
CurrentILKPGOOD_V+ = VL = 5.2V, VPGOOD_ = 23V,
VFB_ = 1V1µA
THERMAL MANAGEMENTThermal ShutdownTSHDNJunction temperature+150°C
Thermal HysteresisTHYSTJunction temperature30°C
MAX50732.2MHz, Dual-Output Buck or Boost Converter
with Internal Power MOSFETs
Electrical Characteristics (continued)
(V+ = VL = 5.2V, TA = +25°C, unless otherwise noted.)
OUTPUT2 EFFICIENCY (BUCK CONVERTER)
vs. LOAD CURRENTMAX5073 toc02
LOAD (A)
EFFICIENCY (%)
VIN = 5V
VIN = 12.0V
VIN = 16.0V
VOUT = 2.5V
fSW = 2.2MHz
OUTPUT2 EFFICIENCY (BOOST CONVERTER)
vs. LOAD CURRENT
MAX5073 toc03
LOAD (A)
EFFICIENCY (%)
VIN = 5V
VIN = 3.3V
VOUT = 12V
fSW = 2.2MHz
OUTPUT1 VOLTAGE (BUCK CONVERTER)
vs. LOAD CURRENTMAX5073 toc04
LOAD (A)
OUTPUT1 VOLTAGE (V)
OUTPUT2 VOLTAGE (BUCK CONVERTER)
vs. LOAD CURRENT
MAX5073 toc05
LOAD (A)
OUTPUT2 VOLTGE (V)
VL OUTPUT VOLTAGE
vs. CONVERTER SWITCHING FREQUENCY
MAX5073 toc06
SWITCHING FREQUENCY (fSW) (MHz)
VL (V)
BOTH CONVERTERS SWITCHING
VIN = 23V
VIN = 5.5V
VL DROPOUT VOLTAGE vs. EACH
CONVERTER SWITCHING FREQUENCYMAX5073 toc07
DROPOUT VOLTAGE (V)
VIN = 5.5V
VIN = 4.5V
VIN = 5V
OUTPUT1 EFFICIENCY (BUCK CONVERTER)
vs. LOAD CURRENTMAX5073 toc01
LOAD (A)
EFFICIENCY (%)
VIN = 5V
VIN = 12.0V
VIN = 16.0V
VOUT = 3.3V
fSW = 2.2MHz
EACH CONVERTER SWITCHING FREQUENCY
vs. ROSCMAX5073 toc08
SWITCHING FREQUENCY (f
) (MHz)402080
EACH CONVERTER SWITCHING
FREQUENCY vs. TEMPERATURE
MAX5073 toc09
SWITCHING FREQUENCY (f
) (MHz)
2.2MHz
0.6MHz
0.3MHz
1.25MHz
MAX50732.2MHz, Dual-Output Buck or Boost Converter
with Internal Power MOSFETs
Typical Operating Characteristics
(V+ = VL = 5.2V, TA = +25°C, unless otherwise noted.)
1ms/div
LINE-TRANSIENT RESPONSE
(BUCK CONVERTER)MAX5073 toc10
VIN
5V/div
VOUT1 = 3.3V/1.5A
AC-COUPLED
200mV/div
VOUT2 = 2.5V/0.75A
AC-COUPLED
200mV/div
100µs/div
CONVERTER 1 LOAD-TRANSIENT
RESPONSE (BUCK CONVERTER)MAX5073 toc11
VOUT1 = 3.3V
AC-COUPLED
200mV/div
IOUT1
1A/div
100µs/div
CONVERTER 2 LOAD-TRANSIENT
RESPONSE (BUCK CONVERTER)MAX5073 toc12
VOUT1 = 3.3V
AC-COUPLED
100mV/div
VOUT2 = 2.5V
AC-COUPLED
100mV/div
IOUT2
500mA/div
2ms/div
SOFT-START/SOFT-STOPMAX5073 toc13
VOUT1 = 3.3V/1A
2V/div
VOUT2 = 2.5V/0.5A
2V/div
ENABLE
5V/div
LOAD-TRANSIENT RESPONSE
(BOOST CONVERTER)MAX5073 toc14
VOUT1 = 3.3V
AC-COUPLED
200mV/div
VOUT2 = 12V
AC-COUPLED
200mV/div
IOUT2
50mA/div
OUT-OF-PHASE OPERATIONMAX5073 toc15
SOURCE2
5V/div
SOURCE1
5V/div
INPUT RIPPLE
AC-COUPLED
20mV/div
CLKOUT
5V/div
MAX50732.2MHz, Dual-Output Buck or Boost Converter
with Internal Power MOSFETs
Typical Operating Characteristics (continued)
(V+ = VL = 5.2V, TA = +25°C, unless otherwise noted.)
200ns/div
EXTERNAL SYNCHRONIZATIONMAX5073 toc16SYNC
5V/div
SOURCE1
5V/div
VOUT1 RIPPLE
AC-COUPLED
20mV/div
CLKOUT
5V/div
V+ STANDBY SUPPLY CURRENT (ISTBY)
vs. TEMPERATUREMAX5073 toc17
TEMPERATURE (°C)
ISTBY
(mA)5926-7
ROSC = 10kΩ
ROSC = 60kΩ
V+ SWITCHING SUPPLY
CURRENT (ISUPPLY) vs. TEMPERATUREMAX5073 toc18
ISUPPLY
(mA)
TEMPERATURE (°C)5926-7-40125
fSW = 2.2MHz
fSW = 1.25MHz
fSW = 600kHz
fSW = 300kHz
OUTPUT1 VOLTAGE (BUCK CONVERTER)
vs. TEMPERATUREMAX5073 toc19
TEMPERATURE (°C)
OUTPUT1 VOLTAGE (V)
NO LOAD
50% LOAD
OUTPUT2 VOLTAGE (BUCK CONVERTER)
vs. TEMPERATURE
MAX5073 toc20
OUTPUT2 VOLTAGE (V)
NO LOAD
50% LOAD
MAX50732.2MHz, Dual-Output Buck or Boost Converter
with Internal Power MOSFETs
Typical Operating Characteristics (continued)
(V+ = VL = 5.2V, TA = +25°C, unless otherwise noted.)
PINNAMEFUNCTIONCLKOUTClock Output. CLKOUT is 45° phase-shifted with respect to converter 2 (SOURCE2, Figure 3). Connect
CLKOUT (master) to the SYNC of a second MAX5073 (slave) for a four-phase converter.BST2/VDD2
Buck Converter Operation—Bootstrap Flying-Capacitor Connection for Converter 2. Connect BST2/
VDD2 to an external ceramic capacitor and diode according to the standard application circuit (Figure
1). Boost Converter Operation—Driver Bypass Capacitor Connection. Connect a low-ESR 0.1µF
ceramic capacitor from BST2/VDD2 to PGND (Figure 8).
3, 4DRAIN2
Connection to Converter 2 Internal MOSFET Drain. Buck converter operation—use the MOSFET as a
high-side switch and connect DRAIN2 to the input supply. Boost converter operation—use the MOSFET
as a low-side switch and connect DRAIN2 to the inductor and diode junction (Figure 8).EN2
Active-High Enable Input for Converter 2. Drive EN2 low to shut down converter 2, drive EN2 high for
normal operation. Use EN2 in conjunction with EN1 for supply sequencing. Connect to VL for always-on
operation.FB2
Feedback Input for Converter 2. Connect FB2 to a resistive divider between converter 2’s output and
SGND to adjust the output voltage. To set the output voltage below 0.8V, connect FB2 to a resistive
voltage-divider from BYPASS to regulator 2’s output (Figure 5). See the Setting the Output Voltage
section.COMP2Compensation Connection for Converter 2. See the Compensation section to compensate converter
2’s control loop.SYNC
External Clock Synchronization Input. Connect SYNC to a 400kHz to 4400kHz clock to synchronize the
switching frequency with the system clock. Each converter frequency is one half the frequency applied
to SYNC. Connect SYNC to SGND when not used.N.C.No Connection. Not internally connected.
OUTPUT LOAD CURRENT LIMIT
vs. TEMPERATUREMAX5073 toc21
TEMPERATURE (°C)
OUTPUT CURRENT LIMIT (A)30-5
VIN = 5.5V
fSW = 2.2MHz
OUTPUT1
OUTPUT2
400ns/div
FOUR-PHASE OPERATION
(SEE FIGURE 3)MAX5073 toc22
SOURCE1
(MASTER)
SOURCE1
(SLAVE)
SOURCE2
(SLAVE)
SOURCE2
(MASTER)
MAX50732.2MHz, Dual-Output Buck or Boost Converter
with Internal Power MOSFETs
Typical Operating Characteristics (continued)
Pin Description
PINNAMEFUNCTIONOSC
Oscillator Frequency Set Input. Connect a resistor from OSC to SGND (ROSC) to set the switching
frequency (see the Oscillator section). Set ROSC for equal to or lower oscillator frequency than the
SYNC input frequency when using external synchronization (0.2fSYNC < fOSC < 1.2fSYNC). ROSC is still
required when an external clock is connected to the SYNC input.V+Input Supply Voltage. V+ voltage range from 5.5V to 23V. Connect the V+ and VL together for 4.5V to
5.5V input operation. Bypass with a minimum 0.1µF ceramic capacitor to SGND.
12, 13VLInternal 5.2V Linear Regulator Output. Use VL to drive the high-side switch at BST1/VDD1 and
BST2/VDD2. Bypass VL with a 0.1µF capacitor to PGND and a 4.7µF ceramic capacitor to SGND.BYPASS2.0V Output. Bypass to SGND with a 0.22µF or greater ceramic capacitor.COMP1Compensation Connection for Converter 1 (See the Compensation Section)FB1
Feedback Input for Converter 1. Connect FB1 to a resistive divider between converter 1’s output and
SGND to program the output voltage. To set the output voltage below 0.8V, connect FB1 to a resistive
voltage- divider from BYPASS to regulator 1’s output (Figure 5). See the Setting the Output Voltage
section.EN1
Active-High Enable Input for Converter 1. Drive EN1 low to shut down converter 1, drive EN1 high for
normal operation. Use EN1 in conjunction with EN2 for supply sequencing. Connect to VL for always-on
operation.
18, 19DRAIN1
Connection to the Converter 1 Internal MOSFET Drain.
Buck converter operation—use the MOSFET as a high-side switch and connect DRAIN1 to the input
supply. Boost converter operation—use the MOSFET as a low-side switch and connect DRAIN1 to the
inductor and diode junction.BST1/VDD1
Buck Converter Operation—Bootstrap Flying-Capacitor Connection for Converter 1. Connect
BST1/VDD1 to an external ceramic capacitor and diode according to the Standard Application Circuit
(Figure 1). Boost Converter Operation—Driver Bypass Capacitor Connection. Connect a low-ESR
0.1µF ceramic capacitor from BST1/VDD1 to PGND.PGOOD1
Converter 1 Power-Good Output. Open-drain output goes low when converter 1’s output falls below
92.5% of its set regulation voltage. Use PGOOD1, PGOOD2, EN1, and EN2 to sequence the
converters.PGOOD2Converter 2 Power-Good Output. Open-drain output goes low when converter 2’s output falls below
92.5% of its set regulation voltage.
23, 24SOURCE1
Connection to the Converter 1 Internal MOSFET Source.
Buck converter operation—connect SOURCE1 to the switched side of the inductor as shown in Figure 1.
Boost converter operation—connect SOURCE1 to PGND.SGNDSignal Ground. Connect SGND to the exposed pad. Connect SGND and PGND together at a single
point.PGNDPower Ground. Connect rectiier diode anode, input capacitor negative, output capacitor negative, and
VL bypass capacitor returns to PGND.
27, 28SOURCE2
Connection to the Converter 2 Internal MOSFET Source.
Buck converter operation—connect SOURCE2 to the switched side of the inductor as shown in Figure 1.
Boost converter operation—connect SOURCE2 to PGND (Figure 8).SGNDExposed Paddle. Connect to SGND. Solder EP to the SGND plane for better thermal performance.
MAX50732.2MHz, Dual-Output Buck or Boost Converter
with Internal Power MOSFETs
Pin Description (continued)
Detailed Description
PWM ControllerThe MAX5073 converter uses a pulse-width modulation
(PWM) voltage-mode control scheme for each out-of-
phase controller. It is nonsynchronous rectification and
uses an external low-forward-drop Schottky diode for
rectification. The controller generates the clock signal by
dividing down the internal oscillator or the SYNC input
when driven by an external clock, so each controller’s
switching frequency equals half the oscillator frequency
(fSW = fOSC/2). An internal transconductance error ampli-
fier produces an integrated error voltage at the COMP pin,
providing high DC accuracy. The voltage at COMP sets
the duty cycle using a PWM comparator and a ramp gen-
erator. At each rising edge of the clock, converter 1’s high-
side n-channel MOSFET turns on and remains on until
either the appropriate or maximum duty cycle is reached,
or the maximum current limit for the switch is detected.
Converter 2 operates out-of-phase, so the second high-
side MOSFET turns on at each falling edge of the clock.
In the case of buck operation (Figure 1), during each high-
ramps up. During the second half of the switching cycle,
the high-side MOSFET turns off and forward biases the
Schottky rectifier. During this time, the SOURCE volt-
age is clamped to 0.4V (VD) below ground. The inductor
releases the stored energy as its current ramps down,
and provides current to the output. The bootstrap capaci-
tor is also recharged from the inductance energy when
the MOSFET turns off. The circuit goes in discontinuous
conduction mode operation at light load, when the induc-
tor current completely discharges before the next cycle
commences. Under overload conditions, when the induc-
tor current exceeds the peak current limit of the respective
switch, the high-side MOSFET turns off quickly and waits
until the next clock cycle.
In the case of boost operation, the MOSFET is a low-side
switch (Figure 8). During each on-time, the inductor cur-
rent ramps up. During the second half of the switching
cycle, the low-side switch turns off and forward biases
the Schottky diode. During this time, the DRAIN voltage
is clamped to 0.4V (VD) above VOUT_ and the inductor
provides energy to the output as well as replenishes the
output capacitor charge.
Figure 1. MAX5073 Dual Buck Regulator Application Circuit
PGOOD2CLOCK
OUT
MAX5073OUTPUT2
2.5V/1AOUTPUT1
3.3V/2A
INPUT
INPUT
PGND
SGND
SYSTEM
CLOCKVIN = 5.5V TO 23V27262524232291011121314
BST2/VDD2
CLKOUT
DRAIN2
DRAIN2
EN2ON
OFF
FB2
COMP2
SOURCE2PGNDSGNDPGOOD2SOURCE1
PGOOD1
BST1/VDD1
DRAIN1
DRAIN1
EN1
FB1
COMP1
BYPASSVLVLV+OSCN.C.SYNCOFF
SGND
SGND
*CONNECT PGND AND SGND TOGETHER AT ONE POINT NEAR THE
RETURN TERMINALS OF THE V+ AND VL BYPASS CAPACITORS.
MAX50732.2MHz, Dual-Output Buck or Boost Converter
with Internal Power MOSFETs
Internal Oscillator/Out-of-Phase OperationThe internal oscillator generates the 180° out-of-phase
clock signal required by each regulator. The internal oscil-
lator frequency is programmable from 400kHz to 4.4MHz
using a single 1% resistor at ROSC. Use the following
equation to calculate ROSC:
OSC
OSC
25 10Rf×=
where fOSC is the internal oscillator frequency in hertz
and ROSC in ohms.
The two independent regulators in the MAX5073 switch
180° out-of-phase to reduce input filtering requirements,
to reduce electromagnetic interference (EMI), and to
improve efficiency. This effectively lowers component cost
and saves board space, making the MAX5073 ideal for
cost-sensitive applications.
With dual synchronized out-of-phase operation, the
MAX5073’s high-side MOSFETs turn on 180° out-of-
phase. The instantaneous input current peaks of both
regulators do not overlap, resulting in reduced RMS
ripple current and input voltage ripple. This reduces the
required input capacitor ripple current rating, allows for
fewer or less expensive capacitors, and reduces shielding
requirements for EMI. The out-of-phase waveforms in the
Typical Operating Characteristics demonstrate synchro-
nized 180° out-of-phase operation.
Synchronization (SYNC)/
Clock Output (CLKOUT)The main oscillator can be synchronized to the system
clock by applying an external clock (fSYNC) at SYNC.
The fSYNC frequency must be twice the required operat-
ing frequency of an individual converter. Use a TTL logic
signal for the external clock with at least a 100ns pulse
width. ROSC is still required when using external syn-
chronization. Program the internal oscillator frequency so
0.2fSYNC < fOSC < 1.2fSYNC. The rising edge of fSYNC
synchronizes the turn-on edge of the internal MOSFET
(see Figure 3).
OSCOSC
25 10Rf×=
where fOSC is the internal oscillator frequency in hertz
and ROSC in ohms, fOSC = 2 x fSW.
Two MAX5073s can be connected in the master-slave
configuration for four ripple-phase operation. The
phase-shifted with respect to the internal switch turn-on
edge. Feed the CLKOUT of the master to the SYNC input
of the slave. The effective input ripple switching frequency
shall be four times the individual converter’s switching fre-
quency. When driving the master converter using external
clock at SYNC, set the clock duty cycle to 50% for a 90°
phase-shifted operation.
Input Voltage (V+)/Internal Linear Regulator (VL)All internal control circuitry operates from an internally reg-
ulated nominal voltage of 5.2V (VL). At higher input volt-
ages (V+) of 5.5V to 23V, VL is regulated to 5.2V. At 5.5V
or below, the internal linear regulator operates in dropout
mode, where VL follows V+. Depending on the load on
VL, the dropout voltage can be high enough to reduce VL
below the undervoltage lockout (UVLO) threshold.
For input voltages of less than 5.5V, connect V+ and VL
together. The load on VL is proportional to the switch-
ing frequency of converter 1 and converter 2. See the
Dropout Voltage vs. Switching Frequency graph in the
Typical Operating Characteristics. For input voltage rang-
es higher than 5.5V, use the internal regulator.
Bypass V+ to SGND with a low-ESR, 0.1µF or greater
ceramic capacitor placed close to the MAX5073. Current
spikes from VL may disturb internal circuitry powered by
VL. Bypass VL with a low-ESR, ceramic 0.1µF capacitor
to PGND and 4.7µF capacitor to SGND.
Undervoltage Lockout/Soft-StartThe MAX5073 includes an undervoltage lockout with
hysteresis and a power-on-reset circuit for converter turn-
on and monotonic rise of the output voltage. The rising
UVLO threshold is internally set to 4.3V with a 175mV
hysteresis. Hysteresis at UVLO eliminates “chattering”
during startup. When VL drops below UVLO, the internal
switches are turned off.
Digital soft-start is provided internally to reduce input
surge currents and glitches at the input during turn-on.
When UVLO is cleared and EN_ is high, digital soft-start
slowly ramps up the internal reference voltage in 64
steps. The total soft-start period is 2048 switching cycles
of the internal oscillator.
To calculate the soft-start period, use the following
equation:OSC
2048tf=
where fOSC is the internal oscillator frequency in hertz,
which is twice the switching frequency of each converter.
MAX50732.2MHz, Dual-Output Buck or Boost Converter
with Internal Power MOSFETs
Figure 2. Functional Diagram
OSCILLATOR
COMP2
FB2
SOURCE2
VDD2
COMP1
PGOOD1
SOURCE1
DRAIN1
BYPASS
EN1
EN2
DRAIN2
PGOOD2
CONVERTER 2
OSCILLATOR
DIGITAL
SOFT-START
CONVERTER 1
LDO
VREF
0.5VREF
0.92VREF
VREF
fSW / 4
FREQUENCY
FOLDBACK
DEAD-TIME
CONTROL
FB1
BST1/VDD1
MAX5073MAIN
OSCILLATOR
CKO
SYNC
OSC
BST2/VDD2
MAX50732.2MHz, Dual-Output Buck or Boost Converter
with Internal Power MOSFETs
