MAX5066EUI+ ,Configurable, Single-/Dual-Output, Synchronous Buck Controller for High-Current ApplicationsApplicationsABSOLUTE MAXIMUM RATINGSIN to AGND.......-0.3V to +30V REF Continuous Output Current .. ..
MAX5066EUI+T ,Configurable, Single-/Dual-Output, Synchronous Buck Controller for High-Current ApplicationsELECTRICAL CHARACTERISTICS(V = V = V = V = +5V, T = T = T to T , unless otherwise noted, circuit of ..
MAX5068BAUE ,10.8 to 24 V, high-frequency, current-mode PWM controller with accurate programmable oscillatorELECTRICAL CHARACTERISTICS(V = +12V for the MAX5068B/E/F; V = +23.6V for the MAX5068A/C/D at startu ..
MAX5068BAUE+T ,High-Frequency, Current-Mode PWM Controller with Accurate Programmable OscillatorELECTRICAL CHARACTERISTICS(V = +12V for the MAX5068B/E/F; V = +23.6V for the MAX5068A/C/D at startu ..
MAX5068EAUE ,10.8 to 24 V, high-frequency, current-mode PWM controller with accurate programmable oscillatorApplications Pin ConfigurationsUniversal-Input AC Power SuppliesTOP VIEWIsolated Telecom Power Supp ..
MAX5069CAUE+ ,High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET DriversELECTRICAL CHARACTERISTICS(V = +12V for the MAX5069C/D, V = +23.6V for the MAX5069A/B at startup, t ..
MAX932CSA ,Ultra Low-Power, Low-Cost Comparators with 2eferenceGeneral Description ________
MAX932CSA+ ,Ultra-Low-Power, Low-Cost Comparators with 2% ReferenceFeaturesThe MAX931-MAX934 single, dual, and quad micropower, ♦ Ultra-Low 4μA Max Quiescent Currentl ..
MAX932CUA ,Ultra Low-Power, Low-Cost Comparators with 2eferenceGeneral Description ________
MAX932CUA ,Ultra Low-Power, Low-Cost Comparators with 2eferenceELECTRICAL CHARACTERISTICS—5V Operation (continued)(V+ = 5V, V- = GND = 0V, T = T to T , unless oth ..
MAX932CUA+ ,Ultra-Low-Power, Low-Cost Comparators with 2% ReferenceMAX931-MAX93419-0194; Rev 1; 2/97Ultra Low -Pow er, Low -CostComparators w ith 2% Reference________ ..
MAX932ESA ,Ultra Low-Power, Low-Cost Comparators with 2eferenceELECTRICAL CHARACTERISTICS—5V Operation (continued)(V+ = 5V, V- = GND = 0V, T = T to T , unless oth ..
MAX5066EUI-MAX5066EUI+-MAX5066EUI+T
Configurable, Single-/Dual-Output, Synchronous Buck Controller for High-Current Applications
General DescriptionThe MAX5066 is a two-phase, configurable single- or
dual-output buck controller with an input voltage range of
4.75V to 5.5V or from 5V to 28V. Each phase of the
MAX5066 is designed for 180°operation. A mode pin
allows for a dual-output supply or connecting two phases
together for a single-output, high-current supply. Each
output channel of the MAX5066 drives n-channel
MOSFETs and is capable of providing more than 25A of
load current. The MAX5066 uses average current-mode
control with a switching frequency up to 1MHz per phase
where each phase is 180°out of phase with respect to
the other. Out-of-phase operation results in significantly
reduced input capacitor ripple current and output volt-
age ripple in dual-phase, single-output voltage applica-
tions. Each buck regulator output has its own high-
performance current and voltage-error amplifier that can
be compensated for optimum output filter L-C values and
transient response.
The MAX5066 offers two enable inputs with accurate
turn-on thresholds to allow for output voltage sequencing
of the two outputs. The device’s switching frequency can
be programmed from 100kHz to 1MHz with an external
resistor. The MAX5066 can be synchronized to an exter-
nal clock. Each output voltage is adjustable from 0.61V to
5.5V. Additional features include thermal shutdown, “hic-
cup mode” short-circuit protection. Use the MAX5066
with adaptive voltage positioning for applications that
require a fast transient response, or accurate output volt-
age regulation.
The MAX5066 is available in a thermally enhanced 28-pin
TSSOP package capable of dissipating 1.9W. The device
is rated for operation over the -40°C to +85°C extended,
or -40°C to +125°C automotive temperature range.
ApplicationsHigh-End Desktop Computers
Graphics Cards
Networking Systems
Point-of-Load High-Current/High-Density
Telecom DC-DC Regulators
RAID Systems
Features4.75V to 5.5V or 5V to 28V InputDual-Output Synchronous Buck Controller Configurable for Two Separate Outputs or One
Single OutputEach Output is Capable of Up to 25A Output
CurrentAverage Current-Mode Control Provides Accurate
Current Limit180°Interleaved Operation Reduces Size of Input
Filter Capacitors Limits Reverse Current Sinking When Operated in
Parallel ModeEach Output is Adjustable from 0.61V to 5.5V Independently Programmable Adaptive Voltage
PositioningIndependent Shutdown for Each Output100kHz to 1MHz per Phase Programmable
Switching FrequencyOscillator Frequency Synchronization from
200kHz to 2MHzHiccup Mode Overcurrent Protection Overtemperature ShutdownThermally Enhanced 28-Pin TSSOP Package
Capable of Dissipating 1.9WOperates Over -40°C to +85°C or -40°C to +125°C
Temperature Range
MAX5066
Configurable, Single-/Dual-Output, Synchronous
Buck Controller for High-Current Applications
Ordering Information19-3661; Rev 1; 8/05
EVALUATION KIT
AVAILABLE
PARTTEMP RANGE PIN-PACKAGEMAX5066EUI-40°C to +85°C 28 TSSOP-EP*
MAX5066AUI-40°C to +125°C 28 TSSOP-EP*
*Exposed Pad
MAX5066
Configurable, Single-/Dual-Output, Synchronous
Buck Controller for High-Current Applications
ABSOLUTE MAXIMUM RATINGSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
IN to AGND.............................................................-0.3V to +30V
BST_ to AGND........................................................-0.3V to +35V
DH_ to LX_....................................-0.3V to (VBST_- VLX_) + 0.3V
DL_ to PGND..............................................-0.3V to (VDD+ 0.3V)
BST_ to LX_..............................................................-0.3V to +6V
VDDto PGND............................................................-0.3V to +6V
AGND to PGND.....................................................-0.3V to +0.3V
REG, RT/CLKIN, CSP_, CSN_ to AGND ..................-0.3V to +6V
All Other Pins to AGND............................-0.3V to (VREG+ 0.3V)
REG Continuous Output Current
(Limited by Power Dissipation, No Thermal or Short-Circuit
Protection).........................................................................67mA
REF Continuous Output Current........................................200µA
Continuous Power Dissipation (TA= +70°C)
28-Pin TSSOP (derate 23.8mW/°C above +70°C).....1904mW
Package Thermal Resistance (θJC)...................................2°C/W
Operating Temperature Ranges
MAX5066EUI...................................................-40°C to +85°C
MAX5066AUI.................................................-40°C to +125°C
Maximum Junction Temperature.....................................+150°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
ELECTRICAL CHARACTERISTICS(VIN= VREG= VDD= VEN_= +5V, TA= TJ= TMINto TMAX, unless otherwise noted, circuit of Figure 6. Typical values are at TA= +25°C.)
(Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
SYSTEM SPECIFICATIONSInput Voltage RangeVININ and REG shorted together for +5V
operation4.755.5V
Quiescent Supply CurrentIINfOSC = 500kHz, DH_, DL_ = open420mA
STARTUP/INTERNAL REGULATOR OUTPUT (REG)REG Undervoltage LockoutUVLOVREG rising4.04.154.5V
HysteresisVHYST200mV
REG Output AccuracyVIN = 5.8V to 28V, ISOURCE = 0 to 65mA4.755.105.30V
REG DropoutVIN < 5.8V, ISOURCE = 60mA0.5V
INTERNAL REFERENCEInternal Reference VoltageVEAN_EAN_ connected to EAOUT_ (Note 2)0.6135V
Internal Reference Voltage
AccuracyVEAN_VIN = VREG = 4.75V to 5.5V or VIN = 5V to
28V, EAN_ connected to EAOUT_ (Note 2)-0.9+0.9%
EXTERNAL REFERENCE VOLTAGE OUTPUT (REF)AccuracyVREFIREF = 100µA3.233.33.37V
Load RegulationIREF = 0 to 200µA3.23.4V
MOSFET DRIVERSp-Channel Output Driver
ImpedanceRON_P1.354Ω
n-Channel Output Driver
ImpedanceRON_N0.451.35Ω
Output Driver Source CurrentIDH_, IDL_2.5A
Output Driver Sink CurrentIDH_, IDL_8A
Nonoverlap Time (Dead Time)tNOCDH_ or CDL_ = 5nF30ns
MAX5066
Configurable, Single-/Dual-Output, Synchronous
Buck Controller for High-Current Applications
ELECTRICAL CHARACTERISTICS (continued)(VIN= VREG= VDD= VEN_= +5V, TA= TJ= TMINto TMAX, unless otherwise noted, circuit of Figure 6. Typical values are at TA= +25°C.)
(Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
OSCILLATORRRT = 12.4kΩ1000
Switching FrequencyfSW
1MHz (max)
switching
frequency per
phaseRRT = 127kΩ100
kHz
fSW = 250kHz nominal, RRT = 50kΩ-7.5+7.5Switching Frequency AccuracyfSW = 1MHz nominal, RRT = 12.4kΩ-10+10%
RT/CLKIN Output VoltageVRT/CLKIN1.225V
RT/CLKIN Current Sourcing
CapabilityIRT/CLKIN0.5mA
RT/CLKIN Logic-High ThresholdVRT/CLKIN_H2.4V
RT/CLKIN Logic-Low ThresholdVRT/CLKIN_L0.8V
RT/CLKIN High Pulse WidthtRT/CLKIN30ns
RT/CLKIN Synchronization
Frequency RangefRT/CLKIN2002000kHz
CURRENT LIMITAverage Current-Limit ThresholdVCL_VCSP_ - VCSN_20.422.524.75mV
Reverse Current-Limit ThresholdVRCL_VCSP_ - VCSN_-3.13-1.63-0.1mV
Cycle-by-Cycle Current-Limit
ThresholdVCLpk_VCSP_ - VCSN_52.5mV
Cycle-by-Cycle Current-Limit
Response TimetR260ns
DIGITAL FAULT INTEGRATION (DF_)Number of Switching Cycles to
Shutdown in Current-LimitNSDF_32,768Clock
cycles
Number of Switching Cycles to
Recover from ShutdownNRDF_524,288Clock
cycles
CURRENT-SENSE AMPLIFIERCSP_ to CSN_ Input ResistanceRCS_1.9835kΩ
VIN = VREG = 4.75V to 5.5V or
VIN = 5V to 10V-0.3+3.6VCommon-Mode RangeVCMR(CS)
VIN = 7V to 28V-0.3+5.5V
Input Offset VoltageVOS(CS)100µV
Amplifier GainAV(CS)36V/V
-3dB Bandwidthf-3dB4MHz
VCSP_ = 5.5V, sinking120CSP_ Input Bias CurrentICSA(IN)VCSP_ = 0V, sourcing30µA
MAX5066
Configurable, Single-/Dual-Output, Synchronous
Buck Controller for High-Current Applications
ELECTRICAL CHARACTERISTICS (continued)(VIN= VREG= VDD= VEN_= +5V, TA= TJ= TMINto TMAX, unless otherwise noted, circuit of Figure 6. Typical values are at TA= +25°C.)
(Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
CURRENT-ERROR AMPLIFIER (CEA_)TransconductancegM550µS
Open-Loop GainAVOL(CEA)No load50dB
VOLTAGE ERROR AMPLIFIER (EAOUT_)Open-Loop GainAVOL(EA)70dB
Unity-Gain BandwidthfUGEA3MHz
EAN_ Input Bias CurrentIBIAS(EA)VEAN_ = 2.0V100nA
Error Amplifier Output Clamping
High Voltage
VCLMP_HI
(EA)With respect to VCM1.14V
Error Amplifier Output Clamping
Low Voltage
VCLMP_LO
(EA)With respect to VCM-0.234V
EN_ INPUTSEN_ Input High VoltageVENHEN rising1.2041.2221.240
EN_ Hysteresis0.05V
EN_ Input Leakage CurrentIEN-1+1µA
MODE INPUTMODE Logic-High ThresholdVMODE_H2.4V
MODE Logic-Low ThresholdVMODE_L0.8V
MODE Input PulldownIPULLDWN5µA
THERMAL SHUTDOWNThermal ShutdownTSHDN160
Thermal Shutdown HysteresisTHYST10°C
Note 1:The device is 100% production tested at TA= +85°C (MAX5066EUI) and TA= TJ= +125°C (MAX5066AUI). Limits at -40°C
and +25°C are guaranteed by design.
Note 2:The internal reference voltage accuracy is measured at the negative input of the error amplifiers (EAN_). Output voltage
accuracy must include external resistor-divider tolerances.
OSCILLATOR FREQUENCY vs. RTMAX5066 toc01
RT (kΩ)
OSCILLATOR FREQUENCY (kHz)
10,000
CDH = CDL = 0
SUPPLY CURRENT
vs. TEMPERATURE AND FREQUENCY
(VIN = 5V)MAX5066 toc02a
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
CDH = CDL = 0fSW = 1MHz
fSW = 250kHz
fSW = 500kHz
fSW = 125kHz
SUPPLY CURRENT
vs. TEMPERATURE AND FREQUENCY
(VIN = 12V)MAX5066 toc02b
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
CDH = CDL = 0fSW = 1MHz
fSW = 250kHz
fSW = 500kHz
fSW = 125kHz
SUPPLY CURRENT
vs. TEMPERATURE AND FREQUENCY
(VIN = 24V)MAX5066 toc02c
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
CDH = CDL = 0fSW = 1MHz
fSW = 250kHz
fSW = 500kHz
fSW = 125kHz
SUPPLY CURRENT
vs. OSCILLATOR FREQUENCYMAX5066 toc03
FREQUENCY (kHz)
SUPPLY CURRENT (mA)
CDH_ = CDL_ = 0
VIN = 24V
VIN = 5V
VIN = 12V
SUPPLY CURRENT
vs. DRIVER LOAD CAPACITANCEMAX5066 toc04
CLOAD (nF)
SUPPLY CURRENT (mA)2015105
CLOAD = CDH = CDL
REG LOAD REGULATIONMAX5066 toc05
IREG (mA)
REG
(V)8070605040302010
VIN = 12V
VIN = 24V
VIN = 5.5V
REG LINE REGULATIONMAX5066 toc06
VIN (V)
REG
(V)21191715131197
IREG = 0
IREG = 60mA
REF LOAD REGULATIONMAX5066 toc07
IREF (µA)
REF
(V)
VIN = 24V
VIN = 5V
VIN = 12V
Typical Operating Characteristics(Circuit of Figure 6, TA= +25°C, unless otherwise noted. VIN= 12V, VOUT1= 0.8V, VOUT2= 1.3V, fSW= 500kHz per phase.)
MAX5066
Configurable, Single-/Dual-Output, Synchronous
Buck Controller for High-Current Applications
MAX5066
Configurable, Single-/Dual-Output, Synchronous
Buck Controller for High-Current Applications
REF LINE REGULATIONMAX5066 toc08
VIN (V)
REF
(V)21191715131197
IREF = 200µA
IREF = 0
DRIVER RISE TIME
vs. LOAD CAPACITANCEMAX5066 toc09
CLOAD (nF)
tRISE
(ns)18141646810122
DRIVER FALL TIME
vs. LOAD CAPACITANCE
MAX5066 toc10
CLOAD (nF)
tFALL
(ns)18141646810122
HIGH-SIDE DRIVER RISE TIME
(VIN = 12V, CLOAD = 10nF)
MAX5066 toc11
DH_
2V/div
20ns/div
HIGH-SIDE DRIVER FALL TIME
(VIN = 12V, CLOAD = 10nF)MAX5066 toc12
DH_
2V/div
20ns/div
LOW-SIDE DRIVER RISE TIME
(VIN = 12V, CLOAD = 10nF)MAX5066 toc13
DL_
2V/div
20ns/div
Typical Operating Characteristics (continued)(Circuit of Figure 6, TA= +25°C, unless otherwise noted. VIN= 12V, VOUT1= 0.8V, VOUT2= 1.3V, fSW= 500kHz per phase.)
MAX5066
Configurable, Single-/Dual-Output, Synchronous
Buck Controller for High-Current Applications
LOW-SIDE DRIVER FALL TIME
(VIN = 12V, CLOAD = 10nF)MAX5066 toc14
DL_
2V/div
20ns/div
OUT1/OUT2 OUT-OF-PHASE WAVEFORMS
(VOUT1 = 0.8V, VOUT2 = 1.3V)MAX5066 toc15
OUT1
100mV/div
10µs/div
OUT2
100mV/div
LX2
10V/div
LX1
10V/div
TURN-ON/-OFF WAVEFORMS
(IOUT1 = IOUT2 = 10A)MAX5066 toc16
2ms/div
EN2
5V/div
EN1
5V/div
VOUT2
1V/div
VOUT1
1V/div
SHORT-CIRCUIT CURRENT WAVEFORMS
(VIN = 5V)MAX5066 toc17
200ms/div
IOUT2
10A/div
IOUT1
10A/div
Typical Operating Characteristics (continued)(Circuit of Figure 6, TA= +25°C, unless otherwise noted. VIN= 12V, VOUT1= 0.8V, VOUT2= 1.3V, fSW= 500kHz per phase.)
MAX5066
Configurable, Single-/Dual-Output, Synchronous
Buck Controller for High-Current Applications
Pin Description
PINNAMEFUNCTIONCSN2
Current-Sense Differential Amplifier Negative Input for Output2. Connect CSN2 to the negative
terminal of the sense resistor. The differential voltage between CSP2 and CSN2 is internally amplified
by the current-sense amplifier (AV(CS) = 36V/V).CSP2
Current-Sense Differential Amplifier Positive Input for Output2. Connect CSP2 to the positive terminal
of the sense resistor. The differential voltage between CSP2 and CSN2 is internally amplified by the
current-sense amplifier (AV(CS) = 36V/V).EAOUT2
Voltage Error-Amplifier Output2. Connect to an external gain-setting feedback resistor. The error-
amplifier gain determines the output voltage load regulation for adaptive voltage positioning. This
output also serves as the compensation network connection from EAOUT2 to EAN2. A resistive
network results in a drooped output voltage regulation characteristic. An integrator configuration
results in very tight output voltage regulation (see the Adaptive Voltage Positioning section).EAN2
Voltage Error-Amplifier Inverting Input for Output2. Connect a resistive divider from VOUT2 to EAN2 to
AGND to set the output voltage. A compensation network connects from EAOUT2 to EAN2. A
resistive network results in a drooped output-voltage-regulation characteristic. An integrator
configuration results in very tight output-voltage regulation (see the Adaptive Voltage Positioning
section).CLP2Current-Error Amplifier Output2. Compensate the current loop by connecting an R-C network from
CLP2 to AGND.REF3.3V Reference Output. Bypass REF to AGND with a minimum 0.1µF ceramic capacitor. REF can
source up to 200µA for external loads.RT/CLKIN
External Clock Input or Internal Frequency-Setting Connection. Connect a resistor from RT/CLKIN to
AGND to set the switching frequency. Connect an external clock at RT/CLKIN for external frequency
synchronization.AGNDAnalog GroundMODE
Mode Function Input. MODE selects between a single-output dual phase or a dual-output buck
regulator. When MODE is grounded, VEA1 and VEA2 connect to CEA1 and CEA2, respectively (see
Figure 1) and the device operates as a two-output, out-of-phase buck regulator. When MODE is
connected to REG (logic high), VEA2 is disconnected and VEA1 is routed to both CEA1 and CEA2.CLP1Current-Error Amplifier Output1. Compensate the current loop by connecting an R-C network from
CLP1 to AGND.EAN1
Voltage Error Amplifier Inverting Input for Output1. Connect a resistive divider from VOUT1 to EAN1 to
regulate the output voltage. A compensation network connects from EAOUT1 to EAN1. A resistive
network results in a drooped output-voltage-regulation characteristic. An integrator configuration
results in very tight output voltage regulation (see the Adaptive Voltage Positioning section).EAOUT1
Voltage Error Amplifier Output1. Connect to an external gain-setting feedback resistor. The error
amplifier gain determines the output-voltage-load regulation for adaptive voltage positioning. This
output also serves as the compensation network connection from EAOUT1 to EAN1. A resistive
network results in a drooped output-voltage-regulation characteristic. An integrator configuration
results in very tight output-voltage regulation (see the Adaptive Voltage Positioning section).CSP1
Current-Sense Differential Amplifier Positive Input for Output1. Connect CSP1 to the positive terminal
of the sense resistor. The differential voltage between CSP1 and CSN1 is internally amplified by the
current-sense amplifier (AV(CS) = 36V/V).
MAX5066
Configurable, Single-/Dual-Output, Synchronous
Buck Controller for High-Current Applications
Detailed DescriptionThe MAX5066 switching power-supply controller can
be configured in two ways. With the MODE input high, it
operates as a single-output, dual-phase, step-down
switching regulator where each output is 180°out of
phase. With the MODE pin connected low, the
MAX5066 operates as a dual-output, step-down switch-
ing regulator. The average current-mode control topolo-
gy of the MAX5066 offers high-noise immunity while
having benefits similar to those of peak current-mode
control. Average current-mode control has the intrinsic
ability to accurately limit the average current sourced
by the converter during a fault condition. When a fault
condition occurs, the error amplifier output voltage
(EAOUT1 or EAOUT2) that connects to the positive
input of the transconductance amplifier (CA1 or CA2) is
clamped thus limiting the output current.
The MAX5066 contains all blocks necessary for two
independently regulated average current-mode PWM
regulators. It has two voltage error amplifiers (VEA1
and VEA2), two current-error amplifiers (CEA1 and
CEA2), two current-sensing amplifiers (CA1 and CA2),
two PWM comparators (CPWM1 and CPWM2), and dri-
vers for both low- and high-side power MOSFETs (see
Figure 1). Each PWM section is also equipped with a
pulse-by-pulse, current-limit protection and a fault inte-
gration block for hiccup protection.
Pin Description (continued)
PINNAMEFUNCTIONCSN1
Current-Sense Differential Amplifier Negative Input for Output1. Connect CSN1 to the negative
terminal of the sense resistor. The differential voltage between CSP1 and CSN1 is internally amplified
by the current-sense amplifier (AV(CS) = 36V/V).EN1Output 1 Enable. A logic-low shuts down channel 1’s MOSFET drivers. EN1 can be used for output
sequencing.BST1Boost Flying Capacitor Connection. Reservoir capacitor connection for the high-side MOSFET driver
supply. Connect a 0.47µF ceramic capacitor between BST1 and LX1.DH1High-Side Gate Driver Output1. DH1 drives the gate of the high-side MOSFET.LX1External inductor connection and source connection for the high-side MOSFET for Output1. LX1 also
serves as the return terminal for the high-side MOSFET driver.DL1Low-Side Gate Driver Output1. Gate driver output for the synchronous MOSFET.VDD
Supply Voltage for Low-Side Drivers. REG powers VDD. Connect a parallel combination of 0.1µF and
1µF ceramic capacitors from VDD to PGND and a 1Ω resistor from VDD to REG to filter out the high-
peak currents of the driver from the internal circuitry.REGInternal 5V Regulator Output. REG is derived internally from IN and is used to power the internal bias
circuitry. Bypass REG to AGND with a 4.7µF ceramic capacitor.INSupply Voltage Connection. Connect IN to a 5V to 28V input supply.PGNDPower Ground. Source connection for the low-side MOSFET. Connect VDD’s bypass capacitor returns
to PGND.DL2Low-Side Gate Driver Output2. Gate driver for the synchronous MOSFET.LX2External inductor connection and source connection for the high-side MOSFET for Output2. Also
serves as the return terminal for the high-side MOSFET driver.DH2High-Side Gate Driver Output2. DH2 drives the gate of the high-side MOSFET.BST2Boost Flying Capacitor Connection. Reservoir capacitor connection for the high-side MOSFET driver
supply. Connect a 0.47µF ceramic capacitor between BST2 and LX2.EN2Output 2 Enable. A logic-low shuts down channel 2’s MOSFET drivers. EN2 can be used for output
sequencing.EPExposed Pad. Connect exposed pad to ground plane.
MAX5066
Configurable, Single-/Dual-Output, Synchronous
Buck Controller for High-Current ApplicationsTwo enable comparators (CEN1 and CEN2) are avail-
able to control and sequence the two PWM sections
through the enable (EN1 or EN2) inputs. An oscillator,
with an externally programmable frequency generates
two clock pulse trains and two ramps for both PWM
sections. The two clocks and the two ramps are 180°
out of phase with each other.
A linear regulator (REG) generates the 5V to supply the
device. This regulator has the output-current capability
necessary to provide for the MAX5066’s internal circuit-
ry and the power for the external MOSFET’s gate dri-
vers. A low-current linear regulator (REF) provides a
precise 3.3V reference output and is capable of driving
loads of up to 200µA. Internal UVLO circuitry ensures
that the MAX5066 starts up only when VREGand VREF
are at the correct voltage levels to guarantee safe oper-
ation of the IC and of the power MOSFETs.
BST1
DH1
LX1
DL1
BST2
DH2
LX2
DL2
PGND
VDDCSP2CSN2CSP1CSN1
CA1EAN1REF
AGND8
EN115
EN228
CA2
CPWM1
CPWM2RT/CLKIN
CEA1
CEA2EAOUT1MODEEAOUT2CLP2CLP1INREG
1.225V
1.225V
THERMAL
SHUTDOWN
VDD
MUXEAN2
CEN1
VEA1
DF1 AND
HICCUP
LOGIC
EXTERNAL FREQUENCY SYNC
CONTROL
AND DRIVER
LOGIC 1
CONTROL
AND DRIVER
LOGIC 2
DF2 AND
HICCUP
LOGIC
OSCILLATOR
AND PHASE
SPLITTER
180°
2VP-P
RAMP
VREG = 5V
FOR INTERNAL
BIASING
UVLO
VREF = 3.3VUV33
VINTREF = 0.61V
VEA2
CEN2
2VP-P
RAMP
Figure 1. Block Diagram
MAX5066
Configurable, Single-/Dual-Output, Synchronous
Buck Controller for High-Current ApplicationsFinally, a thermal-shutdown feature protects the device
during thermal faults and shuts down the MAX5066
when the die temperature exceeds +160°C.
Dual-Output/Dual-Phase Select (MODE)The MAX5066 can operate as a dual-output indepen-
dently regulated buck converter, or as a dual-phase,
single-output buck converter. The MODE input selects
between the two operating modes. When MODE is
grounded (logic low), VEA1 and VEA2 connect to CEA1
and CEA2, respectively (see Figure 1) and the device
operates as a two-output DC-DC converter. When
MODE is connected to REG (logic high), VEA2 is dis-
connected and VEA1 is routed to both CEA1 and CEA2
and the device works as a dual-phase, single-output
buck regulator with each output 180°out of phase with
respect to each other.
Supply Voltage Connections (VIN/VREG)The MAX5066 accepts a wide input voltage range at IN
of 5V to 28V. An internal linear regulator steps down VIN
to 5.1V (typ) and provides power to the MAX5066. The
output of this regulator is available at REG. For VIN=
4.75V to 5.5V, connect IN and REG together externally.
REG can supply up to 65mA for external loads. Bypass
REG to AGND with a 4.7µF ceramic capacitor for high-
frequency noise rejection and stable operation.
REG supplies the current for both the MAX5066’s inter-
nal circuitry and for the MOSFET gate drivers (when
connected externally to VDD), and can source up to
65mA. Calculate the maximum bias current (IBIAS) for
the MAX5066:
where IINis the quiescent supply current into IN (4mA,
typ), QGQ1, QGQ2, QGQ3, QGQ4are the total gate
charges of MOSFETs Q1 through Q4 at VGS= 5V (see
Figure 6), and fSWis the switching frequency of each
individual phase.
Low-Side MOSFET Driver Supply (VDD)VDDis the power input for the low-side MOSFET dri-
vers. Connect the regulator output REG externally to
VDDthrough an R-C lowpass filter. Use a 1Ωresistor
and a parallel combination of 1µF and 0.1µF ceramic
capacitors to filter out the high peak currents of the
MOSFET drivers from the sensitive internal circuitry.
High-Side MOSFET Drive Supply (BST_)BST1 and BST2 supply the power for the high-side
MOSFET drivers for output 1 and output 2, respectively.
Connect BST1 and BST2 to VDDthrough rectifier
diodes D1 and D2 (see Figure 6). Connect a 0.1µF
ceramic capacitor between BST_ and LX_.
Minimize the trace inductance from BST_ and VDDto
rectifier diodes, D1 and D2, and from BST_ and LX_ to
the boost capacitors, C8 and C9 (see Figure 6). This is
accomplished by using short, wide trace lengths.
Undervoltage Lockout (UVLO)/
Power-On Reset (POR)/Soft-StartThe MAX5066 includes an undervoltage lockout
(UVLO) with hysteresis, and a power-on reset circuit for
converter turn-on and monotonic rise of the output volt-
age. The UVLO threshold monitors VREGand is inter-
nally set between 4.0V and 4.5V with 200mV of
hysteresis. Hysteresis eliminates “chattering” during
startup. Most of the internal circuitry, including the
oscillator, turns on when VREGreaches 4.5V. The
MAX5066 draws up to 4mA (typ) of current before
VREGreaches the UVLO threshold.
The compensation network at the current-error ampli-
fiers (CLP1 and CLP2) provides an inherent soft-start of
the output voltage. It includes (R14 and C10) in parallel
with C11 at CLP1 and (R15 and C12) in parallel with
C13 at CLP2 (see Figure 6). The voltage at the current-
error amplifier output limits the maximum current avail-
able to charge the output capacitors. The capacitor at
CLP_ in conjunction with the finite output-drive current
of the current-error amplifier yields a finite rise time for
the output current and thus the output voltage.
Setting the Switching Frequency (fSW)An internal oscillator generates the 180oout-of-phase
clock signals required for both PWM modulators. The
oscillator also generates the 2VP-Pvoltage ramps nec-
essary for the PWM comparators. The oscillator fre-
quency can be set from 200kHz to 2MHz by an external
resistor (RT) connected from RT/CLKIN to AGND (see
Figure 6). The equation below shows the relationship
between RTand the switching frequency:
where RRT is in ohms and fSW(PER PHASE)= fOSC/2.
Use RT/CLKIN as a clock input to synchronize the
MAX5066 to an external frequency (fRT/CLKIN). Applying
an external clock to RT/CLKIN allows each PWM section
to work at a frequency equal to fRT/CLKIN/2. An internal
comparator with a 1.6V threshold detects fRT/CLKIN. If
fRT/CLKINis present, internal logic switches from the
internal oscillator clock, to the clock present at
RT/CLKIN.RHzOSCRT×251010.IfQQQQBIASINSWGQGQGQGQ=+×+++ ()1234
