MAX5060ATI+T-MAX5061AUE Fast Delivery |IC PHOENIX CO.,LIMITED

MAX5061AUE ,0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC ControllersELECTRICAL CHARACTERISTICS (V = 5V, V = V (MAX5060 only), T = T = T to T , unless otherwise noted. ..
MAX5062AASA ,125V/2A, high-speed, half-bridge MOSFET driverFeatures♦ HIP2100/HIP2101 Pin Compatible (MAX5062A/The MAX5062/MAX5063/MAX5064 high-frequency,125V ..
MAX5062AASA ,125V/2A, high-speed, half-bridge MOSFET driverApplicationsPIN- TOPPART TEMP RANGETelecom Half-Bridge Power SuppliesPACKAGE MARKTwo-Switch Forward ..
MAX5062AASA+T ,125V/2A, High-Speed, Half-Bridge MOSFET DriversELECTRICAL CHARACTERISTICS(V = V = +8V to +12.6V, V = GND = 0V, BBM = open, T = -40°C to +125°C, un ..
MAX5062BASA ,125V/2A, high-speed, half-bridge MOSFET driverapplications.♦ Up to 125V Input OperationThese drivers are independently controlled and their♦ 8V t ..
MAX5063AASA ,125V/2A, high-speed, half-bridge MOSFET driverMAX5062/MAX5063/MAX506419-3502; Rev 0; 11/04125V/2A, High-Speed, Half-Bridge MOSFET Drivers
MAX9321BESA ,Differential PECL/ECL/LVPECL/LVECL Receiver/DriverApplicationsOrdering InformationPrecision Clock BufferPART TEMP RANGE PIN-PACKAGELow-Jitter Data Re ..
MAX9323EUP ,One-to-Four LVCMOS-to-LVPECL Output Clock and Data Driverfeatures low 150ps part-to-part skew, low♦ Consumes Only 25mA (max) Supply Current 11ps output-to-o ..
MAX9323EUP+ ,One-to-Four LVCMOS-to-LVPECL Output Clock and Data DriverELECTRICAL CHARACTERISTICS(V = 3.0V to 3.6V, outputs terminated with 50Ω ±1% to (V - 2V), CLK_SEL = ..
MAX9324EUP , One-to-Five LVPECL/LVCMOS Output Clock and Data Driver
MAX9324EUP+ ,One-to-Five LVPECL/LVCMOS Output Clock and Data DriverApplications*Future product—Contact factory for availability.**EP = Exposed paddle.Precision Clock ..
MAX9325EQI ,+2.375 V to +3.8 V, 2:8 differential LVPECL/LVECL/HSTL clock and data driverApplicationsFunctional Diagram appears at end of data sheet.Precision Clock DistributionLow-Jitter ..

MAX5060ATI+T-MAX5061AUE
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers
General Description
The MAX5060/MAX5061 pulse-width modulation (PWM)
DC-DC controllers provide high-output-current capability
in a compact package with a minimum number of exter-
nal components. These devices utilize an average-cur-
rent-mode control that enables optimal use of low
RDS(ON)MOSFETs, eliminating the need for external
heatsinks even when delivering high output currents.
Differential sensing (MAX5060) enables accurate control
of the output voltage, while adaptive voltage positioning
provides optimum transient response. An internal regula-
tor enables operation with 4.75V to 5.5V or 7V to 28V
input voltage ranges. The high switching frequency, up
to 1.5MHz, allows the use of low-output inductor values
and input capacitor values. This accommodates the use
of PC-board-embedded planar magnetics.
The MAX5060 features a clock output with 180°phase
delay to control a second out-of-phase converter for
lower capacitor ripple currents. The MAX5060 also limits
the reverse current if the bus voltage becomes higher
than the regulated output voltage. The MAX5060 is
specifically designed to limit current sinking when multi-
ple power-supply modules are paralleled. The
MAX5060/MAX5061 offer an adjustable 0.6V to 5.5V out-
put voltage. The MAX5060 offers an overvoltage protec-
tion, power-good signal, and an output enable function.
The MAX5060/MAX5061 operate over the automotive
temperature range (-40°C to +125°C). The MAX5060 is
available in a 28-pin thin QFN package while the
MAX5061 is available in a 16-pin TSSOP package.
Applications
Servers and Workstations
Point-of-Load Telecom DC-DC Regulators
Networking Systems
RAID Systems
High-End Desktop Computers
Features4.75V to 5.5V or 7V to 28V Input Voltage RangeAdjustable Output Voltage from 0.6V to 5.5VUp to 30A Output CurrentCan Parallel Outputs For Higher Output CurrentProgrammable Adaptive Output Voltage
PositioningTrue-Differential Remote Output Sensing
(MAX5060)Average-Current-Mode ControlSuperior Current Sharing Between Paralleled
ModulesAccurate Current Limit Eliminates MOSFET
and Inductor DeratingLimits Reverse Current Sinking in Paralleled
Modules (MAX5060)Programmable Switching Frequency from 125kHz
to 1.5MHzIntegrated 4A Gate DriversClock Output for 180°Out-of-Phase Operation
(MAX5060)Voltage Signal Proportional to Output Current for
Load Monitoring (MAX5060)Output Overvoltage Crowbar Protection
(MAX5060)Programmable Hiccup Current-Limit Threshold
and Response TimeOvertemperature Thermal Shutdown
MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
Ordering Information
Selector GuidePARTTEMP RANGEPIN-PACKAGEPKG
CODE
MAX5060ATI-40°C to +125°C28 TQFN-EP*T2855-3
MAX5060ETI-40°C to +85°C28 TQFN-EP*T2855-3
MAX5061AUE-40°C to +125°C16 TSSOP-EP*U16E-3
MAX5061EUE-40°C to +85°C16 TSSOP-EP*U16E-3
PARTOUTPUT
MAX5060
Average-Current-Mode DC-DC Controller
for 5V/12V/24V Input Bus with CLKOUT,
Load Monitoring, Overvoltage, EN Input,
SYNC Input, and PGOOD Output
MAX5061
Average-Current-Mode DC-DC Controller
for 5V/12V/24V Input with SYNC/ENABLE
Input
19-3583; Rev 2; 7/05
Pin Configurations appear at end of data sheet.
*EP = Exposed pad.
EVALUATION KIT
AVAILABLE
MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
IN to SGND.............................................................-0.3V to +30V
BST to SGND..........................................................-0.3V to +35V
DH to LX.......................................-0.3V to [(VBST- VLX_) + 0.3V]
DL to PGND (MAX5060).............................-0.3V to (VDD+ 0.3V)
DL to PGND (MAX5061).............................-0.3V to (VCC+ 0.3V)
BST to LX..................................................................-0.3V to +6V
VCCto SGND............................................................-0.3V to +6V
VCC, VDDto PGND...................................................-0.3V to +6V
SGND to PGND.....................................................-0.3V to +0.3V
Current Sink in PGOOD........................................................6mA
All Other Pins to SGND...............................-0.3V to (VCC+ 0.3V)
Continuous Power Dissipation (TA= +70°C)
16-Pin TSSOP (derate 21.3mW/°C above +70°C)*......1702mW
28-Pin TQFN (derate 34.5mW/°C above +70°C)*......2758mW
Operating Temperature Range
MAX5060A_ _ and MAX5061A_ _.................-40°C to +125°C
MAX5060E_ _ and MAX5061E_ _....................-40°C to +85°C
Maximum Junction Temperature.....................................+150°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
*Per JEDEC 51 standard.
ELECTRICAL CHARACTERISTICS
(VCC= 5V, VDD= VCC(MAX5060 only), TA= TJ= TMINto TMAX, unless otherwise noted. Typical specifications are at TA= +25°C.)
(Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
SYSTEM SPECIFICATIONS
Input Voltage RangeVINShort IN and VCC together for 5V input
operation4.755.50V
Quiescent Supply CurrentIQEN = VCC or SGND, not switching2.75.5mA
EfficiencyηILOAD = 20A, VIN = 12V, VOUT = 3.3V90%
OUTPUT VOLTAGE
No load, VCC = 4.75V to 5.5V,
fSW = 500kHz0.5940.60.606SENSE+ to SENSE- Accuracy
(MAX5060) (Note 2)
No load, VIN = 7V to 28V, fSW = 500kHz0.5940.60.606
Soft-Start TimetSS1024Clock
Cycles
No load, VCC = 4.75V to 5.5V,
no switching0.5910.60.606EAN Reference Voltage
(MAX5061)VREF
No load, VIN = 7V to 28V, no switching0.5910.60.606
STARTUP/INTERNAL REGULATOR
VCC Undervoltage LockoutUVLOVCC rising4.14.34.5V
VCC Undervoltage Lockout
Hysteresis200mV
VCC Output VoltageVIN = 7V to 28V, ISOURCE = 0 to 60mA4.855.15.30V
MOSFET DRIVERS
Output-Driver ImpedanceRONLow or high output,
ISOURCE/SINK = 20mA1.13Ω
Output-Driver Source/Sink CurrentIDH_, IDL_4A
Nonoverlap TimetNOCDH/DL = 5nF35ns
MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
ELECTRICAL CHARACTERISTICS (continued)
(VCC= 5V, VDD= VCC(MAX5060 only), TA= TJ= TMINto TMAX, unless otherwise noted. Typical specifications are at TA= +25°C.)
(Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
OSCILLATOR
Switching Frequency Range1251500kHz
RT = 500kΩ121125129
RT = 120kΩ495521547Switching FrequencyfSW
RT = 39.9kΩ151516201725
kHz
120kΩ ≤ RT ≤ 500kΩ-5+5Switching Frequency Accuracy40kΩ ≤ RT ≤ 120kΩ-8+8%
CLKOUT Phase Shift (MAX5060)φCLKOUTfSW = 125kHz180degrees
CLKOUT Output Low Level
(MAX5060)VCLKOUTLISINK = 2mA0.4V
CLKOUT Output High Level
(MAX5060)VCLKOUTHISOURCE = 2mA4.5V
SYNC Input-High Pulse WidthtSYNCRT/SYNC (MAX5060), RT/SYNC/EN
(MAX5061)200ns
SYNC Input Clock High ThresholdVSYNCHRT/SYNC (MAX5060), RT/SYNC/EN
(MAX5061)2.0V
SYNC Input Clock Low ThresholdVSYNCLRT/SYNC (MAX5060), RT/SYNC/EN
(MAX5061)0.4V
SYNC Pullup CurrentISYNC_OUTVRT/SYNC = 0V (MAX5060),
VRT/SYNC/EN = 0V (MAX5061)250750µA
SYNC Power-Off LevelVSYNC_OFF0.4V
CURRENT LIMIT
Average Current-Limit ThresholdVCLCSP to CSN24.026.928.2mV
Reverse Current-Limit ThresholdVCLRCSP to CSN (MAX5060)-3.2-2.3-0.1mV
Cycle-by-Cycle Current LimitCSP to CSN60mV
Cycle-by-Cycle Overload
Response TimeVCSP to VCSN = 75mV260ns
Hiccup Divider RatioLIM to VCM, no switching0.5470.5580.565V/V
Hiccup Reset Delay200ms
LIM Input ImpedanceLIM to SGND55.9kΩ
CURRENT-SENSE AMPLIFIER
CSP to CSN Input ResistanceRCS4kΩ
Common-Mode RangeVCMR(CS)VIN = 7V to 28V05.5V
Input Offset VoltageVOS(CS)0.1mV
Amplifier GainAV(CS)34.5V/V
3dB Bandwidthf3dB4MHz
MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
ELECTRICAL CHARACTERISTICS (continued)
(VCC= 5V, VDD= VCC(MAX5060 only), TA= TJ= TMINto TMAX, unless otherwise noted. Typical specifications are at TA= +25°C.)
(Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
CURRENT-ERROR AMPLIFIER (Transconductance Amplifier)
TransconductancegC550µS
Open-Loop GainAVOL(CE)No load50dB
DIFFERENTIAL VOLTAGE AMPLIFIER (DIFF, MAX5060 only)
Common-Mode Voltage RangeVCMR(DIFF)0+1.0V
DIFF Output VoltageVCMVSENSE+ = VSENSE- = 0V0.6V
Input Offset VoltageVOS(DIFF)-1+1mV
Amplifier GainAV(DIFF)0.99411.006V/V
3dB Bandwidthf3dBCDIFF = 20pF3MHz
Minimum Output-Current DriveIOUT(DIFF)4mA
SENSE+ to SENSE- Input
ResistanceRVSVSENSE- = 0V50100kΩ
V_IOUT AMPLIFIER (V_IOUT, MAX5060 only)
Gain-Bandwidth ProductVV_IOUT = 2.0V4MHz
3dB BandwidthVV_IOUT = 2.0V1.0MHz
Output Sink Current30µA
Output Source Current90µA
Maximum Load Capacitance50pF
V_IOUT Output to IOUT Transfer
Function
RSENSE = 1mΩ,
100mV ≤ V_IOUT ≤ 5.5V132.3135137.7mV/A
Offset Voltage1mV
VOLTAGE-ERROR AMPLIFIER (EAOUT)
Open-Loop GainAVOLEA70dB
Unity-Gain BandwidthfGBW3MHz
VEAN = 2.0V (MAX5060)
EAN Input Bias CurrentIB(EA)VEAN = 0.4V, VEAOUT = GND
(MAX5061)
-0.20.03+0.2µA
Error-Amplifier Output-Clamping
VoltageVCLAMP(EA)With respect to VCM (MAX5060),
with respect to SGND (MAX5061)883930976mV
POWER-GOOD AND OVERVOLTAGE PROTECTION (MAX5060 only)
PGOOD Trip LevelVUVPGOOD goes low when VOUT is below
this threshold87.59092.5%VOUT
PGOOD Output Low LevelVPGLOISINK = 4mA0.4V
PGOOD Output Leakage CurrentIPGPGOOD = VCC1µA
OVI Trip ThresholdOVPTHWith respect to SGND1.2441.2761.308V
OVI Input Bias CurrentIOVI0.2µA
MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
ELECTRICAL CHARACTERISTICS (continued)
(VCC= 5V, VDD= VCC(MAX5060 only), TA= TJ= TMINto TMAX, unless otherwise noted. Typical specifications are at TA= +25°C.)
(Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
ENABLE INPUTS
EN Input High Voltage (MAX5060)VENEN rising2.4372.52.562V
EN Input Hysteresis (MAX5060)0.28V
EN Pullup Current (MAX5060)IEN13.51516.5µA
RT/SYNC/EN Input High Voltage
Enable (MAX5061)VRT/SYNC/EN_H1.6V
RT/SYNC/EN Input Low Voltage
Disable (MAX5061)VRT/SYNC/EN_L0.4V
THERMAL SHUTDOWN
Thermal ShutdownTemperature rising+150°C
Thermal-Shutdown Hysteresis30°C
Note 1:Specifications at TA= +25°C are 100% tested. Specifications over the temperature range are guaranteed by design.
Note 2:Does not include an error due to finite error amplifier gain (see the Voltage-Error Amplifiersection).
EFFICIENCY vs. OUTPUT CURRENT
AND INPUT VOLTAGE
MAX5060 toc01
OUTPUT CURRENT (A)
(%)161214468102
VOUT = 3.3V
fSW = 250kHz
VIN = 5VVIN = 12V
EFFICIENCY vs. OUTPUT CURRENT
AND INPUT VOLTAGE
MAX5060 toc02
OUTPUT CURRENT (A)
(%)161214468102
VOUT = 0.6V
fSW = 250kHz
VIN = 5V
VIN = 12V
EFFICIENCY vs. OUTPUT CURRENT
MAX5060 toc03
OUTPUT CURRENT (A)
(%)161214468102
VIN = 24V
VOUT = 3.3V
fSW = 125kHz
EFFICIENCY vs. OUTPUT CURRENT
AND OUTPUT VOLTAGE
MAX5060 toc04
OUTPUT CURRENT (A)
(%)161214468102
VIN = 12V
fSW = 250kHz
VOUT = 5V
VOUT = 3.3V
VOUT = 0.6V
VOUT = 1V
VOUT = 1.8V
EFFICIENCY vs. OUTPUT CURRENT
AND OUTPUT VOLTAGE
MAX5060 toc05
OUTPUT CURRENT (A)
(%)161214468102
VIN = 5V
fSW = 500kHz
VOUT = 3.3V
VOUT = 1.8V
VOUT = 1V
VOUT = 0.6V
SUPPLY CURRENT (IQ) vs. FREQUENCY
MAX5060 toc06
FREQUENCY (kHz)
SUPPLY CURRENT (mA)
EXTERNAL CLOCK
NO DRIVER LOAD
VIN = 12V
VIN = 24V
VIN = 5V
SUPPLY CURRENT vs. TEMPERATURE
MAX5060 toc07
TEMPERATURE (°C)
SUPPLY CURRENT (mA)3510-15
VIN = 12V
fSW = 250kHz
CDL/CDH = 22nF
CURRENT-SENSE THRESHOLD
vs. OUTPUT VOLTAGE
MAX5060 toc08
VOUT (V)
CSP
- V
CSN
) (mV)321
VIN = 12V
fSW = 250kHz
HICCUP CURRENT LIMIT vs. REXT
MAX5060 toc09
REXT (MΩ)
CURRENT LIMIT (A)1284
VIN = 12V
fSW = 250kHz
R1 = 1mΩ
VOUT = 1.5V
MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
Typical Operating Characteristics
(TA = +25°C, Figures 1 and 2, unless otherwise noted.)
LOW-SIDE DRIVER (DL) SINK
AND SOURCE CURRENT
MAX5060 toc16
3A/div
100ns/div
CLOAD = 22nF
VIN = 12Vypical Operating Characteristics (continued)
(TA = +25°C, Figures 1 and 2, unless otherwise noted.)
OUTPUT VOLTAGE vs. OUTPUT CURRENT
AND ERROR AMPLIFIER GAIN (RF/RIN)
MAX5060 toc10
OUTPUT CURRENT (A)
OUTPUT VOLTAGE (V)161214468102
VIN = 12V
fSW = 250kHz
VOUT = 1.5V
RF/RIN = 40
RF/RIN = 10
RF/RIN = 20
V_IOUT VOLTAGE vs. LOAD CURRENT
MAX5060 toc11
LOAD CURRENT (A)
V_IOUT
(V)105
VOUT = 3.3V
R1 = 1mΩ
MAX5060
VIN = 12V
VIN = 7V
VIN = 24V
VCC LOAD REGULATION
vs. INPUT VOLTAGE
MAX5060 toc12
VCC LOAD CURRENT (mA)
(V)
VIN = 12V
VIN = 5V
VIN = 24V
DRIVER RISE TIME
vs. DRIVER LOAD CAPACITANCE
MAX5060 toc13
CAPACITANCE (nF)
(ns)16116
VIN = 12V
fSW = 250kHz
DRIVER FALL TIME
vs. DRIVER LOAD CAPACITANCE
MAX5060 toc14
CAPACITANCE (nF)
tF (ns)16116
VIN = 12V
fSW = 250kHz
HIGH-SIDE DRIVER (DH) SINK
AND SOURCE CURRENT
MAX5060 toc15
2A/div
100ns/div
CLOAD = 22nF
VIN = 12V
HIGH-SIDE DRIVER (DH) RISE TIME
MAX5060 toc17
2V/div
40ns/div
CLOAD = 22nF
VIN = 12V
HIGH-SIDE DRIVER (DH) FALL TIME
MAX5060 toc18
2V/div
40ns/div
CLOAD = 22nF
VIN = 12V
MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
REVERSE CURRENT SINK
vs. TEMPERATURE
MAX5060 toc25
TEMPERATURE (°C)
SINK CURRENT (A)3510-15
VIN = 12V
V0UT = 1.5V
R1 = 1mΩ
VEXTERNAL = 3.3V
VEXTERNAL = 2V
LOW-SIDE DRIVER (DL) RISE TIME
MAX5060 toc19
2V/div
40ns/div
CLOAD = 22nF
VIN = 12V
LOW-SIDE DRIVER (DL) FALL TIME
MAX5060 toc20
2V/div
40ns/div
CLOAD = 22nF
VIN = 12V
OUTPUT RIPPLE
MAX5060 toc21
50mV/div
1μs/div
VIN = 12V
VOUT = 1.5V
IOUT = 20A
INPUT STARTUP RESPONSE
MAX5060 toc22
VOUT
2V/div
2ms/div
VIN = 12V
VOUT = 1.5V
IOUT = 20AVPGOOD
5V/div
VIN
5V/div
ENABLE STARTUP RESPONSE
MAX5060 toc23
VOUT
2V/div
2ms/div
VIN = 12V
VOUT = 1.5V
IOUT = 20A
VPGOOD
5V/div
VEN
2V/div
LOAD-TRANSIENT RESPONSE
MAX5060 toc24
100μs/div
VIN = 12V
VOUT = 3.3V
ISTEP = 5A TO 20A
SLEW = 2A/μs
VOUT
200mV/div
IOUT
10A/div
REVERSE CURRENT SINK AT INPUT TURN-ON
(VIN = 12V, VOUT = 1.5V, VEXTERNAL = 2.0V)
MAX5060 toc26
200μs/div
2A/div
REVERSE CURRENT SINK AT INPUT TURN-ON
(VIN = 12V, VOUT = 1.5V, VEXTERNAL = 3.3V)
MAX5060 toc27
200μs/div
5A/divypical Operating Characteristics (continued)
(TA = +25°C, Figures 1 and 2, unless otherwise noted.)
MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
ypical Operating Characteristics (continued)(TA = +25°C, Figures 1 and 2, unless otherwise noted.)
REVERSE CURRENT SINK AT ENABLE TURN-ON
(VIN = 12V, VOUT = 1.5V, VEXTERNAL = 2.0V)
MAX5060 toc28
200μs/div
2A/div
REVERSE CURRENT SINK AT ENABLE TURN-ON
(VIN = 12V, VOUT = 1.5V, VEXTERNAL = 3.3V)
MAX5060 toc29
200μs/div
5A/div
FREQUENCY vs. RT
MAX5060 toc30
RT (kΩ)
fSW
(kHz)
10,000
VIN = 12V
FREQUENCY vs. TEMPERATURE
MAX5060 toc31
TEMPERATURE (°C)
fSW
(kHz)3510-15
VIN = 12V
OUTPUT SHORT-CIRCUIT WAVEFORM
MAX5060 toc32
40ms/div
VOUT
2V/div
VIN = 12VCEN = 0.47μF
VOUT = 3.3VRLIM = OPEN
2V/div
IOUT
10A/div
SYNC, CLKOUT, AND LX WAVEFORM
MAX5060 toc33
1μs/div
CLKOUT
5V/div
VIN = 12V
fSW = 250kHz
10V/div
SYNC
5V/div
MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
Pin Description
PIN
MAX5060MAX5061NAMEFUNCTIONPGNDPower Ground. Connect PGND, low-side synchronous MOSFET’s source, and
VDD (MAX5060)/VCC (MAX5061) bypass capacitor returns together.
2, 78N.C.No Connection. Not internally connected.DLLow-Side Gate-Driver Output. Synchronous MOSFET gate driver.BST
Boost Flying-Capacitor Connection. Reservoir capacitor connection for the high-
side MOSFET driver supply. Connect a 0.47µF ceramic capacitor between BST
and LX.LXInductor Connection. Source connection for the high-side MOSFETs. Also serves
as the return terminal for the high-side driver.DHHigh-Side Gate-Driver Output. Drives the gate of the high-side MOSFET.
8, 22, 2516SGNDSignal Ground. Ground connection for the internal control circuitry. Connect
SGND and PGND together at one point near the input bypass capacitor return.CLKOUTOscillator Output. Rising edge of CLKOUT is phase-shifted from rising edge of
DH by 180°.—PGOOD
Power-Good Output. PGOOD is an open-drain output that goes low when the
programmed output voltage falls out of regulation. The power-good comparator
threshold is 90% of the programmed output voltage.—EN
Output Enable. Drive EN high or leave unconnected for normal operation. Drive
EN low to shut down the power drivers. EN has an internal 15µA pullup current.
Connect a capacitor from EN to SGND to program the hiccup mode duty cycle.—RT/SYNC
Switching Frequency Programming and Chip-Enable Input. Connect a resistor
from RT/SYNC to SGND to set the internal oscillator frequency. Drive RT/SYNC
externally to synchronize the switching frequency with system clock.—V_IOUTVoltage-Source Output Proportional to the Output Load Current. The voltage at
V_IOUT is 135 x ILOAD x RS.10LIM
Current-Limit Setting Input. Connect a resistor from LIM to SGND to set the
hiccup current-limit threshold. Connect a capacitor from LIM to SGND to ignore
short output overcurrent pulses.—OVI
Overvoltage Protection Circuit Input. Connect OVI to DIFF. When OVI exceeds
+12.7% above the programmed output voltage, DH is latched low and DL is
latched high. Toggle EN low to high or recycle the power to reset the latch.11CLPCurrent-Error-Amplifier Output. Compensate the current loop by connecting an
RC network to ground.
MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
Pin Description (continued)
PIN
MAX5060MAX5061NAMEFUNCTION12EAOUT
Voltage-Error-Amplifier Output. Connect to the external gain-setting feedback
resistor. The error-amplifier gain-setting resistors determine the amount of
adaptive voltage positioning.13EAN
Voltage-Error-Amplifier Inverting Input. Receives a signal from the output of the
differential remote-sense amplifier (MAX5060). Connect the center tap of the
resistor-divider from the output to SGND (MAX5061).—DIFFDifferential Remote-Sense Amplifier Output. DIFF is the output of a precision
unity-gain amplifier whose inputs are SENSE+ and SENSE-.14CSN
Current-Sense Differential Amplifier Negative Input. The differential voltage
between CSN and CSP is amplified internally by the current-sense amplifier
(gain = 34.5) to measure the inductor current.15CSP
Current-Sense Differential Amplifier Positive Input. The differential voltage
between CSP and CSN is amplified internally by the current-sense amplifier
(gain = 34.5) to measure the inductor current.—SENSE-Differential Output-Voltage-Sensing Negative Input. SENSE- is used to sense a
remote load. Connect SENSE- to VOUT- or PGND at the load.—SENSE+
Differential Output-Voltage-Sensing Positive Input. SENSE+ is used to sense a
remote load. Connect SENSE+ to VOUT+ at the load. The device regulates the
difference between SENSE+ and SENSE- according to the preset reference
voltage of 0.6V.1INSupply Voltage Connection. Connect IN to VCC for a +5V system.2VCC
Internal +5V Regulator Output. VCC is derived from the IN voltage. Bypass VCC
to SGND with 4.7µF and 0.1µF ceramic capacitors. For MAX5061, connect an
additional 0.1µF bypass capacitor from VCC to PGND.—VDD
Supply Voltage for Low-Side and High-Side Drivers. Connect a parallel
combination of 0.1µF and 1µF ceramic capacitors to PGND and a 1Ω resistor to
VCC to filter out the high peak currents of the driver from the internal circuitry.RT/SYNC/EN
Switching Frequency Programming and Chip-Enable Input. Connect a resistor
from RT/SYNC/EN to SGND to set the internal oscillator frequency. Drive
RT/SYNC/EN externally to synchronize the switching frequency with system
clock. If RT/SYNC/EN is held low for 50µs, the device turns off the output drivers.EPExposed Paddle. Connect the exposed paddle to a copper pad (SGND) to
improve power dissipation.
MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
Typical Application Circuit
VIN
CSPR1Q1
C12
C10
C12C13
VOUT = 0.6V TO
5.5V AT 20A
C3–C7
BST
PGNDCLPSGND
CSN
VCC
VDD
LOAD
LIM
C1, C2SENSE-SENSE+
R13
MAX5060
PGOOD
PGOOD
RT/
SYNC
SYNC
R11
C11
EAOUT
DIFF
EAN
OVI
V_IOUTV_IOUT
(VOLTAGE α IOUT)
OFF
RIN
REXT
VIN = 12V
Figure 1. Typical Application Circuit, VIN= 12V (MAX5060)
MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
Typical Application Circuit (continued)
VIN
CSPR1Q1
C12C10C11
VOUT = 0.6V TO
5.5V AT 20A
C13–C16
BST
PGNDSGND
CSN
VCC
LOAD
RT/SYNC/EN
C1, C2
R13
MAX5061
EANEAOUT
SYNC
VCC
C7*C8
CLP
LIM
REXT
VIN = 12V
* USE C13 = 47pf AND C7 = 4.7μF/6.3V (CERAMIC).
OFF
RC2
C13*RC1
VCC
Figure 2. Typical Application Circuit, VIN= +12V (MAX5061)
MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
Block Diagram
2 x fS (V/s)
RAMP
RT/SYNC
CSP
CSN
SGND
SENSE-
SENSE+
CLP
LIM
VDD
BST
PGND
PGOOD
AV = 34.5
AV = 4
100kΩ
126.7kΩ
PWM
COMPARATOR
0.5V x VCC
TO INTERNAL
CIRCUITSHICCUP MODE
CURRENT LIMIT
V_IOUT
gm = 500μS
DIFF
CLKOUT
CLK
CPWM
CEA
VCLAMP
HIGH
VCLAMP
LOW
VCC
0.1 x VREF
+0.6V
VREF = 0.6V
VCM (0.6V)
OVP COMP
0.12 x VREF
LATCH
RAMP
GENERATOR
SOFT-
START
OSCILLATOR
CLEAR ON UVLO RESET OR
ENABLE LOW
OVP LATCH
DIFF
AMP
EAN
EAOUT
OVI
VEA
ERROR AMP
0.5 x VCLAMP
VCM
VCM
VCC
UVLO
POR
TEMP SENSOR
LDO
REGULATOR
MAX5060
Figure 3. Functional Diagram (MAX5060)
MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
Block Diagram (continued)
2 x fS (V/s)
RAMP
RT/SYNC/EN
CSP
CSN
CLK
SGND
CLP
LIM
VCCBST
PGND
AV = 34.5
100kΩ
126.7kΩ
PWM
COMPARATOR
0.5V x VCC
TO INTERNAL
CIRCUITSHICCUP MODE
CURRENT LIMIT
gm = 500μS
CPWM
CEA
VCLAMP
HIGH
VCC
VREF = 0.6V
RAMP
GENERATOR
SOFT-
START
OSCILLATOR
EAN
EAOUT
VEA
ERROR AMP
0.5 x VCLAMP
VCM
VCM
VCC
UVLO
POR
TEMP SENSOR
LDO
REGULATOR
MAX5061
Figure 4. Functional Diagram (MAX5061)
MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
Detailed Description
The MAX5060/MAX5061 are high-performance average-
current-mode PWM controllers. The average-current-
mode control technique offers inherently stable
operation, reduces component derating and size by
accurately controlling the inductor current. This also
improves the current-sharing accuracy when paralleling
multiple converters. The devices achieve high efficiency,
at high current (up to 30A) with a minimum number of
external components. The high- and low-side drivers
source and sink up to 4A for lower switching frequencies
while driving high-gate-charge MOSFETs.
The MAX5060’s CLKOUT output is 180°out-of-phase
with respect to the high-side driver. The CLKOUT drives
a second MAX5060 or a MAX5061 regulator out-of-
phase, reducing the input capacitor ripple current and
increasing the load current capacity. The paralleling
capability of the MAX5060/MAX5061 improves design
flexibility in applications requiring upgrades (higher load).
The MAX5060/MAX5061 consist of an inner average-
current-loop controlled by an outer-voltage-loop voltage-
error amplifier (VEA). The combined action of the inner
current loop and outer voltage loop corrects the output
voltage errors by adjusting the inductor current. The
inductor current is sensed across a current-sense resis-
tor. The differential amplifier (MAX5060) senses the out-
put right at the load for true-differential output voltage
sensing. The sensed voltage is compared against inter-
nal 0.6V reference at the error-amplifier input. The output
voltage can be set from 0.6V to 5.5V (IN ≥7V) using a
resistor-divider at SENSE+ and SENSE-.
IN, VCC, and VDD
The MAX5060/MAX5061 accept a 4.75V to 5.5V or 7V
to 28V input voltage range. All internal control circuitry
operates from an internally regulated nominal voltage
of 5V (VCC). For input voltages of 7V or greater, the
internal VCCregulator steps the voltage down to 5V.
The VCCoutput voltage is a regulated 5V output capa-
ble of sourcing up to 60mA. Bypass the VCCto SGND
with 4.7µF and 0.1µF low-ESR ceramic capacitors for
high-frequency noise rejection and stable operation.
The MAX5060 uses VDDto power the low-side and
high-side drivers, while the MAX5061 uses the VCCto
power internal circuitry as well as the low- and high-
side driver supply. In the case of the MAX5061, use
one or more 0.1µF low-ESR ceramic capacitors
between VCCand PGND to reject the noise spikes due
to high-current driver switching.
The TQFN-28 and TSSOP-16 are thermally enhanced
packages and can dissipate up to 2.7W and 1.7W,
respectively. The high-power packages allow the
high-frequency, high-current buck converter to oper-
ate from a 12V or 24V bus. Calculate power dissipa-
tion in the MAX5060/MAX5061 as a product of the
input voltage and the total VCCregulator output cur-
rent (ICC). ICCincludes quiescent current (IQ) and
gate-drive current (IDD):= VINx ICC
ICC= IQ+ [fSWx (QG1+ QG2)]
where QG1and QG2 are the total gate charge of the
low-side and high-side external MOSFETs at VGATE=
5V, IQis 3.5mA (typ), and fSWis the switching frequen-
cy of the converter.
Undervoltage Lockout (UVLO)
The MAX5060/MAX5061 include an undervoltage lock-
out with hysteresis and a power-on-reset circuit for con-
verter turn-on and monotonic rise of the output voltage.
The UVLO rising threshold is internally set at 4.35V with
a 200mV hysteresis. Hysteresis at UVLO eliminates
chattering during startup.
Most of the internal circuitry, including the oscillator,
turns on when the input voltage reaches 4V. The
MAX5060/MAX5061 draw up to 3.5mA of current
before the input voltage reaches the UVLO threshold.
Soft-Start
The MAX5060/MAX5061 has an internal digital soft-start
for a monotonic, glitch-free rise of output voltage. Soft-
start is achieved by the controlled rise of error amplifier
dominant input in steps using a 5-bit counter and a 5-bit
DAC. The soft-start DAC generates a linear ramp from 0
to 0.7V. This voltage is applied to the error amplifier at a
third (noninverting) input. As long as the soft-start volt-
age is lower than the reference voltage, the system will
converge to that lower reference value. Once the soft-
start DAC output reaches 0.6V, the reference takes over
and the DAC output continues to climb to 0.7V assuring
that it is out of the way of the reference voltage.

Partno	Mfg	Dc	Qty	Available	Descript
MAX5060ATI+T	MAXIM	N/a	11	avai	0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers
MAX5061AUE	MAXIM	N/a	23	avai	0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers