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MAX4983EEVB+-MAX4983EEVB+T-MAX4984EEVB+T
High-Speed USB 2.0 Switches with ±15kV ESD
General DescriptionThe MAX4983E/MAX4984E are high ESD-protected
analog switches that combine the low on-capacitance
and low on-resistance necessary for high-performance
switching applications. COM1 and COM2 are protected
against ±15kV ESD without latchup or damage. The
devices are ideal for USB 2.0 Hi-Speed applications at
480Mbps. The switches also handle all the require-
ments for USB low- and full-speed signaling.
The MAX4983E/MAX4984E double-pole/double-throw
(DPDT) switches are fully specified to operate from a
single +2.8V to +5.5V power supply and are protected
against a +5.5V short to COM1 and COM2. This feature
makes the MAX4983E/MAX4984E fully compliant with
the USB 2.0 specification of VBUS fault protection. The
devices feature low-threshold-voltage logic inputs, per-
mitting them to be used with low I/O voltage systems.
The MAX4983E features an active-low enable input
(EN) that when driven high sets the device in shutdown
mode. The MAX4984E features an active-high enable
input (EN) that when driven low sets the device in shut-
down mode. When the device is in shutdown mode, the
quiescent supply current is reduced to 0.1µA.
The MAX4983E/MAX4984E are available in a space-
saving, 10-pin, 1.4mm x 1.8mm UTQFN package, and
operate over a -40°C to +85°C temperature range.
Applications
FeaturesUSB Hi-Speed SwitchingESD Protection on COM
±15kV Human Body Model
±15kV IEC 61000-4-2 Air Gap
±8kV IEC 61000-4-2 ContactPower-Supply Range: +2.8V to +5.5VLow 5Ω(typ) On-Resistance (RON)-3dB Bandwidth: 950MHz (typ)Compatible with Logic I/O Down to 1.4VCOM Analog Inputs Fault Protected Against
Shorts to +5.5VLow Supply Current 0.6µA (typ)Enable Input:
Active-Low (EN) MAX4983E
Active-High (EN) MAX4984ESmall 10-Pin, 1.4mm x 1.8mm UTQFN
MAX4983E/MAX4984E
Hi-Speed USB 2.0 Switches
with ±15kV ESD19-4035; Rev 2; 9/08
EVALUATION KIT
AVAILABLE
Pin ConfigurationTOP VIEW
MAX4983E/
MAX4984E62
COM2
GND
COM1CB
VCC
UTQFNNO2NC2
NO1NC1
EN (EN)
(EN) FOR MAX4984E ONLY.
Cell Phones
PDAs
Digital Still Cameras
GPS
Notebook Computers
Video Switching
Bus Switches
USB 2.0
Hi-SPEED
TRANSMIT
TEMPLATEMAX4983E
MAX4984E
Eye Diagram
Note:All devices operate over the -40°C to +85°C extended
temperature range.
+Denotes a lead-free package.
PARTPIN-PACKAGETOP MARK
MAX4983EEVB+10 Ultra-Thin QFNAAA
MAX4984EEVB+10 Ultra-Thin QFNAAB
Ordering Information
MAX4983E/MAX4984E
Hi-Speed USB 2.0 Switches
with ±15kV ESD
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VCC= +2.8V to +5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC= +3.0V, TA= +25°C.) (Note 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND.)
VCC, COM_, NO_, NC_, EN, EN, CB....................-0.3V to +6.0V
Continuous Current into Any Terminal.............................±30mA
Continuous Power Dissipation (TA= +70°C)
10-Pin UTQFN (derate 6.9mW/°C above +70°C)........559mW
Junction-to-Case Thermal Resistance (θJC) (Note 1)
10-Pin UTQFN...........................................................20.1°C/W
Junction-to-Ambient Thermal Resistance (θJA) (Note 1)
10-Pin UTQFN........................................................143.1°C/W
Operating Temperature Range..........................-40°C to +85°C
Junction Temperature Range.........................................+150°C
Storage Temperature Range............................-65°C to +150°C
Lead Temperature (soldering 10s)..................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSp er ati ng P ow er - S up p l y Rang eVCC2.85.5V
VCC = 3.0V0.61.5Supply CurrentICCVCB = 0V or VCC,
VEN = 0V or VEN = VCCVCC = 5.5V36.5µA
Shutdown Supply CurrentISHDNSwitch disabled (VEN = VCC or VEN = 0V)0.1µA
Increase in Supply Current
with VCB, VEN Voltage
0 ≤ VCB ≤ VIL or VIH ≤ VCB ≤ VCC or 0 ≤ VEN
≤ VIL or VIH ≤ VEN ≤ VCC2µA
Analog Signal RangeVCOM, VNO,
VNCVEN = VCC or VEN = 0V (Note 3)0VCCV
Fault-Protection Trip ThresholdVFPCOM_ only, TA = +25°CVCC +
VCC +
0.8C C + V
VCOM = 0V to VCC510On-ResistanceRONVCOM = 3.6V, VCC = 3.0V5.5Ω
On-Resistance Match Between
ChannelsΔRONVCC = 3.0V, VCOM = 2V (Note 4)0.11Ω
On-Resistance FlatnessRFLATVCC = 3.0V, VCOM = 0V to VCC (Note 5)0.1Ω
VCC = 4.5V, VCOM = 0V or 4.5V,
VNO, VNC = 4.5V or 0V-250+250nA
Off-Leakage CurrentICOM(OFF)
VCC = 5.5V, VCOM = 0V or 5.5V,
VNO, VNC with 50µA sink current to GND180µA
On-Leakage CurrentICOM(ON)VCC = 5.5V, VCOM = 0V or 5.5V,
VNO, VNC = unconnected-250+250nA
AC PERFORMANCEOn-Channel -3dB BandwidthBWRL = RS = 50Ω, signal = 0dBm950MHz
f = 10MHz-48
f = 250MHz-20Off-IsolationVISO
VNO, VNC = 0dBm,
RL = RS = 50Ω
(Figure 1)f = 500MHz-17
Note 1:Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to /thermal-tutorial.
MAX4983E/MAX4984E
Hi-Speed USB 2.0 Switches
with ±15kV ESD
ELECTRICAL CHARACTERISTICS (continued)(VCC= +2.8V to +5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC= +3.0V, TA= +25°C.) (Note 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSf = 10MHz-73
f = 250MHz-54Crosstalk (Note 6)VCT
VNO, VNC = 0dBm,
RL = RS = 50Ω,
Figure 1f = 500MHz-33
LOGIC INPUTInput Logic-HighVIH1.4V
Input Logic-LowVIL0.5V
Input Leakage CurrentIIN-250+250nA
DYNAMICTurn-On TimetONV N O or V N C = 1.5V , RL = 300Ω , C L = 35p F,EN = V C C to 0V or V E N = 0V to V C C ( Fi g ur e 2) 20100µs
Turn-Off TimetOFFV N O or V N C = 1.5V , RL = 300Ω , C L = 35p F,E N = V C C to 0V or V EN = 0V to V C C ( Fi g ur e 2) 15µs
Propagation DelaytPLH, tPHLRL = RS = 50Ω, Figure 3100ps
Fault Protection Response
TimetFPVCOM = 0V to 5V step, RL = RS = 50Ω,
VCC = 3.3V (Figure 4)0.55.0µs
Fault Protection Recovery
TimetFPRVCOM = 5V to 0V step, RL = RS = 50Ω,
VCC = 3.3V (Figure 4)100µs
Output Skew Between
SwitchestSKS kew b etw een sw i tch 1 and 2, RL = RS = 50Ω ,Fi g ur e 3, N ote 7) 40ps
NO_ or NC_ Off-CapacitanceCNO(OFF) or
CNC(OFF)f = 1MHz (Figure 5, Note 7)2pF
f = 1MHz5.5COM Off-Capacitance
(Figure 5, Note 7)CCOM(OFF)f = 240MHz4.8pF
f = 1MHz6.5COM On-Capacitance
(Figure 5, Note 7)CCOM(ON)f = 240MHz5.5pF
Total Harmonic Distortion Plus
NoiseTHD+NVCOM = 1VP-P, VBIAS = 1V, RL = RS = 50Ω,
f = 20Hz to 20kHz0.03%
ESD PROTECTIONHuman Body Model±15
IEC 61000-4-2 Air-Gap Discharge±15COM1, COM2
IEC 61000-4-2 Contact Discharge±8
All PinsHuman Body Model±2
Note 2:All devices are 100% production tested at TA= +25°C. All temperature limits are guaranteed by design.
Note 3:The switch turns off for voltages above VFP, protecting downstream circuits in case of a fault condition.
Note 4:ΔRON(MAX)= ABS(RON(CH1) - RON(CH2)).
Note 5:Flatness is defined as the difference between the maximum and minimum value of on-resistance, as measured over specified
analog signal ranges.
Note 6:Between any two switches.
Note 7:Switch off-capacitance, switch on-capacitance, and output skew between switches are not production tested; guaranteed by
design.
MAX4983E/MAX4984E
Hi-Speed USB 2.0 Switches
with ±15kV ESD
Test Circuits/Timing DiagramsSWITCH IS ENABLED.
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
VOUT
NC1
COM1
NO1*
VIN
MAX4983E/
MAX4984E
OFF-ISOLATION = 20log VOUT
VIN
CROSSTALK = 20log VOUT
VIN
NETWORK
ANALYZER
50Ω
50Ω50Ω
50Ω
MEASREF
0V OR VCC
50Ω
*FOR CROSSTALK THIS PIN IS NO2.
NC2 AND COM2 ARE OPEN.
Figure 1. Off-Isolation and Crosstalk
tR < 5ns
tF < 5ns50%
VIL
LOGIC
INPUT
COM
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
VOUT = VIN_ ( RL ) RL + RON
VIN_
VIH
tOFF
OR NC
0.9 x V0UT0.1 x VOUT
tON
VOUT
SWITCH
OUTPUT
LOGIC
INPUT
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
VOUT
MAX4983E/
MAX4984E
EN (EN)
Figure 2. Switching Time
MAX4983E/MAX4984E
Hi-Speed USB 2.0 Switches
with ±15kV ESD
Test Circuits/Timing Diagrams (continued)VIN+
VIN-
VOUT+
VOUT-
VIN+
VIN-
VOUT+
VOUT-
NC1 OR
NO1
NC2 OR
NO2
COM1
COM2
VCC
VCC
VCC
VCC
tPLHXtPHLX
tINRISE
tOUTRISEtOUTFALL
tPLH = tPLHX OR tPLHY
tPHL = tPHLX OR tPHLY
tSK(O) = |tPLHX - tPLHY| OR |tPHLX - tPHLY|
tSK(P) = |tPLHX - tPHLX| OR |tPLHY - tPHLY|
50%
50%
50%
50%
90%
10%10%
90%
10%10%
50%
50%
50%
50%
tINFALL
90%
90%
tPHLYtPLHY
VIL TO VIH
MAX4983E/
MAX4984E
Figure 3. Output Signal Skew, Rise/Fall Time, Propagation Delay
MAX4983E/MAX4984E
Hi-Speed USB 2.0 Switches
with ±15kV ESDVFP
VCC = 3.3V
tFPtFPR
VCOM
VNO
VNC
MAX4983E/
MAX4984E
Figure 4. Fault-Protection Response/Recovery Time
Test Circuits/Timing Diagrams (continued)CAPACITANCE
METERNC_ OR
NO_
COM
CB VIL OR VIH
MAX4983E/
MAX4984E
Figure 5. Channel Off-/On-Capacitance
