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MAX4845ELT+T-MAX4845EYT+TC5Y-MAX4846ELT+
Overvoltage Protection Controllers with Low Standby Current
General DescriptionThe MAX4843–MAX4846 overvoltage protection con-
trollers protect low-voltage systems against high-voltage
faults of up to 28V. When the input voltage exceeds the
overvoltage threshold, these devices turn off a low-cost,
external n-channel FET(s) to prevent damage to the pro-
tected components. An internal charge pump eliminates
the need for external capacitors and drives the FET gate
for a simple, robust solution.
The overvoltage trip level is set to 7.4V (MAX4843),
6.35V (MAX4844), 5.8V (MAX4845), or 4.65V
(MAX4846). When the input voltage drops below the
undervoltage lockout (UVLO) threshold, the devices
enter a low standby current mode (10µA). The
MAX4843/MAX4844/MAX4845 have a UVLO threshold
of 4.15V, the MAX4845C/MAX4845D have a UVLO
threshold of 2.2V, and the MAX4846 has a UVLO
threshold of 2.5V. In addition to the single FET configu-
ration, the devices can be configured with back-to-
back external FETs to prevent currents from being
back-driven into the adapter.
An additional feature includes a ±15kV ESD-protected
input when bypassed with a 1µF capacitor to ground.
All devices are offered in small 6-pin µDFN (1.5mm x
1.0mm) and 6-pin ultra-thin LGA (MAX4845 and
MAX4846 only) (1.5mm x 1.0mm) packages and are
specified for operation over the -40°C to +85°C temper-
ature range.
ApplicationsCell Phones
Digital Still Cameras
PDAs and Palmtop Devices
MP3 Players
FeaturesOvervoltage Protection Up to 28VPreset 7.4V, 6.35V, 5.8V, or 4.65V Overvoltage Trip
LevelLow (10µA) Undervoltage Lockout Standby
CurrentDrives Low-Cost nMOSFETInternal 50ms Startup DelayInternal Charge PumpOvervoltage Fault FLAG Indicator6-Pin (1.5mm x 1.0mm) µDFN Package
MAX4843–MAX4846
Overvoltage Protection Controllers with
Low Standby CurrentTOP VIEW
MAX4843–
MAX4846
N.C.GATE
N.C.
GNDFLAGIN
μDFN354
MAX4845
MAX4846
N.C.GATE
N.C.
GNDFLAGIN
ULTRA-THIN LGA354
PARTPIN-
PACKAGE
UVLO
(V)
OVLO
(V)
TOP
MARK
MAX4843ELT 6 μDFN 4.15 7.40 BE
MAX4844ELT 6 μDFN 4.15 6.35 BF
MAX4845ELT 6 μDFN 4.15 5.80 BG
MAX4845EYT+T 6 UTLGA 4.15 5.80† AC
MAX4845CEYT+T 6 UTLGA 2.20 5.80† AP
MAX4845DEYT+T 6 UTLGA 2.20 5.80 AQ
MAX4846ELT 6 μDFN 2.50 4.65 BH
MAX4846EYT+T6 UTLGA 2.50 4.65 AD
Pin Configurations
Ordering InformationMAX4843–
MAX4846
OUTPUT
GATE
FLAG
VIOINGND
INPUT
+1.2V TO +28V
1μF
Typical Operating Circuit19-3649; Rev 5; 12/09
Note:All devices are specified over the -40°C to +85°C tem-
perature range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
†OVLO maximum is 6.0V for the MAX4845C and 5.9V for the
MAX4845D.
MAX4843–MAX4846
Overvoltage Protection Controllers with
Low Standby Current
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VIN= +5V for MAX4843/MAX4844/MAX4845, VIN= +4V for MAX4846, CGATE= 500pF, TA= -40°C to +85°C, unless otherwise
noted. Typical values are at TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
IN to GND ..............................................................-0.3V to +30V
GATE to GND ........................................................-0.3V to +12V
FLAG to GND ..........................................................-0.3V to +6V
Continuous Power Dissipation (TA= +70°C)
6-Pin µDFN (derate 2.1mW/°C above +70°C) .........167.7mW
6-Pin Ultra-Thin LGA (derate 2.1mW/°C
above +70°C) ...........................................................170.2mW
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature ....................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Soldering Temperature (reflow)
6-Pin µDFN...................................................................+240°C
6-Pin Ultra-Thin LGA....................................................+260°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSInput Voltage Range VIN1.2 28.0 V
MAX4843/MAX4844/MAX4845 3.9 4.15 4.4
MAX4845C/MAX4845D 1.8 2.2 2.5 Undervoltage Lockout Threshold UVLO VIN falling
MAX4846 2.3 2.5 2.7
MAX4843/MAX4844/MAX4845 41 Undervoltage Lockout
Hysteresis MAX4846 25
mV
MAX4843 7.0 7.4 7.8
MAX4844 6.0 6.35 6.7
MAX4845 5.5 5.8 6.1
MAX4845C 5.5 5.8 6.0
MAX4845D 5.5 5.8 5.9
Overvoltage Trip Level OVLO VIN rising
MAX4846 4.35 4.65 4.95
MAX4843 75
MAX4844 65
MAX4845 55 Overvoltage Lockout Hysteresis
MAX4846 50
mV
MAX4843/MAX4844/MAX4845 70 120 IN Supply Current IINMAX4846 60 110 μA
VIN= 3.8V MAX4843/MAX4844/MAX4845 10 22 UVLO Supply Current IUVLOVIN= 2.2V MAX4846 8 18 μA
MAX4843/MAX4844/MAX4845 9 9.83 10 Gate Voltage VGATE 1μA loadMAX4846 7.5 7.85 8.0 V
GATE Pulldown Current IPD VIN> OVLO, VGATE = 5.5V 10 27 mA
FLAG Output Low Voltage VOL ISINK = 1mA, FLAG deasserted 0.4 V
FLAG Leakage Current VFLAG = 5.5V, FLAG asserted 1 μA
MAX4843–MAX4846
Overvoltage Protection Controllers with
Low Standby Current
Note 1:All devices are 100% tested at +25°C. Electrical limits across the full temperature range are guaranteed by design and correlation.
ELECTRICAL CHARACTERISTICS (continued)(VIN= +5V for MAX4843/MAX4844/MAX4845, VIN= +4V for MAX4846, CGATE= 500pF, TA= -40°C to +85°C, unless otherwise
noted. Typical values are at TA= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
TIMINGStartup Delay tSTARTVIN= UVLO rising to VGATE = 0.3V rising
(Figure 1) 20 50 80 ms
FLAG Blanking Time tBLANKVGATE = 0.3V rising to VFLAG = 0.3V falling
(Figure 1) 20 50 80 ms
Gate Turn-On Time tGON
VGATE = 0.3V to 8V
(MAX4843/MAX4844/MAX4845),
VGATE = 0.3V to 7V (MAX4846) (Figure 1)
10 ms
Gate Turn-Off Time tGOFF
VIN rising at 1V/μs from 5V to 8V
(MAX4843/MAX4844/MAX4845)
or from 4V to 7V (MAX4846)
to VGATE = 0.3V (Figure 2)
6 20 μs
FLAG Assertion Delay tFLAG
VIN rising at 1V/μs from 5V to 8V
(MAX4843/MAX4844/MAX4845)
or from 4V to 7V (MAX4846), to VFLAG =
2.4V, RFLAG = 10k to 3V (Figure 2)
5.8 μs
Initial Overvoltage Fault Delay tOVP
VIN rising at 1V/μs from 0V to 9V, time from
VIN = 5V to IGATE = 80% of IPD
(Figure 3)
1.5 μs
Typical Operating Characteristics(VIN= +5V for MAX4843/MAX4844/MAX4845, VIN= +4V for MAX4846, TA= +25°C, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(MAX4843)MAX4843-46 toc01
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (2015105
REVERSE CURRENT vs. OUTPUT VOLTAGE
(MAX4843)
MAX4843-46 toc02
OUTPUT VOLTAGE (V)
REVERSE CURRENT (64532
BACK-TO-BACK FET
SINGLE FET
GATE VOLTAGE vs. INPUT VOLTAGE
(MAX4843/MAX4844/MAX4845)MAX4843-46 toc03
INPUT VOLTAGE (V)
GATE VOLTAGE (V)654
MAX4843MAX4844
MAX4845
MAX4843–MAX4846
Overvoltage Protection Controllers with
Low Standby Current
Typical Operating Characteristics (continued)(VIN= +5V for MAX4843/MAX4844/MAX4845, VIN= +4V for MAX4846, TA= +25°C, unless otherwise noted.)
GATE VOLTAGE vs. INPUT VOLTAGE
(MAX4846)MAX4843-46 toc04
INPUT VOLTAGE (V)
GATE VOLTAGE (V)432
GATE VOLTAGE vs. INPUT VOLTAGE
(MAX4843)MAX4843-46 toc05
INPUT VOLTAGE (V)
GATE VOLTAGE (V)654
GATE CURRENT = 0
GATE
CURRENT = 1μA
POWER-UP RESPONSEMAX4843-46 toc06
20ms/DIV
5V/DIVVIN
VGATE
VFLAG
5V/DIV
5V/DIV
POWER-UP RESPONSEMAX4843-46 toc07
20ms/DIV
5V/DIVVIN
VOUT
IIN
VFLAG
5V/DIV
1A/DIV
5V/DIV
OVERVOLTAGE RESPONSEMAX4843-46 toc08
4μs/DIV
5V/DIVVIN
VGATE
IGATE
VFLAG
10V/DIV
10mA/DIV
5V/DIV
POWER-UP OVERVOLTAGE RESPONSEMAX4843-46 toc09
20μs/DIV
5V/DIVVIN
VGATE
VFLAG
2V/DIV
5V/DIV
PIN
μDFNULTRA-
THIN LGA
NAMEFUNCTION1 1 IN Voltage Input. IN is both the power-supply input and the overvoltage sense input. Bypass IN
to GND with a 1μF capacitor or larger.
2 2 GND Ground
3 3 FLAG
Fault Indication Output. FLAG is asserted high during undervoltage lockout and overvoltage
lockout conditions. FLAG is deasserted during normal operation. FLAG is an open-drain
output.
4 4 GATE Gate-Drive Output. GATE is the output of an on-chip charge pump. When VUVLO < VIN < VOVLO,
GATE is driven high to turn on the external n-channel MOSFET(s).
Pin Description
MAX4843–MAX4846
Overvoltage Protection Controllers with
Low Standby Current
Functional DiagramFigure 2. Shutdown Timing Diagram
tOVP
80%
VIN
IGATE
VOVLO
MAX4843–MAX4846
GATE DRIVERGATE
FLAG
2x CHARGE
PUMP
5.5V
REGULATORIN
GND
UVLO AND
OVLO
DETECTORCONTROL
LOGIC AND
TIMER
tFLAG
tGOFF
0.3V
2.4V
VINVOVLO
VGATE
VFLAG
VUVLO
tGON
tBLANK
tSTART
0.3V
0.3V
VIN
VGATE
VFLAG
Figure 1. Startup Timing Diagram
Figure 3. Power-Up Overvoltage Timing Diagram
MAX4843–MAX4846
Overvoltage Protection Controllers with
Low Standby Current
Detailed DescriptionThe MAX4843–MAX4846 provide up to 28V overvoltage
protection for low-voltage systems. When the input volt-
age exceeds the overvoltage trip level, the
MAX4843–MAX4846 turn off a low-cost external n-chan-
nel FET(s) to prevent damage to the protected compo-
nents. An internal charge pump (see the Functional
Diagram) drives the FET gate for a simple, robust solu-
tion. On power-up, the device waits for 50ms before dri-
ving GATE high. The open-drain FLAG output is kept at
high impedance for an additional 50ms after GATE goes
high before deasserting. The FLAG output asserts high
immediately to an overvoltage fault.
Undervoltage Lockout (UVLO)The MAX4843/MAX4844/MAX4845 have a fixed 4.15V
typical UVLO level, the MAX4845C/MAX4845D have a
2.2V typical UVLO, and the MAX4846 has a 2.5V typi-
cal UVLO. When VINis less than the UVLO, the GATE
driver is held low and FLAG is asserted.
Overvoltage Lockout (OVLO)The MAX4843 has a 7.4V typical OVLO; the MAX4844
has a 6.35V typical OVLO; and the MAX4845 has a
5.8V typical OVLO. The MAX4846 has a 4.65V typical
overvoltage threshold. When VINis greater than OVLO,
the GATE driver is held low and FLAG is asserted.
FLAG OutputThe open-drain FLAG output is used to signal to the
host system that there is a fault with the input voltage.
FLAG asserts immediately to an overvoltage fault.
FLAG is held high for 50ms after GATE turns on before
deasserting. Connect a pullup resistor from FLAG to
the logic I/O voltage of the host system.
GATE DriverAn on-chip charge pump is used to drive GATE above
IN, allowing the use of low-cost n-channel MOSFETs. The
charge pump operates from the internal 5.5V regulator.
The actual GATE output voltage tracks approximately
two times VINuntil VINexceeds 5.5V or the OVLO trip
level is exceeded, whichever comes first. The
MAX4843 has a 7.4V typical OVLO, therefore GATE
remains relatively constant at about 10.5V for 5.5V <
VIN< 7.4V. The MAX4845 has a 5.8V typical OVLO, but
this can be as low as 5.5V. The GATE output voltage as
a function of input voltage is shown in the Typical
Operating Characteristics.
Device OperationThe MAX4843–MAX4846 have an on-board state
machine to control device operation. A flowchart is
shown in Figure 4. On initial power-up, if VIN< UVLO or
if VIN> OVLO, GATE is held at 0V, and FLAG is high.
If UVLO < VIN< OVLO, the device enters startup after
a 50ms internal delay. The internal charge pump is
enabled, and GATE begins to be driven above VINby
the internal charge pump. FLAG is held high during
startup until the FLAG blanking period expires, typically
50ms after the GATE starts going high. At this point the
device is in its on state.
At any time if VINdrops below UVLO or VINis greater
than OVLO, FLAG is driven high and GATE is driven
to ground.
TIME STARTS
COUNTING
OVLO CHECK
GATE = 0
FLAG = HIGH
VIN < OVLO
VIN < UVLO
VIN > UVLO
t = 50ms
t = 50ms
VIN > OVLO
STARTUP
GATE DRIVEN HIGH
FLAG = HIGH
GATE HIGH
FLAG = LOW
STANDBY
GATE = 0
FLAG = HIGH
Figure 4. State Diagram
