MAX4456CPL+ ,Low-Cost 4x4, 8x4, 8x8 Video Crosspoint SwitchesELECTRICAL CHARACTERISTICS(V+ = +5V, V- = -5V, V = +5V (internal load resistors on), V = V = V = 0V ..
MAX4456EPL+ ,Low-Cost 4x4, 8x4, 8x8 Video Crosspoint SwitchesELECTRICAL CHARACTERISTICS(V+ = +5V, V- = -5V, V = +5V (internal load resistors on), V = V = V = 0V ..
MAX4456EPL+ ,Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switchesapplications demanding36 SSOPMAX4360EAX -40°C to +85°C A36-2better DC specifications, see the MAX45 ..
MAX4460ESA ,SOT23 / 3V/5V / Single-Supply / Rail-to-Rail Instrumentation Amplifiers
MAX4460ESA+ ,SOT23, 3V/5V, Single-Supply, Rail-to-Rail Instrumentation Amplifiers
MAX4460ETT+ ,SOT23, 3V/5V, Single-Supply, Rail-to-Rail Instrumentation Amplifiers
MAX848ESE+ ,1-Cell-to-3-Cell, High-Power, Low-Noise, Step-Up DC-DC ConvertersELECTRICAL CHARACTERISTICS(V = 3.6V, GND = PGND = CLK/SEL = ON1 = ON2 = AINSEL = AIN1 = AIN2 = FB = ..
MAX848ESE+T ,1-Cell-to-3-Cell, High-Power, Low-Noise, Step-Up DC-DC ConvertersApplicationstion ensures that the switching noise spectrum is limitedto the 300kHz fundamental and ..
MAX848ESE-T ,1-Cell-to-3-Cell, High-Power, Low-Noise, Step-Up DC-DC ConvertersFeaturesThe MAX848/MAX849 boost converters set a new stan- ♦ Up to 95% Efficiencydard of high effic ..
MAX849ESE ,1-Cell to 3-Cell / High-Power / Low-Noise / Step-Up DC-DC ConvertersMAX848/MAX84919-1095; Rev 2; 12/971-Cell to 3-Cell, High-Power,Low-Noise, Step-Up DC-DC Converters
MAX8505EEE ,3A, 1MHz, 1% Accurate, Internal Switch Step-Down Regulator with Power-OKfeatures 1% accurate output over load,line, and temperature variations. Adjustable soft-start is♦ F ..
MAX8505EEE+ ,3A, 1MHz, 1% Accurate, Internal Switch Step-Down Regulator with Power-OKfeatures current-limit, short-circuit, andthermal-overload protection and enables a ruggeddesign. O ..
MAX4359EAX+-MAX4360EAX+-MAX4360EAX+T-MAX4456CPL+-MAX4456EPL+
Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switches
General DescriptionThe MAX4359/MAX4360/MAX4456 low-cost video cross-
point switches are designed to reduce component count,
board space, design time, and system cost. Each con-
tains a matrix of T-switches that connect any of their four
(MAX4359) or eight (MAX4360/MAX4456) video inputs to
any of their buffered outputs, in any combination. Each
matrix output is buffered by an internal, high-speed
(250V/µs), unity-gain amplifier that is capable of driving
400Ωand 20pF at 2.6VP-P. For applications requiring
increased drive capability, buffer the MAX4359/
MAX4360/MAX4456 outputs with the MAX4395 quad,
operational amplifier.
The MAX4456 has a digitally controlled 8x8 switch matrix
and is a low-cost pin-for-pin compatible alternative to the
popular MAX456. The MAX4359/MAX4360 are similar to
the MAX4456, with the 8x8 switch matrix replaced by a
4x4 (MAX4359) or an 8x4 (MAX4360) switch matrix.
Three-state output capability and internal, programmable
active loads make it feasible to parallel multiple devices
to form larger switch arrays. The inputs and outputs are
on opposite sides, and a quiet power supply or digital
input line separates each channel, which reduces
crosstalk to -70dB at 5MHz. For applications demanding
better DC specifications, see the MAX456 8x8 video
crosspoint switch.
________________________
Applications
FeaturesEight (MAX4456) or Four (MAX4359/MAX4360)
Internal Buffers
250V/µs Slew Rate
Three-State Output Capability
Power-Saving Disable Feature
65MHz -3dB BandwidthRoutes Any Input Channel to Any Output ChannelSerial or Parallel Digital InterfaceExpandable for Larger Switch Matrices80dB All-Channel Off-Isolation at 5MHz70dB Single-Channel CrosstalkStraight-Through Pinouts Simplify LayoutLow-Cost Pin-Compatible Alternative to
MAX456 (MAX4456)
MAX4359/MAX4360/MAX4456
Low-Cost 4x4, 8x4, 8x8
Video Crosspoint SwitchesOUTPUT
SELECT
4x4
(8x4)
T-SWITCH
MATRIX
MAX4395
4 INPUT CHANNELS
(8 INPUT CHANNELS)
D1/SER OUT
D0/SER IN
INPUT
SELECT
SERIAL
I/O
MAX4359
(MAX4360)
LATCH
75Ω
75Ω
AV = +2
Z0 = 75Ω
Z0 = 75Ω(MAX4360)
OUTPUT
SELECT
8x8
T-SWITCH
MATRIX
MAX4395
8 INPUT CHANNELS
D1/SER OUTD0/SER IN
INPUT
SELECT
SERIAL
I/O
MAX4456
LATCH
75Ω
75Ω
AV = +2
MAX4395
AV = +2
PARTTEMP RANGEPIN-
PACKAGE
PKG
CODE
MAX4359EAX-40°C to +85°C36 SSOPA36-2
MAX4359EWG-40°C to +85°C24 SOW24-2
MAX4360EAX-40°C to +85°C36 SSOPA36-2
MAX4456CPL0°C to +70°C40 Plastic DIPP40-1
MAX4456CQH0°C to +70°C44 PLCCQ44-1
MAX4456EPL-40°C to +85°C40 Plastic DIPP40-1
MAX4456EQH-40°C to +85°C44 PLCCQ44-1
_________________________________________________
Typical Application Circuits19-1389; Rev 2; 2/07
High-Speed Signal
Routing
Video-On-Demand
Systems
Video Test Equipment
Video Conferencing
Security Systems
Ordering Information
Pin Configurations appear at end of data sheet.
MAX4359/MAX4360/MAX4456
Low-Cost 4x4, 8x4, 8x8
Video Crosspoint Switches
DC ELECTRICAL CHARACTERISTICS(V+ = +5V, V- = -5V, VLOAD= +5V (internal load resistors on), VIN_= VAGND= VDGND= 0V, TA= TMINto TMAX, unless otherwisenoted.
Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PARAMETERCONDITIONSMINTYPMAXUNITSMAX4359/MAX43602032
Offset Voltage Drift20µV/°C
Buffer Offset VoltageTA= +25°C±1±15
Supply Current, All Buffers On
(no external load)mA
Supply Current, All Buffers Off1.65mA
Power-Supply Rejection Ratio±4.5V to ±5.5V5064dB
Operating Supply VoltageInferred from PSRR test±4.5±5.5V
0.991.01.01Voltage GainV/V
Analog Input Current±0.1±100nA
Output Leakage CurrentInternal load resistors off, all buffers off±100nA= TMINto TMAX±20mV
VLOAD= 5V250400600Internal Amplifier Load Resistor 200765Ω
Digital Input Current±1
Output Impedance at DC10Ω
Input-Logic Low Threshold0.8V
Input-Logic High Threshold2.4V
0.4VSerial mode,
VSER/PAR= 5V
Buffer Output Voltage SwingInternal load resistors on, no external load ±1.3V
Total Supply Voltage (V+ to V-)...........................................+12V
Positive Supply Voltage (V+) Referred to AGND.......-0.3V to +12V
Negative Supply Voltage (V-) Referred to AGND......-12V to +0.3V
DGND to AGND..................................................................±0.3V
Buffer Short Circuit to Ground when
Not Exceeding Package Power Dissipation.............Indefinite
Analog Input Voltage............................(V+ + 0.3V) to (V- - 0.3V)
Digital Input Voltage.............................(V+ + 0.3V) to (V- - 0.3V)
Input Current, Power On or Off
Digital Inputs.................................................................±20mA
Analog Inputs...............................................................±50mA
Continuous Power Dissipation (TA= +70°C)
36-Pin SSOP (derate 11.8mW/°C above +70°C)...........941mW
24-Pin SO (derate 11.8mW/°C above +70°C)................941mW
40-Pin Plastic DIP (derate 11.3mW/°C above +70°C)....889mW
44-Pin PLCC (derate 13.3mW/°C above +70°C).......1066mW
Operating Temperature Ranges
MAX4456C _ _....................................................0°C to +70°C
MAX4_ _ _E_ _.................................................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
ABSOLUTE MAXIMUM RATINGSInternal load resistors on,
no external load, VIN= 0 to 1V
IOL= 0.4mA
IOH= -0.4mA= +25°C= TMINto TMAX0.981.01.02
Input Voltage RangeInferred from swing test-1.31.3V
SER OUT Output-Logic Low/High
MAX44563950TA= TMINto TMAX= +25°C= TMINto TMAX= +25°C= TMINto TMAX= +25°C
MAX4359/MAX4360/MAX4456
Low-Cost 4x4, 8x4, 8x8
Video Crosspoint Switches
Note 1:See Dynamic Test Circuits section.
Note 2:3dB typical crosstalk improvement when RS = 0.
Note 3:Input test signal: 3.58MHz sine wave of amplitude 40IRE superimposed on a linear ramp (0 to 100IRE). IRE is a unit of
video-signal amplitude developed by the International Radio Engineers. 140IRE = 1.0V.
Note 4:Guaranteed by design.
PARAMETERCONDITIONSMINTYPMAXUNITSAll-Hostile Crosstalk5MHz, VIN= 2VP-P(Notes 1, 2)57dB
Output-Buffer Slew Rate
Internal load resistors on, 10pF load250V/µs
Single-Channel Crosstalk5MHz, VIN= 2VP-P(Note 1)70dB
All-Channel Off-Isolation5MHz, VIN= 2VP-P(Note 1)80dB
-3dB Bandwidth10pF load, VIN= 2VP-P(Note 1)35MHz
Differential Phase Error(Note 3)1.0degrees
Differential Gain Error(Note 3)0.5%
Input NoiseDC to 40MHz0.3mVRMS
Input CapacitanceAll buffer inputs grounded6pF
Buffer Input CapacitanceAdditional capacitance for each output buffer
connected to channel input2pF
Output CapacitanceOutput buffer off7pF
PARAMETERLatch Delay
SYMBOLMINTYP MAX80
UNITSSwitch Break-Before-Make DelaytON - tOFF15ns
LATCH Edge to Switch OfftOFF35ns
LATCH Edge to Switch OntON50ns
Write Pulse Width LowtWL80ns
Chip-Enable to Write SetuptCE0ns
Write Pulse Width HightWH80ns
Data HoldtDH0ns
Latch Pulse WidthtL80ns
CONDITIONSLATCH on
Parallel mode
Serial modeData SetuptDS160ns
SWITCHING CHARACTERISTICS(Figure 4, V+ = +5V, V- = -5V, VLOAD= +5V (internal load resistors on), VIN_= VAGND= VDGND= 0V, TA = TMINto TMAX, unless
otherwise noted. Typical values are at TA= +25°C.) (Note 4)
AC ELECTRICAL CHARACTERISTICS(V+ = +5V, V- = -5V, VLOAD= +5V (internal load resistors on), VAGND= VDGND= 0V, TA= +25°C, unless otherwise noted.)
Small-Signal -3dB Bandwidth10pF load, VIN= 100mVP-P(Note 1)65MHz
0.1dB Bandwidth10pF load, VIN= 100mVP-P(Note 1)4MHz
DYNAMIC SPECIFICATIONS
MAX4359/MAX4360/MAX4456
Low-Cost 4x4, 8x4, 8x8
Video Crosspoint Switches
Pin Description22Parallel Data Bit D0 when SER/PAR= GND. Serial
input when SER/PAR= VCC.
3, 53, 53, 5Output Buffer Address Lines
4, 6, 8, 104, 6, 8, 10
4, 6, 8, 10,
12, 14, 16,
Video Input Lines77
Asynchronous Control Line. When LOAD = VCC, all the
400Ωinternal active loads are on. When LOAD = GND,
external 400Ωloads must be used. The buffers must
have a resistive load to maintain stability.99
Digital Ground. DGND pins must have the same
potential and be bypassed to AGND. DGND should
be within ±0.3V of AGND.1111
When this control line is high, the 2nd-rank registers
are loaded with the rising edge of LATCH. If this con-
trol line is low, the 2nd-rank registers are transparent
when LATCH is low, passing data directly from the
1st-rank registers to the decoders.12–16, 18,
22–2622–26No connection. Not internally connected.1717Connect to VCCfor serial mode; connect to GND for
parallel mode.19, 3019, 30Negative Supply. All V- pins must be connected to each
other and bypassed to GND separately (Figure 2).2020
In serial mode, WR (write) shifts data into the input regis-
ter. In parallel mode, WR loads data into the 1st-rank
registers. Data is latched on the rising edge.2111Parallel Data Bit D1 when SER/PAR= GND. Serial out-
put for cascading multiple parts when SER/PAR= VCC.
D1/
SER OUT3
3, 4, 64, 5, 7
5, 7, 9, 11,
13, 15, 17,
6, 8, 10, 13,
15, 17, 19,9
10, 1211, 14161, 12, 23,20
20, 3422, 3824
D0/SER IN
IN_
LOAD
DGND
EDGE/
LEVEL
N.C.
SER/PAR
MAX4360MAX4456MAX4359
DIPPLCCSOSSOPSSOP
FUNCTIONNAME
PIN2121
If EDGE/LEVEL= VCC, data is loaded from the 1st-
rank registers to the 2nd-rank registers on the rising
edge of LATCH. If EDGE/LEVEL= GND, data is
loaded while LATCH = GND. In addition, data is
loaded during the execution of parallel-mode func-
tions 1011 through 1110, or if LATCH = VCCduring
the execution of the parallel-mode “software-latch”
command (1111).25LATCH
MAX4359/MAX4360/MAX4456
Low-Cost 4x4, 8x4, 8x8
Video Crosspoint Switches
Pin Description (continued)AGND
OUT_
18, 29, 4416, 26, 403836
31, 33, 3628, 30, 32
28, 30, 32,
35, 37, 39,
41, 43
25, 27, 29,
31, 33, 35,
37, 392423
Positive Supply. All V+ pins must be connected to each
other and bypassed to AGND separately (Figure 2).13, 363624
Parallel Data Bit D2 when SER/PAR= GND. Not used
when SER/PAR= VCC.343422
Parallel Data Bit when SER/PAR= GND. When
D3 = GND, D0–D2 specify the input channel to be con-
nected to specified buffer. When D3 = VCC, D0–D2
specify control codes. D3 is not used in serial mode
(SER/PAR= VCC).3220
Analog Ground. AGND must be at 0.0V, since the gain-
setting resistors of the buffers are connected to these
pins.
15, 292918
Buffer Outputs. Buffer inputs are internally grounded with
a 1000 or 1001 command from the D3–D0 lines.
28, 31, 33,
28, 31, 33,
17, 19, 21,
Active-High Chip Enable. WR is enabled when = GND and CE = VCC. WR is disabled when = VCCand CE = GND. 2716
Active-Low Chip Enable. WR is enabled when = GND and CE = VCC. WR is disabled when = VCCand CE= GND. ——
PLCCDIPSSOPSSOPSO
NAME
PIN
FUNCTIONMAX4456MAX4360MAX4359
MAX4359/MAX4360/MAX4456
Low-Cost 4x4, 8x4, 8x8
Video Crosspoint Switches
Detailed Description
Output BuffersThe MAX4456 video crosspoint switch consists of 64
T-switches in an 8x8 grid (Figure 1). The eight matrix
outputs are followed by eight wideband buffers opti-
mized for driving 400Ωand 20pF loads. The
MAX4359’s core is a 4x4 switch matrix with each of its
outputs followed by a wideband buffer. The MAX4360
has an 8x4 matrix and four output buffers. Each buffer
has an internal active load on the output that can be
readily shut off through the LOAD input (off when LOAD
= 0V). The shut-off is useful when two or more cross-
points are connected in parallel to create more input
channels. With more input channels, only one set of
buffers can be active and only one set of loads can be
driven. When active, the buffer must have either 1) an
internal load, 2) the internal load of another buffer in
another MAX4359/MAX4360/MAX4456, or 3) an exter-
nal load.
Each output can be disabled under logic control. When
a buffer is disabled, its output enters a high-impedance
state. In multichip parallel applications, the disable
function prevents inactive outputs from loading lines
driven by other devices. Disabling the inactive buffers
reduces power consumption.
The outputs connect easily to MAX4395 quad, opera-
tional amplifiers when back-terminated 75Ωcoaxial
cable must be driven.
A = +1
IN0IN1IN2IN3IN4IN5IN6IN7OUTPUT
BUFFERS
OUT0
400Ω
LOAD
LATCH
EDGE/LEVEL
2nd-RANK REGISTERS
1st-RANK REGISTERSA1A2D3D2V-AGNDDGND
D1/SER OUTD0/SER IN
SER/PAR
MAX4456
8x8
SWITCH
MATRIX
A = +1OUT7
400Ω
Figure 1. MAX4456 Functional Diagram
MAX4359/MAX4360/MAX4456
Low-Cost 4x4, 8x4, 8x8
Video Crosspoint Switches
Power-On RESETThe MAX4359/MAX4360/MAX4456 have an internal
power-on reset (POR) circuit that remains low for 5µs
after power is applied. POR also remains low if the total
supply voltage is less than 4V.
The POR disables all
buffer outputs at power-up, but the switch matrix isnot preset to any initial condition. The desired switch
state should be programmed before the buffer outputs
are enabled.
Digital InterfaceThe desired switch state can be loaded in a parallel-
interface mode or serial-interface mode (Table 3 and
Figures 4, 5, 6). All action associated with the WR line
occurs on its rising edge. The same is true for the
LATCH line if EDGE/LEVEL is high. Otherwise, the sec-
ond-rank registers update while LATCH is low (when
EDGE/LEVEL is low). WR is logically ANDed with CE
and CE (when present) to allow active-high or active-
low chip enable.
6-Bit Parallel-Interface Mode
(MAX4359/MAX4360)In the MAX4359/MAX4360’s parallel-interface mode
(SER/PAR= GND), the six data bits specify an output
channel (A1, A0) and the input channel to which it con-
nects (D3–D0). This data is loaded on the rising edge
of WR. The input channels are selected by codes 0000
through 0111 (D3–D0) for the MAX4360, and codes
0000 through 0011 (D3–D0) for the MAX4359. Note that
the MAX4359 does not use codes 0100 through 0111.
The eight codes 1000 through 1111 control other func-
tions, as listed in Table 1.
7-Bit Parallel-Interface Mode (MAX4456)In the MAX4456’s parallel-interface mode (SER/PAR=
GND), the seven data bits specify an output channel
(A2, A1, A0) and the input channel to which it connects
(D3–D0). This data is loaded on the rising edge of WR.
The input channels are selected by codes 0000
through 0111 (D3–D0) for the MAX4456. The remaining
eight codes 1000 through 1111 control other functions,
as listed in Table 1.
16-Bit Serial-Interface Mode
(MAX4359/MAX4360)In serial mode (SER/PAR= VCC), all first-rank registers
are loaded with data, making it unnecessary to specify
an output address (A1, A0). The input data format is
D3–D0, starting with OUT0 and ending with OUT3 for
16 total bits. For the MAX4360, only codes 0000
through 1010 are valid. For the MAX4359, only the
codes 0000 through 0011 and codes 1000 through
1010 are valid. Code 1010 disables a buffer, while
code 1001 enables it. After data is shifted into the 16-
bit first-rank register, it is transferred to the second rank
by LATCH (Table 2), which updates the switches.
Table 1. Parallel-Interface Mode FunctionsFor the MAX4359, unused codes.0100 and 0111
Do not use these codes in the parallel-interface mode. These codes are for the serial-
interface mode only.1001 and 1010
Send a pulse to the 2nd-rank registers to load them with the contents of the 1st-rank
registers. When latch is held high, this “software-LATCH” command performs the same
function as pulsing LATCH low.
Turn on all buffers, and restore the connected channels.1110
Turn off all buffers, and leave 2nd-rank registers unchanged.1101
Turn on the buffer selected by A2–A0 (MAX4456) or A1–A0 (MAX4359/MAX4360, and
restore the previously connected channel.1100
Shut off the buffer selected by A2–A0 (MAX4456) or A1–A0 (MAX4359/MAX4360) and
retain 2nd-rank registers contents.1011
Connect the buffer selected by A2–A0 (MAX4456) or A1–A0 (MAX4359/MAX4360) to
DGND. Note, if the buffer output is on, its output is its offset voltage.1000
Connect the buffer selected by A2–A0 (MAX4456) or A1–A0 (MAX4359/MAX4360) to the
input channel selected by D3–D0.0000 to 0111
FUNCTIOND3–D0A2, A1, A0Selects
Output
Buffer
MAX4359/MAX4360/MAX4456
Low-Cost 4x4, 8x4, 8x8
Video Crosspoint Switches
32-Bit Serial-Interface Mode (MAX4456)In serial mode (SER/PAR= VCC), all first-rank registers
are loaded with data, making it unnecessary to specify
an output address (A2, A1, A0). The input data format
is D3–D0, starting with OUT0 and ending with OUT7 for
32 total bits. Only codes 0000 through 1010 are valid.
Code 1010 disables a buffer, while code 1001 enables
it. After data is shifted into the 32-bit first-rank register,
it is transferred to the second rank by LATCH (Table 2),
which updates the switches.
Typical ApplicationFigure 2 shows a typical application of the MAX4456
(PDIP) with the MAX4395 quad, operational amplifiers
at the outputs to drive 75Ωloads. This application
shows the MAX4456 digital-switch control interface set
up in the 7-bit parallel mode. The MAX4456 uses seven
data lines and two control lines (WR and LATCH). Two
additional lines may be needed to control CE and
LOAD when using multiple MAX4456s.
The input/output information is presented to the chip at
A2, A1, A0, and D3–D0 by a parallel printer port. The
data is stored in the 1st-rank registers on the rising
edge of WR. When the LATCH line goes high, the
switch configuration is loaded into the 2nd-rank regis-
ters, and all eight outputs enter the new configuration at
the same time. Each 7-bit word updates only one out-
put buffer at a time. If several buffers are to be updat-
ed, the data is individually loaded into the 1st-rank reg-
isters. Then, a single LATCH pulse is used to reconfig-
ure all channels simultaneously.
The short BASIC program in Figure 3 loads programming
data into the MAX4456 from any IBM PC or compatible. It
uses the computer’s “LPT1” output to interface to the cir-
cuit, then automatically finds the address for LPT1 and
displays a table of valid input values to be used. The pro-
gram does not keep track of previous commands, but it
does display the last data sent to LPT1, which is written
and latched with each transmission. A similar application
is possible with the MAX4359/MAX4360.
SERIAL /PARALLEL
D3X
(A2), A1,Output
Buffer
Address
Output
Buffer
Address
Serial
Output
Parallel
Input
Parallel
Input
Parallel
Input
Parallel
Input
Serial Input
Parallel
Input
Parallel
Input
COMMENTSerial Mode
Parallel Mode,
D0–D2 = Control Code
Parallel Mode,
D0–D2 = Input Address
Table 3. Input/Output Line ConfigurationsX = Don’t care, H = 5V, L = 0V
( ) are for MAX4456 only.
Table 2. Serial-Interface Mode Functions
D3–D0FUNCTION0000 to 0111
Connect the selected buffer to the input
channel selected by D3–D0. Note that 0100
through 0111 are not valid for the MAX4359.
Connect the input of the selected buffer to
GND. Note: If the buffer output remains
on, its input is its offset voltage.
Turn on the selected buffer and connect
its input to GND. Use this code to turn on
buffers after power is applied. The default
power-up state is all buffers disabled.
Shut off the selected buffer at the speci-
fied channel, and erase data stored in the
2nd rank of registers. The 2nd rank now
holds the command word 1010.
1011 to 1111
Do not use these codes in the serial-inter-
face mode. They inhibit the latching of the
2nd-rank registers, which prevents proper
data loading.
Chip InformationMAX4359 TRANSISTOR COUNT: 2372
MAX4360 TRANSISTOR COUNT: 2372
MAX4456 TRANSISTOR COUNT: 3820
MAX4359/MAX4360/MAX4456
Low-Cost 4x4, 8x4, 8x8
Video Crosspoint SwitchesFigure 2. MAX4456 (plastic DIP) Typical Application Circuit28, 30, 32
10, 12
8 INPUT
VIDEO
CHANNELS
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
LATCH
D0/SER IN
D1/SER OUT
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
EDGE/LEVEL
LOAD
AGND
DGND
SER/PAR
+5V
+5V
-5V
-5V
ZO = 75
+5V
NOTE: ALL BYPASS CAPACITORS ARE 0.1μF CERAMIC
DB–25
MAX4395
75Ω
75Ω
200Ω
200Ω
ZO = 75
MAX4395
75Ω
75Ω
200Ω
200Ω
ZO = 75
MAX4395
75Ω
75Ω
200Ω
200Ω
ZO = 75
MAX4395
75Ω
75Ω
200Ω
200Ω
MAX4456
