MAX3969ETP ,200Mbps SFP Limiting AmplifierApplicationsMAX3969E/D** — Dice* —SFP/SFF Transceivers*Dice are designed to operate over a -40°C to ..
MAX396CAI+ ,Precision, 16-Channel/Dual 8-Channel, Low-Voltage, CMOS Analog MultiplexersFeaturesThe MAX396/MAX397 low-voltage, CMOS analog ● Pin-Compatible with MAX306/MAX307, DG406/DG4 ..
MAX396CPI ,Precision, 16-Channel/Dual 8-Channel, Low-Voltage, CMOS Analog MultiplexersFeaturesThe MAX396/MAX397 low-voltage, CMOS analog multi- ' Pin Compatible with MAX306/MAX307,plexe ..
MAX396CQI ,Precision, 16-Channel/Dual 8-Channel, Low-Voltage, CMOS Analog MultiplexersFeaturesThe MAX396/MAX397 low-voltage, CMOS analog multi- ' Pin Compatible with MAX306/MAX307,plexe ..
MAX396CWI ,Precision, 16-Channel/Dual 8-Channel, Low-Voltage, CMOS Analog MultiplexersFeaturesThe MAX396/MAX397 low-voltage, CMOS analog multi- ' Pin Compatible with MAX306/MAX307,plexe ..
MAX396CWI+ ,Precision, 16-Channel/Dual 8-Channel, Low-Voltage, CMOS Analog MultiplexersElectrical Characteristics—Dual Supplies(V+ = +5V ±10%, V- = -5V ±10%, GND = 0V, V = V = 2.4V, V = ..
MAX745EAP ,Switch-Mode Lithium-Ion Battery-ChargerApplicationsrefer to the MAX1647 and MAX1648. For a low-costlithium-ion charger using a linear-regu ..
MAX745EAP ,Switch-Mode Lithium-Ion Battery-ChargerFeaturesThe MAX745 provides all functions necessary for' Charges 1 to 4 Lithium-Ion Battery Cellsch ..
MAX745EAP+ ,Switch-Mode Lithium-Ion Battery-ChargerApplicationsMAX745C/D 0°C to +70°C Dice*MAX745EAP -40°C to +85°C 20 SSOPLi+ Battery PacksDesktop Cr ..
MAX745EAP+ ,Switch-Mode Lithium-Ion Battery-ChargerFeaturesThe MAX745 provides all functions necessary for ♦ Charges 1 to 4 Li+ Battery Cellscharging ..
MAX7461EUK ,Loss-of-Sync Alarm
MAX7461EUK+T ,Loss-of-Sync Alarm
MAX3969ETP
200Mbps SFP Limiting Amplifier
General DescriptionThe MAX3969 limiting amplifier with PECL data outputs is
ideal for low-cost ATM, Fast Ethernet, FDDI and ESCON
fiber optic receivers.
The MAX3969 features 1mVP-Pinput sensitivity and an
integrated power detector that senses the input signal
power. It provides a received-signal-strength indicator
(RSSI), which is an analog indication of the power level.
Signal strength is also indicated by the complementary
TTL loss-of-signal (LOS) outputs and the PECL signal-
detect (SD) output, both of which indicate the power
level relative to a programmable threshold.
The threshold can be adjusted to detect signal ampli-
tudes as low as 2.7mVP-P. An optional squelch function
disables switching of the data outputs by holding them
at a known state when the signal is below the pro-
grammed threshold.
The MAX3969 is available in die form and a 4mm x
4mm, 20-pin thin QFN package.
ApplicationsSFP/SFF Transceivers
Fast Ethernet/FDDI Transceivers
155Mbps LAN ATM Transceivers
ESCON Receivers
FTTx Transceivers
Features1mVP-PInput SensitivityLoss-of-Signal Detector with Programmable
ThresholdTTL LOS and PECL Signal DetectAnalog Received-Signal-Strength IndicatorOutput Squelch FunctionCompatible with 4B/5B Data Coding
MAX3969
200Mbps SFP Limiting Amplifier
Ordering Information
Typical Application Circuits19-3251; Rev 0; 4/04
*Dice are designed to operate over a -40°C to +100°C junction
temperature (TJ) range, but are tested and guaranteed only at= +25°C.
**Future product—contact factory for availability.
Typical Application Circuits continued at end of data sheet.
Pin Configuration appears at end of data sheet.
MAX3969
200Mbps SFP Limiting Amplifier
ABSOLUTE MAXIMUM RATINGSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Power-Supply Voltage Range (VCC, VCCO)..........-0.5V to +7.0V
Voltage at FILTER, RSSI, IN+, IN-, CZP, CZN, SQUELCH,
INV, VTH..................................................-0.5V to (VCC+ 0.5V)
TTL Output Current (LOS, LOS).........................................±9mA
PECL Output Current (OUT+, OUT-, SD).........................±50mA
Differential Voltage Between CZP and CZN..........-1.5V to +1.5V
Differential Voltage Between IN+ and IN-.............-1.5V to +1.5V
Continuous Power Dissipation (TA= +85°C)
20-Pin Thin QFN (derate 16.9mW/°C above +85°C)....1099mW
Operating Junction Temperature Range (die).....-40°C to +150°C
Die Attach Temperature...................................................+400°C
Storage Temperature Range.............................-50°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
ELECTRICAL CHARACTERISTICS(VCC= +2.97V to +5.5V, PECL outputs terminated with 50Ωto VCC- 2V, R1 = 100kΩ, TA= -40°C to +85°C, unless otherwise noted.
Typical values are at VCC= +3.3V, TA= +25°C.) (Note 1)
Note 2:LOS hysteresis = 20log(VLOS-DEASSERT/ VLOS-ASSERT).
Note 3:Relative to supply voltage (VCCO).
Note 4:AC characteristics are guaranteed by design and characterization.
Note 5:Input < LOS threshold (LOS = HIGH), VLOS= 2.4V.
Note 6:Pulse-width distortion = [(width of wider pulse) - (width of narrower pulse)] / 2, measured with 100Mbps 1-0 pattern.
MAX3969
200Mbps SFP Limiting Amplifier
Typical Operating Characteristics(VCC= +3.3V, PECL outputs terminated with 50Ωto VCC- 2V, R1 = 100kΩ, TA= +25°C, unless otherwise noted.)
200Mbps SFP Limiting Amplifierypical Operating Characteristics (continued)(VCC= +3.3V, PECL outputs terminated with 50Ωto VCC- 2V, R1 = 100kΩ, TA= +25°C, unless otherwise noted.)
MAX3969
200Mbps SFP Limiting Amplifier
Pin DescriptionFigure 1. Functional Diagram
Detailed DescriptionThe MAX3969 contains a series of limiting amplifiers
and power detectors, offset correction, data-squelch
circuitry, TTL buffers for LOS outputs, and PECL output
buffers for signal detect (SD) and data outputs. See
Figure 1 for the functional diagram.
Gain Stages and Offset CorrectionA cascade of limiting amplifiers provides approximately
65dB of combined small-signal gain. The large gain
makes the amplifier susceptible to small DC offsets in
the signal path. To correct DC offsets, the amplifier has
an internal feedback loop that acts as a DC autozero
circuit. By correcting the DC offsets, the limiting amplifi-
er sensitivity and power-detector accuracy are
improved.
The offset correction is optimized for data streams with
a 50% duty cycle. A different average duty cycle results
in increased pulse-width distortion and loss of sensitivi-
ty. The offset-correction circuitry is less sensitive to vari-
ations of input duty cycle (for example, the 40% to 60%
duty cycle encountered in 4B/5B coding) when the
input is less than 30mVP-P.
The data inputs must be AC-coupled for the offset cor-
rection loop to function properly. Differential input
impedance is >5kΩ.
MAX3969
Power DetectorEach amplifier stage contains a logarithmic FWD, which
indicates the RMS input signal power. The FWD outputs
are summed together at the FILTER pin where the sig-
nal is filtered by an external capacitor (CFILTER) con-
nected between FILTER and VCC. The FILTER signal
generates the RSSI output voltage (VRSSI), which is
proportional to the input power in decibels. When LOS
is low, VRSSIis approximated by the following equation:
VRSSI(V) = 1.2V + 0.5log (VIN)
where, VINis the data input voltage measured in mVP-P.
This relation translates to a 25mV increase in VRSSIfor
every 1dB increase in VIN. The RSSI output is reduced
approximately 120mV when LOS is high.
Typically the RSSI output is connected to an A/D con-
verter for diagnostic monitoring. This output can be left
open if not required in the application. The RSSI output
is designed to drive a minimum load resistance of 10kΩ
to ground, and a maximum capacitance of 10pF. A
10kΩseries resistor is required to buffer loads greater
than 10pF.
Signal-Strength ComparatorA comparator is used to indicate the input signal
strength relative to a user-programmable threshold.
One of the comparator inputs is connected to the RSSI
output signal, and the other is connected to the thresh-
old voltage (VTH), which is set externally and provides
a trip point for signal-strength indication. When the sig-
nal strength is above the threshold, the SD output
asserts high and the LOS output deasserts low.
Likewise, when the signal strength falls below the
threshold, SD deasserts low and LOS asserts high. To
ensure chatter-free operation, the comparator is
designed with approximately 5dB of hysteresis.
SquelchThe squelch function disables the data outputs by forc-
ing OUT- low and OUT+ high when the input signal is
below the programmed threshold. This function
ensures that when there is a loss of signal, the limiting
amplifier and all downstream devices do not respond to
input noise. Connect SQUELCH to GND or leave it
unconnected to disable squelch. Connect SQUELCH to
VCCto enable squelch.
PECL OutputsThe data outputs (OUT+, OUT-) and signal-detect out-
put (SD) are supply-referenced PECL outputs. See
Figure 2 for the equivalent output circuit.
Both data outputs must be terminated for proper opera-
tion, but the SD output can be left open if not required
in the application. The proper termination for a PECL
output is 50Ωto (VCC- 2V), but other standard termina-
tion techniques can be used. For more information on
PECL terminations and how to interface with other logic
families, refer to Maxim Application Note HFAN-01.0:
Introduction to LVDS, PECL, and CML.
TTL OutputsThe LOS outputs (LOS, LOS) are implemented with
open-collector, Schottky-clamped, ESD-protected, TTL-
compatible outputs. See Figure 3 for the equivalent out-
put circuit. The LOS outputs require external pullup
resistors for proper operation. Resistor values between
4.7kΩand 10kΩare recommended.
If the LOS outputs are not required for the application,
they can be left open.
Design Procedure
Program the Power-Detect ThresholdThe suggested procedure for setting the power-detect
threshold is given below and is illustrated in Figure 4.Determine the maximum receiver sensitivity
(RX_MAX) in dBm and the PIN-TIA responsivity (G)
in V/W.Calculate the differential voltage swing (VIN_SEN) at
the MAX3969 inputs while operating at sensitivity.
VIN_SEN= 10(RX_MAX / 10)x 2 x GCalculate the threshold voltage (VIN_TH) at which
LOS must be low (SD must be high) by allowing
3.6dB (1.8dB optical) margin for power-detector
accuracy.
VIN_TH= VIN_SENx 0.66Use VIN_THand the line labeled (SD HIGH / LOS
LOW) in the Power-Detect Threshold vs. R2 graph
in the Typical Operating Characteristicsto deter-
mine the value of R2. Select R1=100kΩ.
200Mbps SFP Limiting Amplifier
