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MAX3948ETE+T
11.3Gbps, Low-Power, DC-Coupled Laser Driver
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
General Description
The MAX3948 is a 3.3V, multirate, low-power laser diode
driver designed for Ethernet, Fibre Channel, and SONET
transmission systems at data rates up to 11.3Gbps. This
device is optimized to drive a differential transmitter
optical subassembly (TOSA) with a 25I flex circuit. The
unique design of the output stage enables DC-coupling
to unmatched TOSAs, thereby lowering transmitter power
consumption by more than 100mW.
The MAX3948 receives differential AC-coupled signals
with on-chip termination. It can deliver laser modula-
tion currents of up to 85mA at an edge speed of 26ps
(20% to 80%) into a 5I external differential load. The
device is designed to have a high-bandwidth differen-
tial signal path with on-chip back termination resistors
integrated into its outputs. An input equalization block
can be activated to compensate for SFP+/QSFP+ host
connector losses. The integrated DC circuit provides
programmable laser DC currents up to 61mA. Both the
laser DC current generator and the laser modulator can
be disabled from a single pin.
The device offers one dedicated pin (VSEL) to program up
to four channel addresses for multichannel applications.
The use of a 3-wire digital interface reduces the pin count
while permitting adjustment of input equalization, polar-
ity, output deemphasis, and modulation and DC currents
without the need for external components. The MAX3948
is available in a 3mm x 3mm, 16-pin TQFN package, and
is specified for the -40NC to +95NC extended temperature
range.
Applications
40GBASE-LR4 QSFP+ Optical Transceivers
10GBASE-LR SFP+ Optical Transceivers
10GBASE-LRM SFP+ Optical Transceivers
OC192-SR SFP+ SDH/SONET Transceivers
Benefits and Features
S Lowest Power Consumption 168mW Typical IC Power Dissipation at 3.3V
(LDMOD = 40mA, LDDC = 20mA) 383mW Total Transmitter Power Dissipation at 3.3V Including LDMOD = 40mA, LDDC = 20mA Enables < 1W Maximum Total SFP+ Module Power Dissipation Enables < 2.5W Maximum Total QSFP+ Module Power Dissipation
S Saves Board Space Small 3mm x 3mm Package DC-Coupling to the Laser Reduces External Component Count
S Flexibility Operate Up to Four MAX3948 ICs Over Single 3-Wire Digital Interface Programmable Modulation Current Up to 85mA (5ω Load) Programmable DC Current Up to 61mA (Translates to Up to 100mA Laser Bias Current) Programmable Input Equalization and Output
Deemphasis
S Safety Supports SFF-8431 SFP+ MSA and SFF-8472 Digital Diagnostic Integrated Eye Safety Features with Maskable
Faults DC Current Monitor
Ordering Information appears at end of data sheet.
EVALUATION KIT AVAILABLE
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
VCC, VCCT ............................................................-0.3V to +4.0V
|VCC - VCCT| .....................................................................< 0.5V
Voltage Range at TIN+, TIN-, DISABLE,
SDA, SCL, CSEL, VSEL, FAULT, and BMON ......-0.3V to VCC
Voltage Range at VOUT and TOUTC .......0.4V to (VCCT - 0.4V)
Voltage Range at TOUTA ...........(VCCT - 1.3V) to (VCCT + 1.3V)
Current Range into TIN+ and TIN- ..................-20mA to +20mA
Current Range into VOUT .................................-2mA to +90mA
Current into TOUTC and TOUTA ..................................+150mA
Continuous Power Dissipation (TA = +70NC)
TQFN (derate 20.8mW/NC above +70NC)...............1666.7mW
Storage Temperature Range ..........................-55NC to +150NC
Die Attach Temperature .................................................+400NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
TQFN
Junction-to-Ambient Thermal Resistance (BJA) ..........48NC/W
Junction-to-Case Thermal Resistance (BJC) ...............10NC/W
ABSOLUTE MAXIMUM RATINGS
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS(Note 1)
ELECTRICAL CHARACTERISTICS
(VCC = VCCT = 2.95V to 3.63V, TA = -40NC to +95NC; typical values are at VCC = VCCT = 3.3V, TA = +25NC, LDDC = 20mA, LDMOD
= 40mA, and 14I single-ended electrical output load, unless otherwise noted. See Figure 1 for electrical setup.) (Note 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
POWER SUPPLY
Power-Supply CurrentICCExcludes output current through the exter-
nal pullup inductors (Note 3)5162mA
Power-Supply VoltageVCCT, VCC2.953.63V
POWER-ON RESET
VCC for Enable High2.552.75V
VCC for Enable Low2.32.45V
DATA INPUT SPECIFICATION
Input Data Rate110.311.3Gbps
Differential Input VoltageVIN
Launch amplitude into FR4 transmission
line P 12in,
SET_TXEQ[1:0] = 01b,
SET_TXEQ[1:0] = 11b
VP-PSET_TXEQ[1:0] = 01b,
SET_TXEQ[1:0] = 11b,
outside of optimized range
SET_TXEQ[1:0] = 00b0.151.0
Common-Mode Input VoltageVCM2.15V
Differential Input ResistanceRIN75100125I
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
ELECTRICAL CHARACTERISTICS (continued)
(VCC = VCCT = 2.95V to 3.63V, TA = -40NC to +95NC; typical values are at VCC = VCCT = 3.3V, TA = +25NC, LDDC = 20mA, LDMOD
= 40mA, and 14I single-ended electrical output load, unless otherwise noted. See Figure 1 for electrical setup.) (Note 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Differential Input S-Parameters
(Note 4)
SCD110.1GHz P f P 11.3GHz-40SDD11f P 4.1GHz-19
4.1GHz P f P 11.3GHz-16
SCC111GHz P f P 11.3GHz, ZCM_SOURCE = 25W-15
DC CURRENT GENERATOR (Note 5, Figure 3)
Maximum DC DAC CurrentIDCMAXCurrent into VOUT pin5061mA
Minimum DC DAC CurrentIDCMINCurrent into VOUT pin2.5mA
DC-Off CurrentIDC-OFF0.1mA
DC DAC LSB Size116FA
DC DAC Integral NonlinearityINL2.5mA P IDC P 50mA±0.5%FS
DC DAC Differential NonlinearityDNLGuaranteed monotonic at 8-bit resolution,
SET_IDC[8:1]±0.5LSB
DC Current DAC Stability2.5mA P IDC P 50mA, VVOUT = VCCT - 1.5V
(Notes 6, 7)14%
DC Compliance Voltage at VOUTVCCT
- 2
VCCT
- 1.5
VCCT
- 1V
BMON Current GainGBMONGBMON = IBMON/IDC, external resistor to
GND defines voltage1516.720mA/A
BMON Current Gain Stability2.5mA P IDC P 50mA, VVOUT = VCCT - 1.5V
(Notes 6, 7)1.55%
Compliance Voltage at BMON01.8V
LASER MODULATOR (Note 8)
Maximum Laser Modulation
CurrentLDMODMAXCurrent into TOUTC pin, 5I laser load,
6.25% deemphasis85mAP-P
Minimum Laser Modulation
CurrentLDMODMINCurrent into TOUTC pin, 5I laser load,
6.25% deemphasis10mAP-P
Modulation-Off Laser CurrentLDMOD-
OFFCurrent into TOUTC pin0.1mA
Modulation DAC Full-Scale
CurrentIMOD-FS99.7130mA
Modulation DAC LSB Size247FA
Modulation DAC Integral
NonlinearityINL±1%FS
Modulation DAC Differential
NonlinearityDNLGuaranteed monotonic at 8-bit resolution,
SET_IMOD[8:1]±0.5LSB
TOUTA and TOUTC
Instantaneous Output
VTOUTAWith external inductive pullup to VCCTVCCT - 1VCCT + 1
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
ELECTRICAL CHARACTERISTICS (continued)
(VCC = VCCT = 2.95V to 3.63V, TA = -40NC to +95NC; typical values are at VCC = VCCT = 3.3V, TA = +25NC, LDDC = 20mA, LDMOD
= 40mA, and 14I single-ended electrical output load, unless otherwise noted. See Figure 1 for electrical setup.) (Note 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Modulation Output TerminationROUT192531I
Modulation Current DAC Stability10mA P LDMOD P 85mA,
VVOUT = VCCT - 1.5V (Notes 6, 7)1.54%
Modulation Current Rise/Fall
TimetR, tF20% to 80%, 10mA P LDMOD P 85mA
(Note 6)2636ps
Deterministic Jitter (Note 6)DJ
10mA P LDMOD P 85mA, 8.5Gbps with
K28.5 pattern 4
psP-P10mA P LDMOD P 85mA, 10.3125Gbps
(Note 9)612
10mA P LDMOD P 85mA, 11.3Gbps
(Note 9)813
Random JitterRJ10mA P LDMOD P 85mA (Note 6)0.190.55psRMS
Differential S-Parameters
(Note 4)
SCC22
0.1GHz P f P 4.1GHz, ZCM_SOURCE =
12.5W-104.1GHz < f P 11.3GHz, ZCM_SOURCE =
12.5W-6
SDD220.1GHz< f P 11.3GHz, ZDIFF_SOURCE =
50W-13
SAFETY FEATURES
Threshold Voltage at VOUT
Fault never occurs for VVOUT R VCCT - 2V,
fault always occurs for VVOUT < VCCT -
2.8V, referenced to VCCT
VCCT -
VCCT
- 2
Fault never occurs for VVOUT R 1.7V, fault
always occurs for VVOUT < 1.35V,
referenced to GND,
SET_IMOD[8:6] = 111b
Fault never occurs for VVOUT R 0.57V, fault
always occurs for VVOUT < 0.43V,
referenced to GND,
SET_IMOD[8:6] = 000b
Threshold Voltage at TOUTCFault never occurs for VTOUTC R 0.48V,
fault always occurs for VTOUTC < 0.35V0.350.48V
Threshold Voltage at TOUTA
Fault never occurs for VTOUTA R VCCT -
1.45V, fault always occurs for VTOUTA <
VCCT - 1.88V
VCCT -
VCCT -
1.45V
Threshold Voltage at VCCTFault never occurs for VCCT R VCC - 0.15V,
fault always occurs for VCCT < VCC - 0.4V
VCC -
VCC -
0.15V
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
ELECTRICAL CHARACTERISTICS (continued)
(VCC = VCCT = 2.95V to 3.63V, TA = -40NC to +95NC; typical values are at VCC = VCCT = 3.3V, TA = +25NC, LDDC = 20mA, LDMOD
= 40mA, and 14I single-ended electrical output load, unless otherwise noted. See Figure 1 for electrical setup.) (Note 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
TIMING REQUIREMENTS (Notes 5, 6, 8)
Initialization TimetINIT
LDDC = 25mA, LDMOD = 65mA, DC and
modulation DAC are both H0x00, time from
TX_EN = high to LDDC and LDMOD at 90%
of steady state
250ns
DISABLE Assert TimetOFF
Time from rising edge of DISABLE input
signal to LDDC and LDMOD at 10% of
steady state (Note 6)75ns
DISABLE Negate TimetONTime from falling edge of DISABLE to LDDC
and LDMOD at 90% of steady state (Note 6)250600ns
FAULT Reset Time tRECOVER
Time from negation of latched fault using
DISABLE to LDDC and LDMOD at 90% of
steady state
250600ns
FAULT Assert TimetFAULTTime from fault to FAULT = high, CFAULT ≤
20pF, RFAULT = 4.7kW0.73Fs
DISABLE to Reset TimeTime DISABLE must be held high to reset
fault4Fs
DIGITAL I/O SPECIFICATIONS (SDA, SCL, CSEL, FAULT, DISABLE)
Input High VoltageVIH1.8VCCV
Input Low VoltageVIL00.8V
Input HysteresisVHYST80mV
Input CapacitanceCIN5pF
DISABLE Input ResistanceRPULLInternal pullup resistor4.77.510kI
Input Leakage Current
(DISABLE)
IIHInput connected to VCC10FAIILInput connected to GND440775
Input Leakage Current (SDA)
IIHInput connected to VCC-2+2IILInput connected to GND; internal pullup is
75kW typical3575
Input Leakage Current (SCL,
CSEL)
IIHInput connected to VCC; internal pulldown
is 75kW typical3575
IILInput connected to GND-2+2
Output High Voltage (SDA,
FAULT)VOHExternal pullup is (4.7kI to 10kI) to VCCVCC - 0.1V
Output Low Voltage (SDA,
FAULT)VOLExternal pullup is (4.7kI to 10kI) to VCC0.4V
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
Note 2: Specifications at TA = -40NC and +95NC are guaranteed by design and characterization.
Note 3: VOUT is connected to 1.9V. TOUTA is connected to VCCT through pullup inductors, and TOUTC is connected to VOUT
through pullup inductors.
Note 4: Measured with Agilent 8720ES + ATN-U112A and series RC (39I and 0.3pF) between TOUTC and TOUTA (Figure 1).
Note 5: LDDC = IDC + IMOD x (DE + R x (1 - DE)/(50 + R)/2), where LDDC is the effective laser DC current, IDC is the DC DAC
current, IMOD is the modulation DAC current, DE is the deemphasis percentage, and R is the differential laser load resis-
tance. Example: For R = 5I and DE = 6.25%, LDDC = IDC + 0.105 x IMOD.
Note 6: Guaranteed by design and characterization.
Note 7: Stability is defined as [(IMEASURED) - (IREFERENCE)]/(IREFERENCE) over the listed current/temperature range and VCCT =
VCC = VCCREF Q5%, VCCREF = 3.3V. Reference current measured at VCCREF and TREF = +25NC.
Note 8: LDMOD = IMOD x (1 - DE) x 50/(50 + R), where LDMOD is the effective laser modulation current, IMOD is the modulation
DAC current, DE is the deemphasis percentage, and R is the differential laser load resistance. Example: For RI = 5 and
DE = 6.25%, LDMOD = 0.852 x IMOD.
Note 9: Equivalent 223 - 1 PRBS pattern = 27 - 1 PRBS + 72 zeros + 27 - 1 PRBS + 72 ones.
ELECTRICAL CHARACTERISTICS (continued)
(VCC = VCCT = 2.95V to 3.63V, TA = -40NC to +95NC; typical values are at VCC = VCCT = 3.3V, TA = +25NC, LDDC = 20mA, LDMOD
= 40mA, and 14I single-ended electrical output load, unless otherwise noted. See Figure 1 for electrical setup.) (Note 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
3-WIRE DIGITAL INTERFACE TIMING CHARACTERISTICS (Figure 5)
SCL Clock FrequencyfSCL4001000kHz
SCL Pulse-Width HightCH500ns
SCL Pulse-Width LowtCL500ns
SDA Setup TimetDS100ns
SDA Hold TimetDH100ns
SCL Rise to SDA Propagation
TimetD5ns
CSEL Pulse-Width LowtCSW500ns
CSEL Leading Time Before the
First SCL EdgetL500ns
CSEL Trailing Time After the Last
SCL EdgetT500ns
SDA, SCL LoadCBTotal bus capacitance on one line with
4.7kI pullup to VCC20pF
VSEL FOUR-LEVEL DIGITAL INPUT (Note 10, Table 2)
Input Voltage High3-wire address, ADDR[6:5] = 11b5/6VCC
+ 0.2VCCV
Input Voltage Mid-High3-wire address, ADDR[6:5] = 10b3/6VCC
+ 0.2
2/3 x
VCC
5/6VCC
- 0.2V
Input Voltage Mid-Low3-wire address, ADDR[6:5] = 01b1/6VCC
+ 0.2
1/3 x
VCC
3/6VCC
- 0.2V
Input Voltage Low3-wire address, ADDR[6:5] = 00b01/6VCC
- 0.2V
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
Figure 1. AC Test Setup
0.01µF
SCL
SDA
CSEL
VOUT
0.01µF
TIN+
TOUTC
TOUTA
VCCT
TIN-
4.7kI
0.01µF
VCC
VCCT
DISABLEFAULTBMON
VCC
VCC
VCC
VCCT
VOUT = VCCT - 2V TO VCCT - 1V
VOUT
VCCT
VCC
VCCT
VCC
Z0 = 50I
4.7kI
2kI
0.01µF
Z0 = 50I
0.01µF
0.01µF
100nH
40I
40I
50I
25I
25I
50I
50I
0.1µF
SAMPLING
OSCILLOSCOPE
0.1µF
50I
50I
50I
50I
50I50I50I
100I
39I
VSEL
0.01µF
0.1µF
0.3pF
MAX3948
100nH
2.2µH
100I2.2µH
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
Typical Operating Characteristics
(Typical values are at VCC = VCCT = 3.3V, TA = +25°C, data pattern = 27 - 1 PRBS + 72 zeros + 27 - 1 PRBS (inverted) + 72 ones,
unless otherwise noted.)
INPUT DIFFERENTIAL TO COMMON-MODE
RETURN LOSS vs. FREQUENCY
MAX3948 toc05
FREQUENCY (MHz)
SCD11 (dB)
10,0001000
100100,000
INPUT COMMON-MODE RETURN LOSS
vs. FREQUENCY
MAX3948 toc04
FREQUENCY (MHz)
SCC11 (dB)
10,0001000
100100,000
INPUT DIFFERENTIAL RETURN LOSS
vs. FREQUENCY
MAX3948 toc03
FREQUENCY (MHz)
SDD11 (dB)
10,0001000
100100,000
SUPPLY CURRENT vs. TEMPERATURE
(LDMOD = 40mAP-P, LDDC = 20mA)
MAX3948 toc09
SUPPLY CURRENT (mA)805035205-10-25
CURRENT INTO VCC AND VCCT PINS
DIFFERENTIAL LASER LOAD = 5Ω
RANDOM JITTER
vs. MODULATION CURRENT (AT LOAD)
MAX3948 toc08
RJ (ps
RMS604050203010
11.3Gbps, 1111 0000 PATTERN
OUTPUT COMMMON-MODE RETURN LOSS
vs. FREQUENCY
MAX3948 toc07
SCC22 (dB)
10,0001000
100100,000
OUTPUT DIFFERENTIAL RETURN LOSS
vs. FREQUENCY
MAX3948 toc06
FREQUENCY (MHz)
SDD22 (dB)
10,0001000
100100,000
10.3Gbps ELECTRICAL EYE DIAGRAM
MAX3948 toc02
20ps/div
223-1, PRBS
10.3Gbps OPTICAL EYE DIAGRAM
MAX3948 toc01
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
Typical Operating Characteristics (continued)
(Typical values are at VCC = VCCT = 3.3V, TA = +25°C, data pattern = 27 - 1 PRBS + 72 zeros + 27 - 1 PRBS (inverted) + 72 ones,
unless otherwise noted.)
EDGE SPEED vs. MODULATION CURRENT
MAX3948 toc15
EDGE SPEED (ps)602040100
10.3Gbps, 1111 0000 PATTERN
20% TO 80%
FALL TIME
RISE TIME
DC MONITOR CURRENT
vs. TEMPERATURE
MAX3948 toc14
TEMPERATURE (°C)
BMON CURRENT (µA)805065-1052035-25
IDC = 50mA
IDC = 25mA
IDC = 10mA
MODULATION CURRENT DEEMPHASIS
vs. MANUAL DEEMPHASIS SETTING
MAX3948 toc13
SET_TXDE[6:0]
DEEMPHASIS (%)
SET_IMOD[8:0] = 230d
TXDE_MD[1:0] = 2d
MODULATION CURRENT (AT LOAD)
vs. DAC SETTING
MAX3948 toc12
SET_IMOD[8:0]
MODULATION CURRENT (mA
P-P
25Ω DIFFERENTIAL LOAD
10Ω DIFFERENTIAL LOAD
5Ω DIFFERENTIAL LOAD
TOTAL CURRENT vs. TEMPERATURE
(LDMOD AT LOAD = 40mAP-P, LDDC = 20mA)
MAX3948 toc10
TEMPERATURE (°C)
SUPPLY CURRENT (mA)65-25-105352050
CURRENT INTO VCC AND VCCT PINS PLUS
MODULATION, DEEMPHASIS, AND DC DAC
CURRENT, DIFFERENTIAL LASER LOAD = 5Ω
EDGE SPEED vs. DEEMPHASIS SETTING
MAX3948 toc16
EDGE SPEED (ps)7045120
SET_IMOD[8:0] = 230d
20% TO 80%
10.3Gbps, 1111 0000 PATTERN
FALL TIME
RISE TIME
DC CURRENT vs. DAC SETTING
MAX3948 toc11
SET_IDC[8:0]
IDC
(mA)
500400300200100600
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
Typical Operating Characteristics (continued)
(Typical values are at VCC = VCCT = 3.3V, TA = +25°C, data pattern = 27 - 1 PRBS + 72 zeros + 27 - 1 PRBS (inverted) + 72 ones,
unless otherwise noted.)
FAULT RECOVERY
MAX3948 toc20
4µs/div
VOUT
FAULT
DISABLE
LOW
LOW
HIGH
OUTPUT
EXTERNAL FAULT
REMOVED
RESPONSE TO FAULT
MAX3948 toc19
1µs/div
VOUT
FAULT
DISABLE
LOW
HIGH
EXTERNAL FAULT
OUTPUT
TRANSMITTER ENABLE
MAX3948 toc18
200ns/div
VCC
FAULT
DISABLEHIGH
LOW
LOW
3.3V
tON = 400ns
OPTICAL
OUTPUT
TRANSMITTER DISABLE
MAX3948 toc17
80ns/div
VCC
FAULT
DISABLELOWHIGH
3.3V
OPTICAL
OUTPUT
MAX3948 3-WIRE ADDRESS
vs. VSEL VOLTAGE (DATA FROM SIMULATION)
MAX3948 toc24
VSEL VOLTAGE (FRACTION OF V
VCC/3
2VCC/3
VCC
GNDADDR[6:5] = 00
ADDR[6:5] = 01
ADDR[6:5] = 10
ADDR[6:5] = 11
INDETERMINATE5/6xVCC±200mV
INDETERMINATE3/6xVCC±200mV
INDETERMINATE1/6xVCC±200mV
DISTRIBUTION OF FALL TIME
(WORST CASE CONDITIONS)
MAX3948 toc23
PERCENT OF UNITS (%)
VCC = 2.95V
TA = 95°C
20% to 80%
DISTRIBUTION OF RISE TIME
(WORST CASE CONDITIONS)
MAX3948 toc22
RISE TIME (ps)
PERCENT OF UNITS (%)
VCC = 2.95V
TA = 95°C
20% to 80%
FREQUENT ASSERTION OF DISABLE
MAX3948 toc21
4µs/div
VOUT
FAULT
DISABLELOW
LOW
OUTPUT
EXTERNAL FAULT
HIGH
HIGH
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
Pin Configuration
Pin Description
PINNAMEFUNCTIONEQUIVALENT CIRCUITDISABLE
Disable Input, CMOS. Set to logic-low for normal operation.
Logic-high or open disables both the modulation current
and the DC current. Internally pulled up by a 7.5kI resistor
to VCC. VSEL
4-Level Input for SPI Device Address Detection. Connecting
to VCC sets ADDR[6:5] to 11b, connecting to VCC x
2/3 sets ADDR[6:5] to 10b, connecting to VCC/3 sets
ADDR[6:5] to 01b, and connecting to GND sets ADDR[6:5]
to 00b.
FAULTBMON
DISABLE
CSELVOUTSCL
TIN+109
TIN-
*EP
*EXPOSED PAD MUST BE CONNECTED TO GROUND.
VCC
VCCT
TOUTC
TOUTA
VCCT
VSEL
SDA
VCC
TQFN(3mm x 3mm)TOP VIEW
MAX3948
VSEL
VCC
7.5kI
VCC
VCC
ESD
PROTECTION
VCC
DISABLE
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
Pin Description (continued)
PINNAMEFUNCTIONEQUIVALENT CIRCUITFAULT
Fault Output, Open Drain. Logic-high indicates a fault con-
dition has been detected. It remains high even after the
fault condition has been removed. A logic-low occurs when
the fault condition has been removed and the fault latch
has been cleared by toggling DISABLE. FAULT should be
pulled up to VCC by a 4.7kI to 10kI resistor.BMON
Analog Laser DC Current Monitor Output. Current out of
this pin develops a ground-referenced voltage across an
external resistor that is proportional to the VOUT pin cur-
rent. The current sourced by this pin is typically 1/60 the
VOUT pin current.
5,8VCCTPower Supply. Provides supply voltage to the output block.—TOUTAInverting Laser Diode Modulation Current Output. Connect
this pin to the anode of the laser diode.TOUTCNoninverting Laser Diode Modulation Current Output.
Connect this pin to the cathode of the laser diode.
FAULT
CLAMP
BMON
VCCT
VCCT
TOUTA
TOUTC
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
Pin Description (continued)
PINNAMEFUNCTIONEQUIVALENT CIRCUITVOUTCombined Current Return Path and Laser DC Current
OutputCSEL
Chip-Select CMOS Input. Setting CSEL to logic-high starts
a 3-wire command cycle. Setting CSEL to logic-low ends
the cycle and resets the control state machine. Internally
pulled down to GND by a 75kI resistor.SDA
Serial Data Bidirectional CMOS Input. Also an open-drain
output. This pin has a 75kI internal pullup, but requires an
external 4.7kI to 10kI pullup resistor to VCC for proper
operation.SCLSerial-Clock CMOS Input. This pin has an internal 75kI
pulldown resistor to GND.
VOUT
VCCT
75kI
VCC
VCCESD
PROTECTION
CSEL
75kI
VCC
VCC
ESD
PROTECTION
VCC
SDA
75kI
VCCVCCESD
PROTECTION
SCL
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
Pin Description (continued)
PINNAMEFUNCTIONEQUIVALENT CIRCUIT
13, VCCPower Supply. Provides supply voltage to core analog and
digital circuitry.—TIN+Noninverting Data Input. Input with internal 50I termination. TIN-Inverting Data Input. Input with internal 50I termination. EP
Exposed Pad (Ground). This is the only electrical connec-
tion to ground on the MAX3948 and must be soldered to the
circuit board ground for proper thermal and electrical perfor-
mance (see the Exposed-Pad Package section).
50I
50I
VCC
GND
TIN+
TIN-
CONTROL
LOOP
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
Figure 2. Functional Diagram
EYE SAFETY AND
OUTPUT CONTROL
TOUTA
TOUTC
VOUT
BMON
TX_EN
TX_POL50I50I
FAULT
TIN+
TIN-
SDA
SCL
CSEL
DISABLE
POWER-ON RESET
VCCVCCT
VOUT
7.5kI
VCC
VCM
75kI
25I
25I
TX_LOS
IMOD_DAC + IDE_DAC
IDC
VCCIDC/60
VSEL
3-WIRE
INTERFACEREGISTER
CONTROL
LOGIC
CHANNEL
DETECTION
2b SET_TXEQ
9b DAC SET_IMOD
75kI75kI
7b DAC SET_TXDE
9b DAC SET_IDC
MAX3948
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
Detailed Description
The MAX3948 SFP+/QSFP+ laser driver is designed
to drive 5I to 10I TOSAs from 1Gbps to 11.3Gbps. It
contains an input buffer with programmable equalization,
DC and modulation current DACs, an output driver with
adjustable deemphasis, power-on-reset circuitry, DC
current monitor, programmable 3-wire address, and eye
safety circuitry with maskable fault monitors. A 3-wire
digital interface is used to control these functions.
Input Buffer with Programmable Equalization
The input is internally biased and terminated with 50I to
a common-mode voltage. The first amplifier stage fea-
tures a programmable equalizer for high-frequency loss-
es including a SFP+/QSFP+ host connector. Equalization
is controlled by the SET_TXEQ register (Table 1). The
TX_POL bit in the TXCTRL register controls the polarity of
TOUTA and TOUTC vs. TIN+ and TIN-. A status indica-
tor bit (TXSTAT1 bit 5) monitors the presence of an AC
input signal.
DC Current DAC
The DC current from the device is optimized to pro-
vide up to 61mA of DC current into a laser diode with
116FA resolution (Figure 3). The DC DAC current is
controlled through the 3-wire digital interface using the
SET_IDC[8:0], IDCMAX[7:0], and DCINC[4:0] bits.
For laser operation, the laser DC current can be set using
the 9-bit SET_IDC DAC register. The upper 8 bits are set
by the SET_IDC[8:1] register, commonly used during the
initialization procedure after power-on reset (POR). The
LSB (bit 0) of SET_IDC (DCINC[7]) is initialized to zero
after POR and can be updated using the DCINC register.
Table 1. Input Equalization Control
Register Settings
SET_TXEQ[1:0]BOOST AT 5.16GHz (dB)011315.5
AC-COUPLING CASEVCCT
TOUTA
3.3V3.3V
TOUTC
VOUT
IMOD_DAC
IBIAS_DAC
LDMODLDMOD
LDBIAS
LDMOD = K1 × IMOD_DAC
LDBIAS = IBIAS_DAC
NOTE: FIGURES ARE SIMPLIFIED TO EXPRESS AC-COUPLING vs. DC-COUPLING DIFFERENCES.*SEE THE ELECTRICAL CHARACTERISTICS TABLE, NOTES 5 AND 8.
LDMOD = K1 × IMOD_DAC
LDBIAS* = IDC_DAC + K1/2 × IMOD_DAC + f(IMOD_DAC,DE,R)
LDBIASLDDC
IDC_DAC
VCCT
TOUTA
TOUTC
VOUT
IMOD_DAC
DC-COUPLING CASE
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
The IDCMAX register limits the maximum SET_IDC[8:1]
DAC code.
After initialization the value of the SET_IDC DAC register
should be updated using the DCINC register to optimize
cycle time and enhance laser safety. The DCINC regis-
ter is an 8-bit register. The first 5 bits of DCINC contain
the increment information in two’s complement format.
Increment values range from -16 to +15 LSBs. If the
updated value of SET_IDC[8:1] exceeds IDCMAX[7:0],
the IDCERR warning flag is set and SET_IDC[8:1] is set
to IDCMAX[7:0].
Modulation Current DAC
The modulation current from the MAX3948 is optimized
to provide up to 85mA of modulation current into a 5I
laser load with 210FA resolution. The modulation current
is controlled through the 3-wire digital interface using
the SET_IMOD[8:1], IMODMAX[7:0], MODINC[7:0], and
SET_TXDE registers.
For laser operation, the laser modulation current can be
set using the 9-bit SET_IMOD DAC. The upper 8 bits are
programmed through the SET_IMOD[8:1] register, com-
monly used during the initialization procedure after POR.
The LSB (bit 0) of SET_IMOD (MODINC[7])is initialized to
zero after POR and can be updated using the MODINC
register. The IMODMAX register limits the maximum
SET_IMOD[8:1] DAC code.
After initialization the value of the SET_IMOD DAC reg-
ister should be updated using the MODINC[4:0] bits
to optimize cycle time and enhance laser safety. The
MODINC register is an 8-bit register. The first 5 bits of
MODINC contain the increment information in two’s com-
plement format. Increment values range from -16 to +15
LSBs. If the updated value of SET_IMOD[8:1] exceeds
IMODMAX[7:0], the IMODERR warning flag is set and
SET_IMOD[8:1] is set to IMODMAX[7:0].
Effective modulation current seen by the laser is actu-
ally the combination of the DAC current generated by
the SET_IMOD[8:0] register (IMOD), deemphasis setting
(DE), and differential laser load (R). It is calculated by the
following formula:
LDMOD = IMOD x 50 x (1 - DE)/(50 + R)
Output Driver
This device is optimized to drive a differential TOSA with
a 25I flex circuit. The unique design of the output stage
enables DC-coupling to unmatched TOSAs with laser
diode impedances ranging from 5I to 10I. The output
stage also features programmable deemphasis that can
be set as a percentage of the modulation current. The
deemphasis function is controlled by the TXCTRL[4:3]
and the SET_TXDE registers.
Power-On Reset (POR)
Power-on reset ensures that the laser is off until the supply
voltage has reached a specified threshold (2.75V). After
power-on reset, TX_EN is 0 and DC current and modula-
tion current DACs default to small codes. In the case of a
POR, all registers are reset to their default values.
BMON Function
The current out of the BMON pin is typically 1/60th the
value of the current into the VOUT pin. The total resis-
tance to ground at BMON sets the voltage.
VSEL Function
The VSEL pin is an analog input that sets the 3-wire
address for the MAX3948. The pin can be set to either
VCC, VCC x 2/3, VCC/3, or to GND (Table 2). This allows
up to four MAX3948s to be operated on a single 3-wire
bus, each with their own address.
Eye Safety and Output Control Circuitry
The safety and output control circuitry includes the dis-
able pin (DISABLE) and enable bit (TX_EN), along with
a FAULT indicator and fault detectors (Figure 4). A fault
condition triggers the FAULT pin to go high and a corre-
sponding bit is set in the TXSTAT1 register. The MAX3948
has two types of faults: hard faults and soft faults. Hard
faults are maskable, trigger the FAULT pin (transitions
high), disable the outputs and are stored in the TXSTAT1
register. Soft faults serve as warnings, do not disable the
outputs, and are stored in the TXSTAT2 register.
Table 2. 3-Wire Address Selection
VSELADDR[6:5]
VCC11b
VCC x 2/310b
VCC/301b
GND00b
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
Figure 4. Eye Safety Circuitry
<0>
<1>
VCCT - 2.4V (FOR VOUT)
VCC - 0.3V (FOR VCCT)IMOD
IDC
<2>
0.41V
<3>
<4>
<6>
<7>
0.48V + 0.14 x SET_IMOD[8:6]d
(SELF-ADJUSTING)
<5>
VCCT - 1.6V
UNUSED
FAULT REGISTER
TXSTAT1
ADDR = H0x06
<1>
<0>UNUSED
UNUSED
OVERFLOW
UNDERFLOW
SET_IDC[8:1]
IDCMAX[7:0]
SET_IMOD[8:1]
IMODMAX[7:0]
LOS
CIRCUIT
OVERFLOW
UNDERFLOW
<2>
<3>
WARNING REGISTER
TXSTAT2
ADDR = H0x07
VCCT
TOUTA
VCC
DISABLE
7.5kI
RESET
POR
25Ω
TOUTC
VOUT
25Ω
MAX3948
MAX3948
11.3Gbps, Low-Power, DC-Coupled Laser Driver
The FAULT pin is a latched output that can be cleared by
toggling the DISABLE pin. Toggling the DISABLE pin also
clears the TXSTAT1 and TXSTAT2 registers. A single-point
failure can be a short to VCC or GND. Table 3 shows the
circuit response to various single-point failures.
Table 3. Circuit Response to Single-Point Failure
Note 1: Normal operation—Does not affect the laser power.
Note 2: Pin functionality might be affected, which could affect laser power/performance.
Note 3: Supply-shorted current is assumed to be primarily on the circuit board (outside this device) and the main supply is col-
lapsed by the short.
Note 4: Normal in functionality, but performance could be affected.
Warning: Shorted to VCC or shorted to ground on some pins can violate the Absolute Maximum Ratings.
PINNAMESHORT TO VCCSHORT TO GNDOPENDISABLEDisabledNormal (Note 1). Can only be
disabled by other means.DisabledVSELNormal (Note 2)Normal (Note 2)Normal (Note 2)FAULTNormal (Note 2)Normal (Note 1)Normal (Note 2)BMONNormal (Note 2) Normal (Note 2)Normal (Note 2)
5, 8VCCTNormalDisabled—Fault (external supply
shorted) (Note 3)Redundant path (Note 4) TOUTALaser modulation current is
reducedDisabled (hard fault)Laser modulation current is
reduced or disabled (hard fault)TOUTCLaser modulation current is
reduced or offDisabled (hard fault)Laser modulation current is
reduced or disabled (hard fault)VOUTIDC is on, but not delivered to
the laser; no faultDisabled (hard fault)Disabled (hard fault)CSELNormal (Note 2)Normal (Note 2)Normal (Note 2)SDANormal (Note 2)Normal (Note 2)Normal (Note 2)SCLNormal (Note 2)Normal (Note 2)Normal (Note 2)
13, 16VCCNormalDisabled—Hard fault (external
supply shorted) (Note 3)Redundant path (Note 4)TIN+Disabled (hard fault)Disabled (hard fault)Normal (Note 2) or disabled
(hard fault)TIN-Disabled (hard fault)Disabled (hard fault)Normal (Note 2) or disabled
(hard fault)
