MAX3840ETJ+ ,+3.3V, 2.7Gbps Dual 2 x 2 Crosspoint Switchapplications where serial data streamloop-through and protection channel switching are♦ 2ps Random ..
MAX3840ETJ+T ,+3.3V, 2.7Gbps Dual 2 x 2 Crosspoint SwitchApplicationsMAX3840EGJ -40°C to +85°C 32 QFN G3255-1SDH/SONET and DWDM Transport Systems+Denotes a ..
MAX3841ETG+ ,12.5Gbps, CML, 2 x 2 Crosspoint Switchapplications.♦ +3.3V Core SupplyThe MAX3841 has 150mV minimum differential inputP-Psensitivity, and ..
MAX3845UCQ+D ,DVI/HDMI 2:4 TMDS Fanout Switch and Cable DriverELECTRICAL CHARACTERISTICS(V = 3.0V to +3.6V, T = -10°C to +85°C. Typical values are at V = +3.3V, ..
MAX384CPN ,Low-Voltage, 8-Channel/Dual 4-Channel Multiplexers with Latchable InputsFeaturesThe MAX382/MAX384 are low-voltage, CMOS, 1-of-8' Pin-Compatible with Industry-Standardand d ..
MAX384CWN ,Low-Voltage, 8-Channel/Dual 4-Channel Multiplexers with Latchable InputsELECTRICAL CHARACTERISTICS—Dual Supplies(V+ = +5V ±10%, V- = -5V ±10%, GND = 0V, V = V = 2.4V, V = ..
MAX7403CSA ,8-th-order, lowpass, elliptic, switched-capacitor filter. Filter response elliptic (r=1.2), operating voltage +5VELECTRICAL CHARACTERISTICS—MAX7400/MAX7403(V = +5V, filter output measured at OUT, 10kΩ || 50pF loa ..
MAX7404ESA+ ,8th-Order, Lowpass, Elliptic, Switched-Capacitor FiltersApplications Ordering Information continued at end of data sheet.ADC Anti-Aliasing Speech Processin ..
MAX7405CSA ,8th-Order, Lowpass, Bessel, Switched-Capacitor FiltersFeaturesThe MAX7401/MAX7405 8th-order, lowpass, Bessel,' 8th-Order, Lowpass Bessel Filtersswitched- ..
MAX7405EPA ,8th-Order, Lowpass, Bessel, Switched-Capacitor FiltersApplicationsPART TEMP. RANGE PIN-PACKAGEADC Anti-Aliasing CT2 Base StationsMAX7401CSA 0°C to +70°C ..
MAX7405ESA ,8th-Order, Lowpass, Bessel, Switched-Capacitor FiltersELECTRICAL CHARACTERISTICS—MAX7401 (continued)(V = +5V, filter output measured at OUT, 10kΩ || 50pF ..
MAX7408EUA ,5th-Order, Lowpass, Elliptic, Switched-Capacitor FiltersApplicationsMAX7408EPA -40°C to +85°C 8 Plastic DIPADC Anti-Aliasing CT2 Base StationsMAX7408EUA -4 ..
MAX3840EGJ-T-MAX3840ETJ+-MAX3840ETJ+T
+3.3V, 2.7Gbps Dual 2 x 2 Crosspoint Switch
General DescriptionThe MAX3840 is a dual 2 ✕2 asynchronous crosspoint
switch for SDH/SONET DWDM and other high-speed
data switching applications where serial data stream
loop-through and protection channel switching are
required. It is ideal for OC-48 systems with forward
error correction. A high-bandwidth, fully differential sig-
nal path minimizes jitter accumulation, crosstalk, and
signal skew. Each 2 ✕2 crosspoint switch can fan out
and/or multiplex up to 2.7Gbps data and 2.7GHz clock
signals. All inputs and outputs are current mode logic
(CML) compatible and easily adaptable to interface
with an AC-coupled LVPECL signal. When not used,
each CML output stage can be powered down with an
enable control to conserve power. The typical power
consumption is 460mW with all outputs enabled.
The MAX3840 is compatible with the MAX3876
2.5Gbps clock and data recovery (CDR) circuit.
The MAX3840 is available in a 32-pin exposed-pad
QFN package (5mm ✕5mm footprint) and operates
from a +3.3V supply over a temperature range of -40°C
to +85°C.
________________________ApplicationsSDH/SONET and DWDM Transport Systems
Add-Drop Multiplexers
ATM Switch Cores
WDM Cross-Connects
High-Speed Backplanes
FeaturesSingle +3.3V Supply460mW Power Consumption2psRMSRandom Jitter7psP-PDeterministic JitterPower-Down Feature for Deselected OutputsCML Inputs/Outputs6ps Channel-to-Channel Skew100ps Output Edge Speed 5mm ✕5mm 32 QFN or Thin QFN Package
MAX3840
+3.3V, 2.7Gbps Dual 2 ✕2 Crosspoint SwitchMAX3866
TIA AND LA
MAX3876
CDR
MAX3840
CROSSPOINT
SWITCH
ZO = 50Ω TRANSMISSION LINE
DATA
CLOCK
MAX3866
TIA AND LA
MAX3876
CDR
DATA
CLOCK
MAX3869
MAX3869
LASER
DRIVER
LASER
DRIVER
VCC = +3.3V
Typical Application Circuit19-1854; Rev 5; 9/07
Ordering Information
PARTTEMP RANGEPIN -
PA C K A G E
PK G O D EMAX3840ETJ+-40°C to +85°C32 TQFNT3255-3
MAX3840EGJ-40°C to +85°C32 QFNG3255-1
Pin Configurations appear at end of data sheet.+Denotes a lead-free package.
MAX3840
+3.3V, 2.7Gbps Dual 2 ✕2 Crosspoint Switch
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS(VCC= +3.0V to +3.6V, TA= -40°C to +85°C. Typical values are at VCC= +3.3V, TA= +25°C, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage, VCC.............................................-0.5V to +5.0V
Input Voltage (CML) .........................(VCC - 1.0) to (VCC+ 0.5V)
TTL Control Input Voltage...........................-0.5V to (VCC+ 0.5V)
Output Currents (CML).......................................................22mA
Continuous Power Dissipation (TA= +85°C)
32-Pin TQFN
(derate 21.3mW/°C above +85°C).................................1.38W
32-Pin QFN
(derate 21.3mW/°C above +85°C).................................1.38W
Operating Temperature Range...........................-40°C to +85°C
Operating Junction Temperature Range...........-55°C to +150°C
Storage Temperature Range.............................-65°C to +160°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSSupply CurrentICCAll outputs enabled140 190mA
CML INPUT AND OUTPUT SPECIFICATIONSCML Differential Output SwingRL = 50Ω to VCC (Figure 2)640800 1000mVP-P
Differential Output Impedance85100 115Ω
CML Output Common-Mode
VoltageRL = 50Ω to VCCVCC - 0.2V
CML Single-Ended Input
Voltage RangeVISVCC - 0.8 VCC + 0.5V
CML Differential Input Voltage
Swing3002000mVP-P
CML Single-Ended Input
Impedance
42.5 50 57.5Ω
TTL SPECIFICATIONSTTL Input High VoltageVIH2.0V
TTL Input Low VoltageVIL 0.8V
TTL Input High CurrentIIH -10+10µA
TTL Input Low CurrentIIL -10 +10µA
MAX3840
+3.3V, 2.7Gbps Dual 2 ✕2 Crosspoint Switch
AC ELECTRICAL CHARACTERISTICS(VCC= +3.0V to +3.6V, TA= -40°C to +85°C. Typical values are at VCC= +3.3V, TA= +25°C, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSCML Input and Output Data
Rate2.7Gbps
CML Input and Output Clock
Rate2.7GHz
CML Output Rise and Fall Timetr, tf20% to 80%
100 136ps
CML Output Random JitterRJ(Note 2)2psRMS
CML Output Deterministic JitterDJ(Note 3)720psP-P
CML Output Differential Skewtskew1Any differential pair725ps
CML Output Channel-to-
Channel Skewtskew2Any two outputs1540ps
Propagation Delay from Input-
to-Outputtd185ps
CML Differential Output Swing
for 2.7Gbps Input Data
RL = 50Ω to VCC
(Note 4)600mVP-P
CML Differential Output Swing
for 2.7GHz Input Clock
RL = 50Ω to VCC
(Note 5)520mVP-P
Note 1:AC characteristics are guaranteed by design and characterization.
Note 2:Measured with 100mVP-Pnoise (f ≤2MHz) on the power supply.
Note 3:Deterministic jitter (DJ) is the arithmetic sum of pattern-dependent jitter and pulse-width distortion.
Note 4:Measured with 300mVP-Pdifferential 1010... data pattern driving the inputs.
Note 5:Measured with 300mVP-Pdifferential clock at 2.7GHz driving the inputs.
MAX3840
+3.3V, 2.7Gbps Dual 2 ✕2 Crosspoint Switch
SUPPLY CURRENT vs. TEMPERATUREMAX3840 toc01
SUPPLY CURRENT (mA)
TEMPERATURE (°C)
4 OUTPUTS ENABLED
3 OUTPUTS ENABLED
2 OUTPUTS ENABLED
1 OUTPUT ENABLED
0 OUTPUTS ENABLED
CML DIFFERENTIAL VOLTAGEMAX3840 toc02
CML DIFFERENTIAL VOLTAGE (mV
P-P
TEMPERATURE (°C)
CHANNEL-TO-CHANNEL SKEW
vs. TEMPERATURE
MAX3840 toc04
TEMPERATURE (°C)
TMIE (ps)
CHANNEL A
CHANNEL B
2.7Gbps EYE DIAGRAMMAX3840 toc03
54ps/div
150mV/div
INPUT = 223 - 1PRBS
Typical Operating Characteristics(VCC= +3.3V, TA= +25°C, unless otherwise noted.)
MAX3840
+3.3V, 2.7Gbps Dual 2 ✕2 Crosspoint Switch
Pin Description
PINNAMEFUNCTIONENB1Channel B1 Output Enable, TTL Input. A TTL low input powers down B1 output stage.DIB1+Channel B1 Positive Signal Input, CMLDIB1-Channel B1 Negative Signal Input, CMLENB0Channel B0 Output Enable, TTL Input. A TTL low input powers down B0 output stage.SELB0Channel B0 Output Select, TTL Input. See Table 1.DIB0+Channel B0 Positive Signal Input, CMLDIB0-Channel B0 Negative Signal Input, CMLSELB1Channel B1 Output Select, TTL Input. See Table 1.
9, 24GNDSupply Ground
10, 13, 16, 17,
20, 23VCCPositive SupplyDOB0-Channel B0 Negative Output, CMLDOB0+Channel B0 Positive Output, CMLDOB1-Channel B1 Negative Output, CMLDOB1+Channel B1 Positive Output, CMLDOA1-Channel A1 Negative Output, CMLDOA1+Channel A1 Positive Output, CMLDOA0-Channel A0 Negative Output, CMLDOA0+Channel A0 Positive Output, CMLSELA1Channel A1 Output Select, TTL Input. See Table 1.DIA0+Channel A0 Positive Signal Input, CMLDIA0-Channel A0 Negative Signal Input, CMLSELA0Channel A0 Output Select, TTL Input. See Table 1.ENA0Channel A0 Output Enable, TTL Input. A TTL low input powers down A0 output stage.DIA1+Channel A1 Positive Signal Input, CMLDIA1-Channel A1 Negative Signal Input, CML
32ENA1Channel A1 Output Enable, TTL Input. A TTL low input powers down A1 output stage.Exposed PadGround. The exposed pad must be soldered to the circuit board ground for proper
electrical and thermal operation.
MAX3840
+3.3V, 2.7Gbps Dual 2 ✕2 Crosspoint Switch
_______________Detailed DescriptionThe block diagram in Figure 1 shows the MAX3840
architecture. The SELA_ and SELB_ pins control the rout-
ing of the signals through the crosspoint switch. Each
output of the crosspoint switch drives a CML output dri-
ver. Each of the outputs, DOA_ and DOB_, is enabled or
disabled by the respective ENA_ and ENB_ pins.
CML Inputs and OutputsCML is used to simplify high-speed interfacing. On-
chip input and output terminations minimize the number
of external components required while improving signal
integrity. The CML output signal swing is small, result-
ing in lower power consumption. The internal 50Ωinput
and output terminations minimize reflections and elimi-
nate the need for external terminations.
ROUTING CONTROLSOUTPUT CONTROLSOUTPUT SIGNALSSELA0/SELB0SELA1/SELB1ENA0/ENA1ENB0/ENB1Signal at DOA0/DOB0Signal at DOA1/DOB1011DIA0/DIB0DIA0/DIB0111DIA0/DIB0DIA1/DIB1011DIA1/DIB1DIA0/DIB0111DIA1/DIB1DIA1/DIB1X00Power DownPower Down
Table 1. Output RoutingDOA0+0
DOA0-
ENA0
SELA0
CML
CML
DOA1+
DIA0-
DIA0+
DOA1-
ENA1
SELA1
CML
DIA1-
DIA1+
DOB0+0
DOB0-
ENB0
SELB0
CML
DOB1+
DIB0-
DIB0+
DOB1-
ENB1
SELB1
CML
DIB1-
DIB1+
CML
CML
CML
320mV MIN
CML+
CML-
(CML+) - (CML-)
500mV
MAX
1000mV
MAX
640mV
MIN
Figure 1. Functional Block DiagramFigure 2. CML Output Levels
