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The MAX736/MAX737/MAX739/MAX759 are CMOS, in-
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MAX3787ABL-MAX3787ABL-T
1Gbps to 12.5Gbps Passive Equalizer for Backplanes and Cables
General DescriptionThe MAX3787 is a 1Gbps to 12.5Gbps equalization
network that compensates for transmission medium loss-
es encountered with FR4 and cables. The equalization
network is composed entirely of passive components
and functions equally well for 8b/10b or scrambled sig-
nals. It is packaged in a small 1.5mm x 1.5mm chip-
scale package (UCSP™) that can be placed anywhere
along the transmission medium to increase jitter margin
for high-speed interconnects. Roughly the size of two
0603 components, the MAX3787 easily provides place-
ment and routing flexibility.
At 8.5Gbps, the MAX3787 compensates for spans up to
18in of FR4 and 7m of cable. At 12.5Gbps, the MAX3787
compensates for spans up to 12in of FR4 and 3m of
cable. Input and output impedance is 100Ωdifferential.
The MAX3787 requires no power and operates over a
-40°C to +125°C temperature range.
ApplicationsBackplane Interconnect Compensation
Cable Interconnect Compensation
Chip-to-Chip Link Extensions
Ethernet and Fibre-Channel Serial Modules
Chassis Life Extension
FeaturesNo Power Supply RequiredSmall 1.5mm x 1.5mm Chip-Scale PackagePassive Equalization Reduces ISIOperates from 1Gbps to 12.5GbpsExtends Board LinkExtends Cable LinkCoding Independent, 8b/10b or Scrambled
MAX3787Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables19-0406; Rev 2; 2/08
EVALUATION KIT
AVAILABLE13
UCSP/WLPTOP VIEW
IN-OUT-
IN+OUT+
MAX3787
Pin Configuration
Ordering Information
PARTTEMP RANGEPIN-
PACKAGE
PKG
CODE MAX3787ABL -40°C to +125°C 4 UCSP B9-7
MAX3787AWL+ -40°C to +125°C 4 WLP W91B1+3
UCSP is a trademark of Maxim Integrated Products, Inc.
Typical Application Circuits continued at end of data sheet.MAX3787
LINE CARDALL PASSIVE BACKPLANE INTERCONNECTSWITCH CARD
IN+OUT+TxOUT-IN-Rx(100Ω)(100Ω)
MAX3787
OUT+IN+IN-OUT-Tx(100Ω)(100Ω)
100Ω FR4
100Ω FR4
Typical Application Circuits+Denotes a lead-free package.
MAX3787
ELECTRICAL CHARACTERISTICS (Specifications guaranteed over specified operating conditions. Typical values measured at TA = +25°C.)
PARAMETERSYM B O L CONDITIONSMINTYPMAXUNITSSupply Current0.0mA
Input SwingMeasured differentially at point A in Figure 13600mVP-P
Compensation5GHz relative to 100MHz6dB
Input ImpedanceDifferential, ZLOAD = 100Ω100Ω
Output ImpedanceDifferential, ZSOURCE = 100Ω100Ω
Through ResponseRelative to ideal load, see Figure 2 for setupSee Figure 3 for limits
Input Return Loss100MHz to 6GHz15dB
Output Return Loss100MHz to 6GHz15dB
Resistance IN+ to IN- and OUT+
to OUT-No load, high impedance on all ports112152Ω
Resistance IN+ to OUT+ and
IN- to OUT-No load, high impedance on all ports3244Ω
Resistance IN+ to OUT- and
IN- to OUT+No load, high impedance on all ports112152Ω
DC Gain (OUT/IN)ZLOAD = 100Ω0.5
3.125Gbps and 6.25Gbps, 18in of 6mil
microstrip FR40.05
Residual Deterministic Jitter
(Table 1, Notes 1, 2)8.5Gbps, 10.0Gbps, and 12.5Gbps,
18in of 6mil microstrip FR40.10
Note 1:Signal applied differentially at point A as shown in Figure 1. The deterministic jitter at point B is from media-induced loss,
not from clock-source modulation. Deterministic jitter is measured at the 50% vertical level of the signal at point C.
Note 2:Difference in deterministic jitter between reference points A and C in Figure 1. Stress pattern: 27PRBS, 100 zeros, 1, 0, 1, 0,
27 PRBS, 100 ones, 0, 1, 0, 1.
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
ABSOLUTE MAXIMUM RATINGSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage between (IN+ and OUT+) or (IN- and OUT-)..............+2V
Voltage between (IN+ and IN-) or (OUT+ and OUT-)..............+4V
Voltage between (IN+ and OUT-) or (IN- and OUT+)..............+4V
Continuous Power Dissipation (TA= +70°C)
4-Bump UCSP (derate 3.0mW/°C above +70°C).........238mW
Operating Junction Temperature........................................+150°C
Storage Ambient Temperature Range.................-55°C to +150°C
OPERATING CONDITIONS
PARAMETERSYM B O L CONDITIONSMINTYPMAXUNITSOperating Ambient TemperatureTA-40+25+125°C
Bit RateNRZ data112.5Gbps
CID ToleranceConsecutive identical digits100Bits
MAX3787SIGNAL SOURCE
MAX3787
FR4 TEST BOARD
0in ≤ L ≤ 18inBC
OSCILLOSCOPE
ROGERS 4350 BOARD
SEE TABLE 1 FOR PCB PARAMETERS.
REPRESENTS EDGE-MOUNTED SMA CONNECTOR.
Figure 1. Residual Deterministic Jitter Test Circuit
VNA SOURCE
MAX3787
ROGERS 4350 BOARD
1in DUAL 50Ω
MICROSTRIP LINE
VNA DETECTOR
REPRESENTS EDGE-MOUNTED SMA CONNECTOR.
1in DUAL 50Ω
MICROSTRIP LINE
Figure 2. Frequency Response Test Circuit Using Vector Network Analyzer (VNA)
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
MAX3787
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
THROUGH-RESPONSE LIMITS
(RELATIVE TO IDEAL LOAD)FREQUENCY (GHz)
S21 (dB)86723451
MIN
TYP
MAX
Figure 3. Through Response Limits
Table 1. PCB Assumptions (Board Material is FR4)
PARAMETERCONDITIONSMINTYPMAXUNITSTransmission LineEdge-coupled microstrip line6mil
Relative Permittivity at 1GHzFR4 or similar4.0—
Loss TangentFR4 or similar0.02—
Metal Thickness1oz copper1.4mil
ImpedanceDifferential90100110Ω
FREQUENCYMIN
(dB)
TYP
(dB)
MAX
(dB)100MHz-8.2-7.4-6.8
200MHz-7.9-7.0-6.4
300MHz-7.5-6.6-6.0
500MHz-6.8-6.0-5.3
1.0GHz-5.5-4.8-4.2
2.0GHz-4.2-3.2-2.5
3.0GHz-3.1-2.2-1.5
4.0GHz-2.3-1.5-0.8
5.0GHz-2.1-1.3-0.5
5.5GHz-2.4-1.6-0.6
6.0GHz-2.9-2.1-1.1
6.5GHz—-2.6—
7.0GHz—-3.1—
7.5GHz—-3.6—
8.0GHz—-4.1—
8.5GHz—-4.7—
9.0GHz—-5.5—
9.5GHz—-7.0—
10.0GHz—-9.0—
MAX3787
1Gbps to 12.5Gbps
Passive Equalizer for Backplanes and Cables
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(18in FR4, 12.5Gbps, STRESS PATTERN)MAX3787toc04
120mV/div
14ps/div
EYE DIAGRAM OF EQUALIZED SIGNAL
(18in FR4, 12.5Gbps, STRESS PATTERN)MAX3787toc05
120mV/div
14ps/div
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(18in FR4, 12.5Gbps, STRESS PATTERN)MAX3787toc06
50mV/div
14ps/div
EYE DIAGRAM OF UNEQUALIZED SIGNAL
(12in FR4, 12.5Gbps, STRESS PATTERN)MAX3787toc07
120mV/div
14ps/div
EYE DIAGRAM OF EQUALIZED SIGNAL
(12in FR4, 12.5Gbps, STRESS PATTERN)MAX3787toc08
120mV/div
14ps/div
EYE DIAGRAM OF EQUALIZED SIGNAL (ZOOM)
(12in FR4, 12.5Gbps, STRESS PATTERN)MAX3787toc09
60mV/div
14ps/div
Typical Operating Characteristics(TA= +25°C, unless otherwise noted. All measurements were done with 1VP-Pat the source. Stress pattern: 27PRBS, 100 zeros, 1, 0, 1,
0, 27 PRBS, 100 ones, 0, 1, 0, 1. Residual deterministic jitter graphs were measured using Tektronix’s FrameScan®. Deterministic jitter of
the system was subtracted from the measured value. Eye diagrams acquired by FrameScan include deterministic jitter of the system
(approximately 9ps) but not random jitter. Twin-ax cable: Amphenol Spectra-Strip®Skewclear®100Ω24AWG.)
VERTICAL EYE OPENING vs. LENGTH
(4.25Gbps, STRESS PATTERN)
MAX3787toc01
FR4 BOARD LENGTH (in)
VERTICAL EYE OPENING (mV
P-P
WITHOUT EQUALIZER
WITH EQUALIZER
VERTICAL EYE OPENING vs. LENGTH
(8.5Gbps, STRESS PATTERN)
MAX3787toc02
FR4 BOARD LENGTH (in)
VERTICAL EYE OPENING (mV
P-P
WITHOUT EQUALIZER
WITH EQUALIZER
VERTICAL EYE OPENING vs. LENGTH
(10.3125Gbps, STRESS PATTERN)
MAX3787toc03
FR4 BOARD LENGTH (in)
VERTICAL EYE OPENING (mV
P-P
WITHOUT EQUALIZER
WITH EQUALIZER
FrameScan is a registered trademark of Tektronix.