MAX3784UGE-T ,5Gbps PCB EqualizerApplicationsChassis Life ExtensionTOP VIEW4.25Gbps Fibre Channel12 11 9104x Multiplexed 1.25Gbps Et ..
MAX3785UTT+ ,6.25Gbps, 1.8V PC Board EqualizerApplicationsPin ConfigurationsHSBI for ≤ 6.4GbpsTOP VIEW (BUMPS ON BOTTOM OF DIE)Double IEEE 802.3a ..
MAX3786UTJ ,1.5Gbps Serial ATA-Compatible Mux/Buffer with Loopback and EqualizationMAX378619-2727; Rev 2; 6/041.5Gbps Serial ATA-Compatible Mux/Buffer withLoopback and Equalization
MAX3786UTJ+ ,1.5Gbps Serial ATA-Compatible Mux/Buffer with Loopback and EqualizationApplications+Denotes lead-free package.*EP = Exposed pad.1.5Gbps Serial ATA RedundancyTypical Appli ..
MAX3786UTJ+T ,1.5Gbps Serial ATA-Compatible Mux/Buffer with Loopback and EqualizationFeaturesThe MAX3786 is an AC-coupled, serial-ATA (SATA)-♦ < 50ps Total Residual Jitter (20in FR-4, ..
MAX3786UTJ-T ,1.5Gbps Serial ATA-Compatible Mux/Buffer with Loopback and EqualizationELECTRICAL CHARACTERISTICS(V = +3.0V to +3.6V, T = 0°C to +85°C. Typical values at V = +3.3V, T = + ..
MAX7369EUP+T ,4-Channel I²C Switches/MultiplexerFeatures♦ Four-Channel, Bidirectional Bus ExpansionThe MAX7367/MAX7368/MAX7369 bidirectional, four- ..
MAX736CPD ,-5V,-12V,-15V, and Adjustable Inverting Current-Mode PWM Regulatorsapplications.
The MAX736/MAX737/MAX739 have fixed outputs of -12V,
-15V, and -5V respectively. ..
MAX736CPD ,-5V,-12V,-15V, and Adjustable Inverting Current-Mode PWM Regulatorsfeatures, along with
high efficiency and an application circuit that lends itself to
miniaturizat ..
MAX736CPD+ ,-12V, Inverting, PWM, Current-Mode DC-DC Converterapplications.
The MAX736/MAX737/MAX739 have fixed outputs of -12V,
-15V, and -5V respectively. ..
MAX736CWE ,-5V,-12V,-15V, and Adjustable Inverting Current-Mode PWM RegulatorsFeatures
. Pre-Set -5V, -12V, -15V or Adjustable Outputs
. Convert Positive Voltages to Negative
..
MAX736EPD ,-5V,-12V,-15V, and Adjustable Inverting Current-Mode PWM RegulatorsGeneral Description
The MAX736/MAX737/MAX739/MAX759 are CMOS, in-
verting, switch-mode regulato ..
MAX3784AUTE+-MAX3784AUTE+T-MAX3784UGE-T
5Gbps PCB Equalizer
General DescriptionThe MAX3784/MAX3784A 5Gbps equalizers provide
compensation for transmission-medium losses in up to
40in of FR-4. They are optimized for short-run length
and balanced codes such as 8b10b, as found in multi-
plexed 1.25Gbps Ethernet systems and 4.25Gbps
Fibre Channel.
The equalizers use differential CML data inputs and
outputs. A standby mode reduces power consumption
when the parts are not in use. The MAX3784/
MAX3784A are available in a 4mm ×4mm, 16-pin QFN
package that consumes only 185mW at +3.3V.
FeaturesSpans 40in (1m) of FR-4 PCB0.18UI Deterministic Jitter Up to 40inLow Power Consumption: 185mW (MAX3784)Equalization Reduces Intersymbol Interference Single +3.3V SupplyStandby Mode Small 4mm ×4mm, 16-Pin QFN Package
MAX3784/MAX3784A
5Gbps PCB Equalizer
Pin ConfigurationsLINE CARD
+3.3V
5Gbps
+3.3VT/R 1Rx
T/R 2Rx
T/R 3Rx
T/R 4Rx
T/R 1
T/R 2
T/R 3
T/R 4
1.25Gbps
1.25Gbps
1.25Gbps
1.25Gbps
SWITCH
SWITCH CARDPCB
BACKPLANE
MAX3784/
MAX3784A
EQUALIZEROUT
MAX3784/
MAX3784A
EQUALIZEROUTIN
Typical Application Circuit19-2565; Rev 4; 10/07
PARTTEMP
RANGE
PIN-
PACKAGE
PKG
CODE
MAX3784UGE 0°C to +85°C 16 QFN-EP* G1644-1
MAX3784UTE+ 0°C to +85°C 16 TQFN-EP* T1644-3
MAX3784AUGE 0°C to +85°C 16 QFN-EP* G1644-1
MAX3784AUTE+ 0°C to +85°C 16 TQFN-EP* T1644-3
Ordering Information
ApplicationsChassis Life Extension
4.25Gbps Fibre Channel
4x Multiplexed 1.25Gbps Ethernet (5Gbps)
+Denotes a lead-free package.
*Exposed pad.2341011
VCC
IN+
IN-
GND
GND
GND
N.C.
N.C.
N.C.
N.C.
N.C.
OUT+OUT
* THE EXPOSED PAD MUST BE SOLDERED TO SUPPLY GROUND
FOR CORRECT THERMAL AND ELECTRICAL PERFORMANCE.
MAX3784/
MAX3784A
TOP VIEW
QFN*EP
Pin Configurations continued at end of data sheet.
MAX3784/MAX3784A
5Gbps PCB Equalizer
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VCC= +3V to +3.6V, TA= 0°C to +85°C. Typical values are at VCC= +3.3V and TA= +25°C, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage, VCC.................................................-0.5V to +6V
Input Voltage............................................(-0.5V) to (VCC+ 0.5V)
Continuous Output Current...............................-25mA to +25mA
Continuous Power Dissipation (TA= +85°C)
16-Pin QFN (derate 25mW/°C above +85°C)............1600mW
Operating Ambient Temperature Range................0°C to +85°C
Storage Temperature Range.............................-55°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSEN = low30Supply PowerEN = high185250mW
10Hz < f < 100Hz100
100Hz < f < 1MHz40Supply-Noise Tolerance(Note 1)
1MHz < f < 2.5GHz10
mVP-P
LatencyFrom input to output200ps
CML RECEIVER INPUTInput Voltage SwingVINMeasured differentially at point A in Figure 14001000mVP-P
Return Loss100MHz to 2.5GHz15dB
Input ResistanceDifferential80100120Ω
EQUALIZATION20in0.130.21Residual Deterministic Jitter,
5GbpsTable 1 (Notes 2–5)40in0.180.23UIP-P
20in0.080.14Residual Deterministic Jitter,
2.5GbpsTable 1 (Notes 2–5)40in0.130.28UIP-P
20in0.040.07Residual Deterministic Jitter,
1.25GbpsTable 1 (Notes 2–5)40in0.070.15UIP-P
Random Jitter(Notes 5, 6)1.31.9psRMS
CML TRANSMITTER OUTPUT (into 100Ω ±1Ω)MAX3784400600Output Voltage SwingVODifferential swing, measured
differentially at point C in Figure 1MAX3784A550750mVP-P
Transition Timetf, tr20% to 80% (Notes 5, 8)304560ps
Output ResistanceSingle ended405060Ω
MAX3784/MAX3784A
5Gbps PCB Equalizer
ELECTRICAL CHARACTERISTICS (continued)(VCC= +3V to +3.6V, TA= 0°C to +85°C. Typical values are at VCC= +3.3V and TA= +25°C, unless otherwise noted.)
Note 1:Allowed supply noise during jitter tests.
Note 2:Test pattern. This is a combination of K28.5±characters running at the full bit rate and at one-quarter the bit rate. This simu-
lates the multiplexing of four each 1.25Gbps Ethernet data streams.
Pattern (hex) 100 bits
00 FFFF F0F0 FF 0000 0F0F(quarter rate K28.5+, quarter rate K28.5-)
3EB05(K28.5±00 1111 1010 11 0000 0101)
Note 3:Difference in deterministic jitter between reference points A and C in Figure 1.
Note 4:Signal source amplitude range is 400mVP-Pto 1000mVP-Pdifferential. Signal is applied differentially at point A as shown in
Figure 1. The deterministic jitter at point B must be from media-induced loss and not from clock-source modulation.
Deterministic jitter is measured at the 50% vertical level of the signal at point C.
Note 5:Guaranteed by design and characterization.
Note 6:Test pattern is K28.5 with 40in trace.
Note 7:On-chip pullup resistor of 40kΩ(typ). Negative current indicates equalizer sources current.
Note 8:Using 00 0001 1111 or equivalent pattern. Measured over entire input voltage range, max and min media loss and within 2in
of output pins.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
ENABLE CONTROL PINInput High Voltage1.5V
Input Low Voltage0.5V
Input High Current(Note 7)-150+10µA
Input Low Current(Note 7)-150+10µA
SIGNAL
SOURCE
BACKPLANE PCB
MAX3784/MAX3784A
EQUALIZEROUT
L ≤ 40in
6mil LINE
SMA CONNECTORSMA CONNECTOR
Figure 1. Test Conditions
PARAMETERCONDITIONSMINTYPMAXUNITSTransmission Line Edge-coupled stripline 6 mils
Relative Permittivity FR-4 or similar 4.4 4.5 —
Loss Tangent FR-4 or similar 0.02 0.022 —
Metal Thickness 0.7 mils (0.5oz copper) 0.7 mils
Impedance Differential 90 100 110
Table 1. PCB Assumptions (PCB material is FR-4)
MAX3784/MAX3784A
5Gbps PCB Equalizer
Typical Operating Characteristics(VCC= +3.3V, measurements done at 5Gbps, 800mVP-Pboard input with 100-bit pattern from Note 2 of the EC Table,TA= +25°C,
unless otherwise noted.)
55mV/
div
EQUALIZER INPUT EYE DIAGRAM
BEFORE EQUALIZATION AT 5Gbps
(40in, FR-4, 6-mil STRIPLINE)MAX3784/4A toc01
32ps/div
80mV/
div
EQUALIZER OUTPUT EYE DIAGRAM
AFTER EQUALIZATION AT 5Gbps
(40in, FR-4, 6-mil STRIPLINE, MAX3784)MAX3784/4A toc02
35ps/div
80mV/
div
EQUALIZER OUTPUT EYE DIAGRAM
AFTER EQUALIZATION AT 5Gbps
(40in, FR-4, 6-mil STRIPLINE, MAX3784A)MAX3784/4A toc03
35ps/div
DIFFERENTIAL RETURN LOSSMAX3784/4A toc04
FREQUENCY (GHz)
RETURN LOSS (dB)134
DETERMINISTIC JITTER
vs. LINE LENGTH
MAX3784/4A toc05
LINE LENGTH (in)
(FR-4 6-mil STRIPLINE)
DETERMINISTIC JITTER (ps)
1.25GHz
2.5GHz
5GHz
DETERMINISTIC JITTER vs. AMPLITUDE
(20in FR-4 STRIPLINE)
MAX3784/4A toc06
INPUT AMPLITUDE (mVP-P)
(FIGURE 1, POINT A)
DETERMINISTIC JITTER (ps)
1.25GHz
2.5GHz
5GHz
DETERMINISTIC JITTER vs. AMPLITUDE
(40in FR-4 STRIPLINE)
MAX3784/4A toc07
INPUT AMPLITUDE (mVP-P)
DETERMINISTIC JITTER (ps)
1.25GHz
2.5GHz
5GHz
LATENCY vs. TEMPERATURE
MAX3784/4A toc08
TEMPERATURE (°C)
LATENCY (ps)
SUPPLY CURRENT vs. TEMPERATURE
MAX3784/4A toc09
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
ICC MAX3784
ICC MAX3784A
ISHUTDOWN
Detailed Description
General Theory of OperationThe MAX3784/MAX3784A adaptive equalizers extend
the reach of transmission lines in high-frequency back-
plane interconnect applications. They can be used for
4.25Gbps Fibre Channel, 4x 1.25Gbps Ethernet (5Gbps)
and other NRZ, 8b10b or short (≤20 bits) CID data
types. Internally, the MAX3784/MAX3784A are com-
prised of an equalizer control loop and limiting output
driver. The equalizer block reduces intersymbol interfer-
ence (ISI), compensating for frequency-dependent
media-induced loss. The equalization control detects the
spectral contents of the input signal and provides a con-
trol voltage to the equalizer core, adapting it to different
media. The equalizer operation is optimized for short-run,
Standby ModeStandby saves power when the equalizer is not in use.
The EN logic input must be set high or open for normal
operation. Logic low at EN forces the equalizer into the
standby state.
CML Input and Output BuffersThe input and output buffers are implemented using cur-
rent-mode logic (CML). Equivalent circuits are shown in
Figures 3 and 4. For details on interfacing with CML,
refer to Maxim Application Note HFAN-01.0: Introduction
to LVDS, PECL, and CML. The common-mode voltage
of the input and output is above +2.5V. AC-coupling
capacitors are required when interfacing this part with
devices terminated in voltages such as +1.8V. Values of
0.10µF or greater are recommended.
MAX3784/MAX3784A
5Gbps PCB Equalizer
Pin Description
PINNAMEFUNCTION1, 7, 12VCC+3.3V Supply VoltageIN+Positive Input, CMLIN-Negative Input, CML
4, 6, 9GNDSupply Ground
5, 8, 14, 15,N.C.No Connection. Leave unconnected.OUT-Negative Output, CMLOUT+Positive Output, CMLENEnable Equalizer. A logic high or open selects normal operation. A logic low selects low-power
standby mode.Exposed
Pad
Connect to Ground. The exposed pad must be soldered to the circuit board ground plane for proper
thermal and electrical performance.
IN+
IN-
LIMITER
5Gbps EQUALIZER
OUT+
OUT-
VCC
EQUALIZER
OFFSET
CANCELLATION
LOWPASS FILTER50Ω
100Ω
40kΩ
50Ω
VCC
MAX3784/
MAX3784A
Figure 2. Functional Diagram
MAX3784/MAX3784A
Applications Information
Alternate Data RatesThe MAX3784/MAX3784A is optimized for automatic
operation at 5Gbps. Equalization at other data rates,
such as 1.25Gbps and 2.5Gbps, is possible. See the
Typical Operating Characteristicsfor Deterministic Jitter
vs. Line Length and Deterministic Jitter vs. Amplitude
for typical performance at these data rates.
Layout ConsiderationsCircuit board layout and design can significantly affect
the MAX3784/MAX3784As’ performance. Use good
high-frequency design techniques, including minimiz-
ing ground inductance and connections and using con-
trolled-impedance transmission lines for the
high-frequency data signals. Route signals differentially
to reduce EMI susceptibility and crosstalk. Solder the
exposed pad to supply ground for proper thermal and
electrical operation.
Place power-supply decoupling capacitors as close as
possible to the VCCpins.
5Gbps PCB Equalizer50Ω
50Ω
VCC
250μA
Figure 3. CML Input Equivalent Circuit
VCC
50Ω50Ω
OUT+
OUT-
Figure 4. CML Output Equivalent Circuit
IN+
GND
OUT+GNDV
N.C.119
N.C.
N.C.
N.C.
VCC
GND
N.C.
MAX3784
MAX3784A
IN-
OUT-
TQFNTOP VIEW
* THE EXPOSED PAD MUST BE SOLDERED TO SUPPLY GROUND
FOR CORRECT THERMAL AND ELECTRICAL PERFORMANCE.
*EP
+
Pin Configurations (continued)