MAX3750CEE+-MAX3750CEE+T Fast Delivery |IC PHOENIX CO.,LIMITED

MAX3750CEE+T ,+3.3V, 2.125Gbps/1.0625Gbps Fibre-Channel Port Bypass ICsELECTRICAL CHARACTERISTICS(V = +3.0V to +3.6V, T = 0°C to +70°C, unless otherwise noted. Typical va ..
MAX3752CCM ,2.125Gbps / 3.3V Quad-Port Bypass with RepeaterFeaturesThe MAX3752 quad-port bypass IC is designed for use Four High-Speed Data Ports in the Fibr ..
MAX3760ESA ,622Mbps / Low-Noise Transimpedance Preamplifier for LAN and WAN Optical ReceiversApplicationsTypical Application Circuit622Mbps ATM LAN Optical Receivers+5V622Mbps WAN Optical Rece ..
MAX3761EEP ,Low-Power / 622Mbps Limiting Amplifiers with Chatter-Free Power Detect for LANsApplications tested and guaranteed only at T = +25°C.A622Mbps LAN/ATM LAN Receivers155Mbps LAN/ATM ..
MAX3761EEP ,Low-Power / 622Mbps Limiting Amplifiers with Chatter-Free Power Detect for LANsapplications. Interface Logic—MAX3766An integrated power detector senses the input signal’samplitud ..
MAX3761EEP ,Low-Power / 622Mbps Limiting Amplifiers with Chatter-Free Power Detect for LANsELECTRICAL CHARACTERISTICS(V = +4.5V to +5.5V, DISABLE = low, T = -40°C to +85°C, unless otherwise ..
MAX734CPA ,+12V, 120mA Flash Memory Programming Supply
MAX734CPA ,+12V, 120mA Flash Memory Programming Supply
MAX734CPA ,+12V, 120mA Flash Memory Programming Supply
MAX734CPA+ ,12V, 120mA Flash Memory Programming Supply
MAX734CSA ,+12V, 120mA Flash Memory Programming Supply
MAX734CSA ,+12V, 120mA Flash Memory Programming Supply

MAX3750CEE+-MAX3750CEE+T
+3.3V, 2.125Gbps/1.0625Gbps Fibre-Channel Port Bypass ICs
General Description
The MAX3750/MAX3751 are +3.3V, Fibre Channel port
bypass ICs that include a high-speed multiplexer and
output buffer stage for hot swapping a storage device.
These devices are optimized for use in a Fibre Channel
arbitrated loop topology.
The MAX3750 has a 2.125Gbps data rate, while the
MAX3751’s data rate is 1.0625Gbps. Total power con-
sumption (including output currents) is low: just 190mW
for the MAX3750 and 180mW for the MAX3751. Low
10ps jitter makes these devices ideal for cascaded
topologies. The output driver circuitry is tolerant of load
mismatches commonly caused by board vias and
inductive connectors. On-chip termination reduces
external part count and simplifies board layout.
Applications
2.125Gbps Fibre Channel Arbitrated Loop
1.0625Gbps Fibre Channel Arbitrated Loop
Mass Storage Systems
RAID/JBOD Applications
FeaturesSingle +3.3V Supply Low Jitter: 10psLow Power Consumption
190mW (MAX3750)
180mW (MAX3751)Large Output Signal Swing: >1000mVp-pMismatch Tolerant Output Driver Stage150ΩDifferential On-Chip Termination on All Inputs150ΩOn-Chip Back Termination on All Output
Ports
MAX3750/MAX3751
+3.3V, 2.125Gbps/1.0625Gbps
Fibre Channel Port Bypass ICs
19-4792; Rev 2; 5/04
PART
MAX3750CEE
MAX3750CEE†0°C to +70°C
0°C to +70°C
TEMP RANGEPIN-PACKAGE
16 QSOP
16 QSOP
EVALUATION KIT
AVAILABLE
Pin Configuration appears at end of data sheet.
Ordering Information
C1–C8 = 100nF
THREE MAX3750/MAX3751s CASCADED IN AN FC-AL APPLICATIONC8C2C1
MAX3750
MAX3751
MAX3750
MAX3751
MAX3750
MAX3751
FC-AL
DISK DRIVETX
FC-AL
DISK DRIVETX
LIN+
LIN-
LOUT+LOUT-
VCC
3.3V
SELGND
OUT+
OUT-
IN+
IN-
LIN+
LIN-
LOUT+LOUT-
VCC
3.3V
SELGND
OUT+
OUT-
IN+
IN-
LIN+
LIN-
LOUT+LOUT-
VCC
3.3V
SELGND
OUT+
OUT-
IN+
IN-
MICROPROCESSOR
FC-AL
DISK DRIVETX
MAX3750MAX3750MAX3750
Typical Application Circuit
MAX3751CEE0°C to +70°C16 QSOP
†Denotes lead-free package.
MAX3750/MAX3751
+3.3V, 2.125Gbps/1.0625Gbps
Fibre Channel Port Bypass ICs
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(VCC= +3.0V to +3.6V, TA= 0°C to +70°C, unless otherwise noted. Typical values are at VCC= +3.3V and TA= +25°C.)
Note 1:Output currents included.
Supply Voltage, VCC..............................................-0.5V to +5.0V
Voltage at LOUT+, LOUT-,
OUT+, OUT-..............................(VCC- 1.65V) to (VCC+ 0.5V)
Current Out of LOUT+, LOUT-, OUT+, OUT-...................±22mA
Voltage at SEL, LIN+, LIN-, IN+, IN-..........-0.5V to (VCC+ 0.5V)
Differential Voltage at (LIN+ - LIN-), (IN+ - IN-).....................±2V
Continuous Power Dissipation (TA= +70°C)
16 QSOP (derate 8.3mW/°C above +70°C).................667mW
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range...............................-55°C to 150°C
Lead Soldering Temperature (soldering, 10s).................+300°C
Total differential signal, peak-to-peak
MAX3750 (Note 1)
150Ωload, total differential signal,
peak-to-peak
CONDITIONS132150172Differential Input Impedance20022005784Supply Current
Data Input Voltage Swing10001600Output Voltage at LOUT±and OUT±-1010TTL Input Current-0.30.8TTL Input Low2VCC+ 0.3TTL Input High
UNITSMINTYPMAXPARAMETER
MAX3751 (Note 1)5478
MAX37511.0625
Total differential signal, peak-to-peak
MAX3750
MAX3750
CONDITIONS2002200Data Input Voltage Swing
Gbps2.125Data Rate
Output Edge Speed
IN±→OUT±, IN±→LOUT±ps160
UNITSMINTYPMAXPARAMETER
AC ELECTRICAL CHARACTERISTICS
(VCC= +3.0V to +3.6V, TA= 0°C to +70°C, unless otherwise noted. Typical values are at VCC= +3.3V and TA= +25°C.)
Deterministic Jitter
IN±→OUT±, IN±→LOUT±, LIN±→OUT±
MAX3750, peak-to-peak (Notes 2, 4)10psMAX3751, peak-to-peak (Notes 3, 4)10
MAX3750, RMS(Note 2)1.6ps
Prop Delay
IN±→OUT±, IN±→LOUT±, LIN±→OUT±MAX3751442
Random Jitter
IN±→OUT±, IN±→LOUT±, LIN±→OUT±MAX3751, RMS(Note 3)1.6
MAX3751325
Note 2:Input tRand tF< 150ps, 20% to 80%.
Note 3:Input tRand tF< 300ps, 20% to 80%.
Note 4:Deterministic jitter is measured with 20 bits of the k28.5 pattern (00111110101100000101).
MAX3750300ps
MAX3750/MAX3751
+3.3V, 2.125Gbps/1.0625Gbps
Fibre Channel Port Bypass ICs
SUPPLY CURRENT vs. TEMPERATURE
MAX3750/51 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
MAX3750
MAX3751
Typical Operating Characteristics
(VCC= 3.3V, TA = +25°C, unless otherwise noted.)
NAMEFUNCTION
1, 4, 5, 8, 16GNDElectrical GroundLOUT+Noninverted Port Data Output
PINLOUT-Inverted Port Data OutputOUT+Noninverted Data OutputLIN+Noninverted Port Data InputLIN-Inverted Port Data InputSEL
Select Input:
SEL = Low: IN±→OUT±
SEL = High: LIN±→OUT±OUT-Inverted Data OutputIN+Noninverted Data InputIN-Inverted Data Input
12, 13VCCPositive Supply Voltage
Pin Description
MAX3750/MAX3751
+3.3V, 2.125Gbps/1.0625Gbps
Fibre Channel Port Bypass ICs
_________________Circuit Description
A simplified block diagram of the single port bypass is
shown in Figure 1. IN+ and IN- drive an input buffer
(INBUFF) with 150Ωof internal differential input termi-
nation. INBUFF drives an output buffer (LOBUFF) and
an input to a multiplexer (MUX).
A low TTL input at SEL selects the signal path of
INBUFF through MUX to the output buffer (OUTBUFF).
When SEL has a high TTL logic level present the signal
path is into LIBUFF, through MUX, to OUTBUFF.
Low-Frequency Cutoff
The low-frequency cutoff is determined by the input
resistance and the coupling capacitor as illustrated by
the following equation:= 1 / (2πRC)
In a typical system where R = 150Ωand C = 100nF,
resulting in fC= 10kHz.
Layout Techniques
The MAX3750/MAX3751 are high-frequency products.
The performance of the circuit is largely dependent
upon layout of the circuit board. Use a multilayer circuit
board with dedicated ground and VCCplanes. Power
supplies should be capacitively bypassed to the
ground plane with surface-mount capacitors placed
near the power-supply pins.
SEL
NOTE: SEE INTERNAL INPUT/OUTPUT SCHEMATICS FOR DETAILED TERMINATIONS (FIGURES 2–5).
INBUFF
LOBUFFLIBUFF
IN+
IN-
MUXQ
SEL
TTLIN
OUTBUFF
OUT+
OUT-
VCC
GND
LOUT+
LOUT-
LIN+
LIN-
MAX3750
MAX3751
Figure 1. MAX3750/MAX3751 Block Diagram
MAX3750/MAX3751
+3.3V, 2.125Gbps/1.0625Gbps
Fibre Channel Port Bypass ICs
75Ω75Ω
(L)OUT+
ESD
STRUCTURES
(L)OUT-
VCC
GND
VCC
GND
SEL
ESD
STRUCTURE
VCC
GND
75Ω75Ω
(L)IN+
ESD
STRUCTURE
(L)IN-
Figure 2. LOUT/OUT Pins Internal Input/Output Schematic
Figure 4. LIN/IN Pins Internal Input/Output Schematic
Figure 3. SEL Pin Internal Input/Output Schematic
Figure 5. 50ΩTermination Applications
300Ω300Ω
OUT+
OUT-
MAX3750
MAX3751
IN+
IN-
176Ω176Ω
43Ω
43Ω
43Ω
43Ω
OUT+
OUT-
MAX3750
MAX3751
IN+
IN-
MAX3750/MAX3751
+3.3V, 2.125Gbps/1.0625Gbps
Fibre Channel Port Bypass ICs
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
QSOP.EPS
GNDGND
IN+
IN-
VCC
VCC
LIN+
LIN-
SEL
TOP VIEW
MAX3750
MAX3751
LOUT+
LOUT-
OUT+
GND
GND
OUT-
GND
QSOP
Pin Configuration
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to /packages.)

Partno	Mfg	Dc	Qty	Available	Descript
MAX3750CEE+	MAXIM	N/a	76	avai	+3.3V, 2.125Gbps/1.0625Gbps Fibre-Channel Port Bypass ICs
MAX3750CEE+T	MAXIM	N/a	550	avai	+3.3V, 2.125Gbps/1.0625Gbps Fibre-Channel Port Bypass ICs