MAX3373EEKA+T ,±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSPELECTRICAL CHARACTERISTICS(V = +1.65V to +5.5V, V = +1.2V to (V + 0.3V), GND = 0, I/O V and I/O V u ..
MAX3373EEKA-T ,15kV ESD-Protected / 1A / 16Mbps / Dual/Quad Low-Voltage Level Translators in UCSPApplications2SPI™, MICROWIRE™, and I C™ LevelI/O V 2 1 8 I/O V 1CC CCTranslation Low-Voltage ASIC L ..
MAX3373EEKA-T ,15kV ESD-Protected / 1A / 16Mbps / Dual/Quad Low-Voltage Level Translators in UCSPApplications2SPI™, MICROWIRE™, and I C™ LevelI/O V 2 1 8 I/O V 1CC CCTranslation Low-Voltage ASIC L ..
MAX3374EEKA ,±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSPapplications that route sig-PART TEMP RANGEPACKAGEnals externally. The MAX3372E/MAX3377E operate at ..
MAX3374EEKA+T ,±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSPApplications+® 2SPI, MICROWIRE , and I C Level I/O V 1 1 14 VL CCTranslation I/O V 2 2 13 I/0 V 1L ..
MAX3375EEBL+T ,±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSP MAX3372E–MAX3379E/MAX3390E–MAX3393E±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level ..
MAX703CSA-T ,Low-Cost Microprocessor Supervisory Circuits with Battery BackupElectrical Characteristics(V = +4.75V to +5.5V for MAX703, V = +4.5V to +5.5V for MAX704, V = 2.8V, ..
MAX703EPA ,Low-Cost レP Supervisory Circuits with Battery BackupGeneral Description
The MAX703 and MAX704 microprocessor (pP) super-
visory circuits reduce the ..
MAX703ESA ,Low-Cost レP Supervisory Circuits with Battery BackupGeneral Description
The MAX703 and MAX704 microprocessor (pP) super-
visory circuits reduce the ..
MAX703ESA ,Low-Cost レP Supervisory Circuits with Battery BackupFeatures
. Battery-Backup Power Switching
. Precision _Supply-Voltage Monitor
MAX703
MAX704 ..
MAX703ESA ,Low-Cost レP Supervisory Circuits with Battery BackupFeatures
. Battery-Backup Power Switching
. Precision _Supply-Voltage Monitor
MAX703
MAX704 ..
MAX703ESA+ ,Low-Cost Microprocessor Supervisory Circuits with Battery BackupFeatures● Battery-Backup Power SwitchingThe MAX703/MAX704 microprocessor (μP) supervisory ● Precisi ..
MAX3372EEKA+T-MAX3373EEBL-MAX3373EEBL+-MAX3373EEKA-MAX3373EEKA+T-MAX3374EEKA-MAX3374EEKA+T-MAX3375EEBL+T-MAX3375EEKA-MAX3375EEKA+T-MAX3377EETD+T-MAX3377EEUD+T-MAX3378EEBC+T-MAX3378EEUD+-MAX3378EEUD+T-MAX3390EEUD+-MAX3391EEUD+-MAX3391EEUD+T-MAX3392EEBC-MAX3392EEUD
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSP
General DescriptionThe MAX3372E–MAX3379E and MAX3390E–MAX3393E
±15kV ESD-protected level translators provide the level
shifting necessary to allow data transfer in a multivoltage
system. Externally applied voltages, VCCand VL, set the
logic levels on either side of the device. A low-voltage
logic signal present on the VLside of the device appears
as a high-voltage logic signal on the VCCside of the
device, and vice-versa. The MAX3374E/MAX3375E/
MAX3376E/MAX3379E and MAX3390E–MAX3393E unidi-
rectional level translators level shift data in one direction
(VL→VCCor VCC→VL) on any single data line. The
MAX3372E/MAX3373E and MAX3377E/MAX3378E bidi-
rectional level translators utilize a transmission-gate-
based design (Figure 2) to allow data translation in either
direction (VL↔VCC) on any single data line. The
MAX3372E–MAX3379E and MAX3390E–MAX3393E
accept VLfrom +1.2V to +5.5V and VCCfrom +1.65V to
+5.5V, making them ideal for data transfer between low-
voltage ASICs/PLDs and higher voltage systems.
All devices in the MAX3372E–MAX3379E, MAX3390E–
MAX3393E family feature a three-state output mode that
reduces supply current to less than 1µA, thermal short-
circuit protection, and ±15kV ESD protection on the VCC
side for greater protection in applications that route sig-
nals externally. The MAX3372E/MAX3377E operate at a
guaranteed data rate of 230kbps. Slew-rate limiting
reduces EMI emissions in all 230kbps devices. The
MAX3373E–MAX3376E/MAX3378E/MAX3379E and
MAX3390E–MAX3393E operate at a guaranteed data rate
of 8Mbps over the entire specified operating voltage
range. Within specific voltage domains, higher data rates
are possible. (See the Timing Characteristics table.)
The MAX3372E–MAX3376E are dual level shifters
available in 3 x 3 UCSP™, 8-pin TDFN, and 8-pin
SOT23-8 packages. The MAX3377E/MAX3378E/
MAX3379E and MAX3390E–MAX3393E are quad level
shifters available in 3 x 4 UCSP, 14-pin TDFN, and 14-
pin TSSOP packages.
________________________ApplicationsSPI, MICROWIRE®, and I2C Level
Translation
Low-Voltage ASIC Level Translation
Smart Card Readers
Cell-Phone Cradles
Portable POS Systems
Portable Communication Devices
Low-Cost Serial Interfaces
Cell Phones
GPS
FeaturesGuaranteed Data Rate Options
230kbps
8Mbps (+1.2V ≤VL≤
VCC≤
+5.5V)
10Mbps (+1.2V ≤VL≤
VCC≤
+3.3V)
16Mbps (+1.8V ≤VL≤
VCC≤
+2.5V and
+2.5V ≤VL≤
VCC+3.3V)Bidirectional Level Translation
(MAX3372E/MAX3373E and
MAX3377E/MAX3378E)Operation Down to +1.2V on VL±15kV ESD Protection on I/O VCCLinesUltra-Low 1µA Supply Current in Three-State
Output ModeLow-Quiescent Current (130µA typ)UCSP, TDFN, SOT23, and TSSOP Packages Thermal Short-Circuit Protection
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSPVCC
I/0 VCC1
I/0 VCC2
N.C.N.C.
I/O VL2
I/O VL1
MAX3377E/
MAX3378E
I/0 VCC3
GND
I/O VL4
I/O VL3
TDFN-14
(3mm x 3mm)THREE-STATE
I/0 VCC4
TOP VIEW
Pin Configurations
MAX3372E–MAX3379E/
MAX3390E–MAX3393E
Ordering InformationUCSP is a trademark of Maxim Integrated Products, Inc.
MICROWIRE is a registered trademark of National
Semiconductor Corp.
Ordering Information continued at end of data sheet.
Selector Guide appears at end of data sheet.Pin Configurations continued at end of data sheet.
PARTTEMP RANGEPIN-
PACKAGE
MAX3372EEKA+T-40°C to +85°C8 SOT23
+Denotes a lead-free package.
T = Tape and reel.
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VCC= +1.65V to +5.5V, VL= +1.2V to (VCC+ 0.3V), GND = 0, I/O VL_and I/O VCC_unconnected, TA= TMINto TMAX, unless other-
wise noted. Typical values are at VCC= +3.3V, VL= +1.8V, TA= +25°C.) (Notes 1, 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND.)
VCC...........................................................................-0.3V to +6V
I/O VCC_......................................................-0.3V to (VCC+ 0.3V)
I/O VL_...........................................................-0.3V to (VL+ 0.3V)
THREE-STATE...............................................-0.3V to (VL+ 0.3V)
Short-Circuit Duration I/O VL, I/O VCCto GND...........Continuous
Short-Circuit Duration I/O VLor I/O VCCto GND
Driven from 40mA Source
(except MAX3372E and MAX3377E).....................Continuous
Continuous Power Dissipation (TA= +70°C)
8-Pin SOT23 (derate 5.6mW/°C above +70°C)........444.4mW
8-Pin TDFN (derate 18.5mW/°C above +70°C)........1482mW
3 x 3 UCSP (derate 4.7mW/°C above +70°C)............379mW
3 x 4 UCSP (derate 6.5mW/°C above +70°C)............520mW
14-Pin TSSOP (derate 9.1mW/°C above +70°C)........727mW
14-Pin TDFN (derate 18.5mW/°C above +70°C)......1482mW
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
Soldering Temperature (reflow).......................................+260°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
POWER SUPPLIESVL Supply RangeVL1.25.5V
VCC Supply RangeVCC1.655.50V
Supply Current from VCCIQVCC130300µA
Supply Current from VLIQVL16100µA
VCC Three-State Output Mode
Supply CurrentITHREE-STATE-VCCTA = +25°C, THREE-STATE = GND0.031µA
VL Three-State Output Mode
Supply CurrentITHREE-STATE-VLTA = +25°C, THREE-STATE = GND0.031µA
Three-State Output Mode
Leakage Current
I/O VL_ and I/O VCC_
ITHREE-STATE-LKGTA = +25°C, THREE-STATE = GND0.021µA
THREE-STATE P in Inp ut Leakag eTA = +25°C0.021µA
ESD PROTECTIONIEC 1000-4-2 Air-Gap Discharge±8
IEC 1000-4-2 Contact Discharge±8I/O VCC (Note 3)
Human Body Model±15
LOGIC-LEVEL THRESHOLDS (MAX3372E/MAX3377E)I/O VL_ Input-Voltage HighVIHLVL - 0.2V
I/O VL_ Input-Voltage LowVILL0.15V
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
ELECTRICAL CHARACTERISTICS (continued)(VCC= +1.65V to +5.5V, VL= +1.2V to (VCC+ 0.3V), GND = 0, I/O VL_and I/O VCC_unconnected, TA= TMINto TMAX, unless other-
wise noted. Typical values are at VCC= +3.3V, VL= +1.8V, TA= +25°C.) (Notes 1, 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSI/O VCC_ Input-Voltage HighVIHCVCC - 0.4V
I/O VCC_ Input-Voltage LowVILC0.15V
I/O VL_ Output-Voltage HighVOHLI/O VL_ source current = 20µA,
I/O VCC_ > VCC - 0.4V0.67 ✕ VLV
I/O VL_ Output-Voltage LowVOLLI/O VL_ sink current = 20µA,
I/O VCC_ < 0.15V0.4V
I/O VCC_ Output-Voltage HighVOHCI/O VCC_ source current = 20µA,
I/O VL _ > VL - 0.2V0.67 ✕ VCCV
I/O VCC_ Output-Voltage LowVOLCI/O VCC_ sink current = 20µA,
I/O VL_ < 0.15V0.4V
THREE-STATE Input-Voltage
HighVIL-THREE-STATEVL - 0.2V
THREE-STATE Input-Voltage
LowVIL-THREE-STATE0.15V
LOGIC-LEVEL THRESHOLDS (MAX3373E–MAX3376E/MAX3378E/MAX3379E and MAX3390E–MAX3393E)I/O VL_ Input-Voltage HighVIHLVL - 0.2V
I/O VL_ Input-Voltage LowVILL0.15V
I/O VCC_ Input-Voltage HighVIHCVCC - 0.4V
I/O VCC_ Input-Voltage LowVILC0.15V
I/O VL_ Output-Voltage HighVOHLI/O VL_ source current = 20µA,
I/O VCC_ ≥ VCC - 0.4V0.67 ✕ VLV
I/O VL_ Output-Voltage LowVOLLI/O VL_ sink current = 1mA,
I/O VCC_ ≤ 0.15V0.4V
I/O VCC_ Output-Voltage HighVOHCI/O VCC_ source current = 20µA,
I/O VL_ ≥ VL - 0.2V0.67 ✕ VCCV
I/O VCC_ Output-Voltage LowVOLCI/O VCC_ sink current = 1mA,
I/O VL_ ≤ 0.15V0.4V
THREE-STATE Input-Voltage
HighVIH-THREE-STATEVL - 0.2V
THREE-STATE Input-Voltage
LowVIL-THREE-STATE0.15V
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
TIMING CHARACTERISTICS(VCC= +1.65V to +5.5V, VL= +1.2V to (VCC+ 0.3V), GND = 0, RLOAD= 1MΩ, I/O test signal of Figure 1, TA= TMINto TMAX, unless
otherwise noted. Typical values are at VCC= +3.3V, VL= +1.8V, TA= +25°C, unless otherwise noted.) (Notes 1, 2)
PARAMETERSYM B O L CONDITIONSMINTYPMAXUNITS
MAX3372E/MAX3377E (CLOAD = 50pF)I/O VCC_ Rise Time (Note 4)tRVCC1100ns
I/O VCC_ Fall Time (Note 5)tFVCC1000ns
I/O VL _ Rise Time (Note 4)tRVL600ns
I/O VL _ Fall Time (Note 5)tFVL1100ns
I/OVL-VCCDriving I/O VL _1.6Propagation DelayI/OVCC-VLDriving I/O VCC_1.6µs
Channel-to-Channel SkewtSKEWEach translator equally loaded500ns
Maximum Data RateCL = 25pF230kbps
A X3 3 7 3 E– M A X3 3 7 6 E/M A X3 3 7 8 E/ M A X3 3 7 9 E a n d M A X3 3 9 0 E– M A X3 3 9 3 E ( C LOA D = 15 p F , Dr iv e r O u t p u t Im p e d a n c e ≤ 5 0 Ω)
+1.2V ≤ VL ≤ VCC ≤ +5.5V725I/O VCC_ Rise Time (Note 4)tRVCCOpen-drain driving170400ns
637I/O VCC_ Fall Time (Note 5)tFVCCOpen-drain driving2050ns
830I/O VL _ Rise Time (Note 4)tRVLOpen-drain driving180400ns
330I/O VL _ Fall Time (Note 5)tLFVOpen-drain driving3060ns
530I/OVL-VCCDriving I/O VL _Open-drain driving2101000
430Propagation Delay
I/OVCC-VLDriving I/O VCC_Open-drain driving1901000Channel-to-Channel SkewtSKEWEach translator
equally loadedOpen-drain driving50nsMbpsMaximum Data RateOpen-drain driving500kbps
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
Note 1:All units are 100% production tested at TA= +25°C. Limits over the operating temperature range are guaranteed by design
and not production tested.
Note 2:For normal operation, ensure VL< (VCC+ 0.3V). During power-up, VL> (VCC+ 0.3V) will not damage the device.
Note 3:To ensure maximum ESD protection, place a 1µF capacitor between VCCand GND. See Applications Circuits.
Note 4:10% to 90%
Note 5:90% to 10%
TIMING CHARACTERISTICS (continued)(VCC= +1.65V to +5.5V, VL= +1.2V to (VCC+ 0.3V), GND = 0, RLOAD= 1MΩ, I/O test signal of Figure 1, TA= TMINto TMAX, unless
otherwise noted. Typical values are at VCC= +3.3V, VL= +1.8V, TA= +25°C, unless otherwise noted.) (Notes 1, 2)
PARAMETERSYM B O L CONDITIONSMINTYPMAXUNITS
+1.2V ≤ VL ≤ VCC ≤ +3.3VI/O VCC_ Rise Time (Note 4)tRVCC25ns
I/O VCC_ Fall Time (Note 5)tFVCC30ns
I/O VL _ Rise Time (Note 4)tRVL30ns
I/O VL _ Fall Time (Note 5)tFVL30ns
I/OVL-VCCDriving I/O VL _20Propagation DelayI/OVCC-VLDriving I/O VCC_20ns
Channel-to-Channel SkewtSKEWEach translator equally loaded10ns
Maximum Data Rate10Mbps
+2.5V ≤ VL ≤ VCC ≤ +3.3VI/O VCC_ Rise Time (Note 4)tRVCC15ns
I/O VCC_ Fall Time (Note 5)tFVCC15ns
I/O VL _ Rise Time (Note 4)tRVL15ns
I/O VL _ Fall Time (Note 5)tFVL15ns
I/OVL-VCCDriving I/O VL _15Propagation DelayI/OVCC-VLDriving I/O VCC_15ns
Channel-to-Channel SkewtSKEWEach translator equally loaded10ns
Maximum Data Rate16Mbps
+1.8V ≤ VL ≤ VCC ≤ +2.5VI/O VCC_ Rise Time (Note 4)tRVCC15ns
I/O VCC_ Fall Time (Note 5)tFVCC15ns
I/O VL _ Rise Time (Note 4)tRVL15ns
I/O VL _ Fall Time (Note 5)tFVL15ns
I/OVL-VCCDriving I/O VL _15Propagation DelayI/OVCC-VLDriving I/O VCC_15ns
Channel-to-Channel SkewtSKEWEach translator equally loaded10ns
Maximum Data Rate16Mbps
Typical Operating Characteristics(RLOAD= 1MΩ, TA = +25°C, unless otherwise noted. All 230kbps TOCs apply to MAX3372E/MAX3377E only. All 8Mbps and
500kbps TOCs apply to MAX3373E–MAX3376E/MAX3378E/MAX3379E and MAX3390E–MAX3393E only.)
VL SUPPLY CURRENT vs. SUPPLY VOLTAGE
(DRIVING I/O VL, VCC = +3.3V, VL = +1.8V)MAX3372E toc01
VCC (V)
SUPPLY CURRENT (
8Mbps, CLOAD = 15pF
230kbps, CLOAD = 50pF
500kbps, OPEN-DRAIN, CLOAD = 15pF
VCC SUPPLY CURRENT vs. SUPPLY VOLTAGE
(DRIVING I/O VL, VCC = +3.3V, VL = +1.8V)MAX3372E toc02
VCC (V)
SUPPLY CURRENT (mA)
8Mbps, CLOAD = 15pF
230kbps, CLOAD = 50pF
500kbps, OPEN-DRAIN, CLOAD = 15pF
VL SUPPLY CURRENT vs. TEMPERATURE
(DRIVING I/O VCC, VCC = +3.3V, VL = +1.8V)MAX3372E toc03
TEMPERATURE (°C)
SUPPLY CURRENT (35-1510
8Mbps, CLOAD = 15pF
230kbps, CLOAD = 50pF
500kbps, OPEN-DRAIN, CLOAD = 15pF
VCC SUPPLY CURRENT vs. TEMPERATURE
(DRIVING I/O VCC, VCC = +3.3V, VL = +1.8V)MAX3372E toc04
TEMPERATURE (°C)
SUPPLY CURRENT (35-1510
8Mbps, CLOAD = 15pF
230kbps, CLOAD = 50pF
500kbps, OPEN-DRAIN, CLOAD = 15pF
VL SUPPLY CURRENT vs. CAPACITIVE LOAD
(DRIVING I/O VL, VCC = +3.3V, VL = +1.8V)MAX3372E toc05
CAPACITIVE LOAD (pF)
SUPPLY CURRENT (70554025
8Mbps
230kbps
500kbps, OPEN-DRAIN
VCC SUPPLY CURRENT vs. CAPACITIVE LOAD
(DRIVING I/O VL, VCC = +3.3V, VL = +1.8V)MAX3372E toc06
CAPACITIVE LOAD (pF)
SUPPLY CURRENT (70554025
8Mbps
230kbps
500kbps, OPEN-DRAIN
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O VL, VCC = +3.3V, VL = +1.8V)MAX3372E toc07
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)807060504030
DATA RATE = 230kbps
tHL
tLH
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O VL, VCC = +3.3V, VL = +1.8V)MAX3372E toc08
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)40303520251550
DATA RATE = 8Mbps
tHL
tLH
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O VL, VCC = +3.3V, VL = +1.8V)MAX3372E toc09
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)403530252015
tLH
tHL
DATA RATE = 500kbps,
OPEN-DRAIN
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
PROPAGATION DELAY vs. CAPACITIVE LOAD
(DRIVING I/O VL, VCC = +3.3V, VL = +1.8V)MAX3372E toc10
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)807060504030
DATA RATE = 230kbps
tPHL
tPLH
PROPAGATION DELAY vs. CAPACITIVE LOAD
(DRIVING I/O VL, VCC = +3.3V, VL = +1.8V)MAX3372E toc11
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)40353025201550
DATA RATE = 8Mbps
tPLH
tPHL
PROPAGATION DELAY vs. CAPACITIVE LOAD
(DRIVING I/O VL, VCC = +3.3V, VL = +1.8V)MAX3372E toc12
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)403530252015
DATA RATE = 500kbps,
OPEN-DRAIN
tPHL
tPLH
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O VL, VCC = +2.5V, VL = +1.8V)MAX3372E toc13
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)807060504030
DATA RATE = 230kbps
tHL
tLH
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O VL, VCC = +2.5V, VL = +1.8V)MAX3372E toc14
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)40353025201550
DATA RATE = 8Mbps
tLH
tHL
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O VCC, VCC = +2.5V, VL = +1.8V)MAX3372E toc15
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)403530252015
DATA RATE = 500kbps,
OPEN-DRAIN
tHL
tLH
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O VCC, VCC = +3.3V, VL = +1.8V)MAX3372E toc16
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)807060504030
DATA RATE = 230kbps
tLH
tHL
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O VCC, VCC = +3.3V, VL = +1.8V)MAX3372E toc17
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)40353025201550
DATA RATE = 8Mbps
tHL
tLH
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O VCC, VCC = +3.3V, VL = +1.8V)MAX3372E toc18
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)403530252015
DATA RATE = 500kbps,
OPEN-DRAIN
tHL
tLH
Typical Operating Characteristics (continued)(RLOAD= 1MΩ, TA = +25°C, unless otherwise noted. All 230kbps TOCs apply to MAX3372E/MAX3377E only. All 8Mbps and
500kbps TOCs apply to MAX3373E–MAX3376E/MAX3378E/MAX3379E and MAX3390E–MAX3393E only.)
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
Typical Operating Characteristics (continued)(RLOAD= 1MΩ, TA = +25°C, unless otherwise noted. All 230kbps TOCs apply to MAX3372E/MAX3377E only. All 8Mbps and
500kbps TOCs apply to MAX3373E–MAX3376E/MAX3378E/MAX3379E and MAX3390E–MAX3393E only.)
PROPAGATION DELAY vs. CAPACITIVE LOAD
(DRIVING I/O VCC, VCC = +3.3V, VL = +1.8V)MAX3372E toc19
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)807060504030
DATA RATE = 230kbps
tPHL
tPHL
PROPAGATION DELAY vs. CAPACITIVE LOAD
(DRIVING I/O VCC, VCC = +3.3V, VL = +1.8V)MAX3372E toc20
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)40353025201550
DATA RATE = 8Mbps
tPLH
tPHL
PROPAGATION DELAY vs. CAPACITIVE LOAD
(DRIVING I/O VCC, VCC = +3.3V, VL = +1.8V)MAX3372E toc21
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)403530252015
DATA RATE = 500kbps,
OPEN-DRAIN
tPHL
tPLH
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O VCC, VCC = +2.5V, VL = +1.8V)MAX3372E toc22
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)807060504030
DATA RATE = 230kbps
tLH
tHL
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O VCC, VCC = +2.5V, VL = +1.8V)MAX3372E toc23
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)302050
tLH
tHL
DATA RATE = 8Mbps
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O VCC, VCC = +2.5V, VL = +1.8V)MAX3373E toc24
CAPACITIVE LOAD (pF)
RISE/FALl TIME (ns)3020
DATA RATE = 500kbps,
OPEN-DRAINtLH
tHL
RAIL-TO-RAIL DRIVING
(DRIVING I/O VL, VCC = +3.3V, VL = +1.8V,
CLOAD = 50pF, DATA RATE = 230kbps)MAX3372E toc25
I/O VL_
I/O VCC_
1V/div
2V/div
1μs/div
RAIL-TO-RAIL DRIVING
(DRIVING I/O VL, VCC = +3.3V, VL = +1.8V,
CLOAD = 15pF, DATA RATE = 8Mbps)MAX3372E toc26
I/O VL_
I/O VCC_
1V/div
2V/div
200ns/div
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
Typical Operating Characteristics (continued)(RLOAD= 1MΩ, TA = +25°C, unless otherwise noted. All 230kbps TOCs apply to MAX3372E/MAX3377E only. All 8Mbps and
500kbps TOCs apply to MAX3373E–MAX3376E/MAX3378E/MAX3379E and MAX3390E–MAX3393E only.)
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
EXITING THREE-STATE OUTPUT MODE
(VCC = +3.3V, VL = +1.8V, CLOAD = 50pF)MAX3372E toc28
I/O VL_
I/O VCC_
2μs/div
THREE-STATE
2V/div
1V/div
1V/div
Pin Description
PIN
3 x 4
UCSP
TSSOPSOT23-83 x 3
UCSP
8 TDFN-
14 TDFN-
NAMEFUNCTION25C261I/O VL1Input/Output 1. Referenced to VL. (Note 6)34C382I/O VL2Input/Output 2. Referenced to VL. (Note 6)4———5I/O VL3Input/Output 3. Referenced to VL. (Note 6)5———6I/O VL4Input/Output 4. Referenced to VL. (Note 6)147A1414VCCVCC Input Voltage +1.65V ≤ VCC ≤ +5.5V.13C1710VLLogic Input Voltage +1.2V ≤ VL ≤ (VCC + 0.3V)86B153THREE-
STATE
Thr ee- S tate Outp ut M od e E nab l e. P ul l THRE E - S TATE l ow
to p l ace d evi ce i n thr ee- state outp ut m od e. I/O V C C _ and
I/O V L_ ar e hi g h i m p ed ance i n thr ee- state outp ut m od e.
o t e : Log i c r efer enced to V L ( for l og i c thr eshol d s see thel ectr i cal C har acter i sti cs tab l e) .72B327GNDGround138A2313I/O VCC1Input/Output 1. Referenced to VCC. (Note 6)121A3112I/O VCC2Input/Output 2. Referenced to VCC. (Note 6)11———9I/O VCC3Input/Output 3. Referenced to VCC. (Note 6)10———8I/O VCC4Input/Output 4. Referenced to VCC. (Note 6)6, 9—B2—4, 11N.C.No Connection. Not internally connected.—————EPExposed Pad. Connect EP to ground.
Note 6:For unidirectional devices (MAX3374E/MAX3375E/MAX3376E/MAX3379E and MAX3390E–MAX3393E) see the Pin
Configurationsfor input/output configurations.
OPEN-DRAIN DRIVING
(DRIVING I/O VL, VCC = +3.3V, VL = +1.8V,
CLOAD = 15pF, DATA RATE = 500kbps)MAX3372E toc27
I/O VL_
I/O VCC_
1V/div
2V/div
200ns/div
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
Detailed DescriptionThe MAX3372E–MAX3379E and MAX3390E–MAX3393E
ESD-protected level translators provide the level shifting
necessary to allow data transfer in a multivoltage system.
Externally applied voltages, VCCand VL, set the logic lev-
els on either side of the device. A low-voltage logic signal
present on the VLside of the device appears as a high-
voltage logic signal on the VCCside of the device, and
vice-versa. The MAX3374E/MAX3375E/MAX3376E/
MAX3379E and MAX3390E–MAX3393E unidirectional
level translators level shift data in one direction (VL→
VCCor VCC→VL) on any single data line. The
MAX3372E/MAX3373E and MAX3377E/MAX3378E bidi-
rectional level translators utilize a transmission-gate-
based design (see Figure 2) to allow data translation in
either direction (VL↔VCC) on any single data line. The
MAX3372E–MAX3379E and MAX3390E–MAX3393E
accept VLfrom +1.2V to +5.5V and VCCfrom +1.65V to
+5.5V, making them ideal for data transfer between low-
voltage ASICs/PLDs and higher voltage systems.
All devices in the MAX3372E–MAX3379E, MAX3390E–
MAX3393E family feature a three-state output mode that
reduces supply current to less than 1µA, thermal short-
circuit protection, and ±15kV ESD protection on the VCC
side for greater protection in applications that route sig-
nals externally. The MAX3372E/MAX3377E operate at a
guaranteed data rate of 230kbps. Slew-rate limiting
reduces EMI emissions in all 230kbps devices. The
MAX3373E–MAX3376E/MAX3378E/MAX3379E and
MAX3390E–MAX3393E operate at a guaranteed data rate
of 8Mbps over the entire specified operating voltage
range. Within specific voltage domains, higher data rates
are possible. (See the Timing Characteristics table.)
MAX3372E–MAX3379E
AND MAX3390E–MAX3393E
I/O VL_
I/O VL_
(tRISE,
tFALL < 10ns)
DATA
I/O VCC_
RLOADCLOAD
VCC
VCC
GND
tPD-VCC-LHtPD-VCC-HL
I/O VCC_
tRVCCtFVCC
Figure 1a. Rail-to-Rail Driving I/O VL
MAX3372E–MAX3379E
AND MAX3390E–MAX3393E
I/O VL_
I/O VCC_
(tRISE,
tFALL < 10ns)
DATA
I/O VCC_
VCC
VCC
GNDRLOADCLOAD
tPD-VL-LHtPD-VL-HL
I/O VL_
tRVLtFVL
Figure 1b. Rail-to-Rail Driving I/O VCC
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
Level TranslationFor proper operation ensure that +1.65V ≤VCC≤
+5.5V, +1.2V ≤VL≤+5.5V, and VL≤(VCC+ 0.3V).
During power-up sequencing, VL≥(VCC+ 0.3V) will
not damage the device. During power-supply sequenc-
ing, when VCCis floating and VLis powering up, a cur-
rent may be sourced, yet the device will not latch up.
The speed-up circuitry limits the maximum data rate for
devices in the MAX3372E–MAX3379E, MAX3390E–
MAX3393E family to 16Mbps. The maximum data rate
also depends heavily on the load capacitance (see the
Typical Operating Characteristics), output impedance
of the driver, and the operational voltage range (see the
Timing Characteristicstable).
Speed-Up CircuitryThe MAX3373E–MAX3376E/MAX3378E/MAX3379E and
MAX3390E–MAX3393E feature a one-shot generator that
decreases the rise time of the output. When triggered,
MOSFETs PU1 and PU2 turn on for a short time to pull up
I/O VL_and I/O VCC_to their respective supplies (see
Figure 2b). This greatly reduces the rise time and propa-
gation delay for the low-to-high transition. The scope
photo of Rail-to-Rail Driving for 8Mbps Operation in the
Typical Operating Characteristicsshows the speed-up
circuitry in operation.
Rise-Time AcceleratorsThe MAX3373E–MAX3376E/MAX3378E/MAX3379E and
the MAX3390E–MAX3393E have internal rise-time
accelerators allowing operation up to 16Mbps. The
rise-time accelerators are present on both sides of the
device and act to speed up the rise time of the input
and output of the device, regardless of the direction of
the data. The triggering mechanism for these accelera-
tors is both level and edge sensitive. To prevent false
triggering of the rise-time accelerators, signal fall times
of less than 20ns/V are recommended for both the
inputs and outputs of the device. Under less noisy con-
ditions, longer signal fall times may be acceptable.
MAX3372E–MAX3379E
AND MAX3390E–MAX3393E
I/O VL_I/O VCC_
VCC
VCC
GND
I/O VCC_
tPD-VCC-LH
tPD-VCC-HL
I/O VL_
tRVCCtFVCC
DATA
RLOAD
CLOAD
Figure 1c. Open-Drain Driving I/O VCC
MAX3373E–MAX3376E,
MAX3378E/MAX3379E
AND MAX3390E–MAX3393E
I/O VL_
I/O VCC_
DATA
I/O VCC_
VCC
VCC
GNDRLOAD
CLOAD
tPD-VL-LH
tPD-VL-HL
I/O VL_
tRVLtFVL
Figure 1d. Open-Drain Driving I/O VL
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
Three-State Output ModePull THREE-STATElow to place the MAX3372E–
MAX3379E and MAX3390E–MAX3393E in three-state out-
put mode. Connect THREE-STATEto VL(logic-high) for
normal operation. Activating the three-state output mode
disconnects the internal 10kΩpullup resistors on the I/O
VCCand I/O VLlines. This forces the I/O lines to a high-
impedance state, and decreases the supply current to
less than 1µA. The high-impedance I/O lines in three-
state output mode allow for use in a multidrop network.
When in three-state output mode, do not allow the voltage
at I/O VL_to exceed (VL+ 0.3V), or the voltage at I/O
VCC_to exceed (VCC+ 0.3V).
Thermal Short-Circuit Protection Thermal overload detection protects the MAX3372E–
MAX3379E and MAX3390E–MAX3393E from short-circuit
fault conditions. In the event of a short-circuit fault, when
the junction temperature (TJ) reaches +152°C, a thermal
sensor signals the three-state output mode logic to force
the device into three-state output mode. When TJhas
cooled to +142°C, normal operation resumes.
VCC
I/O VLI/O VCC
GATE
BIAS
VLP
Figure 2a. Functional Diagram, MAX3372E/MAX3377E (1 I/O line)
VCC
I/O VL_I/O VCC_
GATE
BIAS
VL
PU1PU2
ONE-SHOT
BLOCK
ONE-SHOT
BLOCK
Figure 2b. Functional Diagram, MAX3373E/MAX3378E (1 I/O line)
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSPCHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
100pF
RC 1MΩRD 1500Ω
HIGH-
VOLTAGE
SOURCE
DEVICE-
UNDER-
TEST
Figure 3a. Human Body ESD Test Model
IP 100%
90%
36.8%
tRLTIME
tDL
CURRENT WAVEFORM
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
10%
AMPERES
Figure 3b. Human Body Current Waveform
±15kV ESD Protection As with all Maxim devices, ESD-protection structures are
incorporated on all pins to protect against electrostatic
discharges encountered during handling and assembly.
The I/O VCClines have extra protection against static
electricity. Maxim’s engineers have developed state-of-
the-art structures to protectthese pins against ESD of
±15kV without damage. The ESD structures withstand
high ESD in all states: normal operation, three-state
output mode, and powered down. After an ESD event,
Maxim’s E versions keep working without latchup,
whereas competing products can latch and must be
powered down to remove latchup.
ESD protection can be tested in various ways. The I/O
VCClines of this product family are characterized for
protection to the following limits:±15kV using the Human Body Model±8kV using the Contact Discharge method specified
in IEC 1000-4-2±10kV using IEC 1000-4-2’s Air-Gap Discharge
method
ESD Test Conditions ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents
test setup, test methodology, and test results.
Human Body Model Figure 3a shows the Human Body Model and Figure 3b
shows the current waveform it generates when dis-
charged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of inter-
est, which is then discharged into the test device
through a 1.5kΩresistor.
IEC 1000-4-2 The IEC 1000-4-2 standard covers ESD testing and
performance of finished equipment; it does not specifi-
cally refer to integrated circuits. The MAX3372E–
MAX3379E and MAX3390E–MAX3393E help to design
equipment that meets Level 3 of IEC 1000-4-2, without
the need for additional ESD-protection components.
The major difference between tests done using the
Human Body Model and IEC 1000-4-2 is higher peak
current in IEC 1000-4-2, because series resistance is
lower in the IEC 1000-4-2 model. Hence, the ESD with-
stand voltage measured to IEC 1000-4-2 is generally
lower than that measured using the Human Body Model.
Figure 4a shows the IEC 1000-4-2 model, and Figure 4b
shows the current waveform for the ±8kV, IEC 1000-4-2,
Level 4, ESD contact-discharge test.
The air-gap test involves approaching the device with a
charged probe. The contact-discharge method con-
nects the probe to the device before the probe
is energized.
Machine Model The Machine Model for ESD tests all pins using a
200pF storage capacitor and zero discharge resis-
tance. Its objective is to emulate the stress caused by
contact that occurs with handling and assembly during
manufacturing. Of course, all pins require this protec-
tion during manufacturing, not just inputs and outputs.
Therefore, after PCB assembly, the Machine Model is
less relevant to I/O ports.
