MAX3273ETG+T ,+3.3V, 2.5Gbps Low-Power Laser DriverApplications(4mm 4mm) SONET OC-48 and SDH STM-1624 Thin QFN MAX3273ETG+ -40°C to +85°C T2444-2 T ..
MAX327CPE ,Quad, SPST, Ultra-Low Leakage, CMOS Analog Switchesapplications.
Other programmable-
MAX327CSE ,Quad, SPST, Ultra-Low Leakage, CMOS Analog Switchesapplications include integrators
with long RC time constants, current-to-voltage con-
verters, hi ..
MAX327CSE ,Quad, SPST, Ultra-Low Leakage, CMOS Analog Switches19M; Rev 2; 7/95
spilllAllstI3CllLttlh"
quad, SPST, unra-Low Leakage,
MAX327CSE+ ,Quad, SPST, Ultra-Low-Leakage, CMOS Analog SwitchesELECTRICAL CHARACTERISTICS
(V+ = 15V. V- = -15V, TA = o25'C, unless otherwise noted.)
- :32_M ..
MAX327EPE ,Quad, SPST, Ultra-Low Leakage, CMOS Analog Switchesapplications.
Other programmable-
MAX693AEPE ,Microprocessor Supervisory CircuitsFeaturesThe MAX691A/MAX693A/MAX800L/MAX800M micro-' 200ms Power-OK/Reset Timeout Periodprocessor (µ ..
MAX693AEPE ,Microprocessor Supervisory CircuitsGeneral Description ________
MAX693AEPE+ ,Microprocessor Supervisory CircuitsFeatures include write protection ● Guaranteed RESET Assertion to V = +1VCCof CMOS RAM or EEPROM, s ..
MAX693AESE ,Microprocessor Supervisory CircuitsMAX691A/MAX693A/MAX800L/MAX800M19-0094; Rev 7a; 12/96Microprocessor Supervisory Circuits___________ ..
MAX693AESE ,Microprocessor Supervisory CircuitsFeaturesThe MAX691A/MAX693A/MAX800L/MAX800M micro-' 200ms Power-OK/Reset Timeout Periodprocessor (µ ..
MAX693AESE+ ,Microprocessor Supervisory CircuitsApplications● ComputersPIN- PART TEMP RANGEPACKAGE● ControllersMAX691ACUE -0°C to +70°C 16 TSSOP● I ..
MAX3273ETG+T
+3.3V, 2.5Gbps Low-Power Laser Driver
General DescriptionThe MAX3273 is a compact, low-power laser driver for
applications up to 2.7Gbps. The device uses a single
+3.3V supply and typically consumes 30mA. The bias
and modulation current levels are programmed by
external resistors. An automatic power-control (APC)
loop is incorporated to maintain a constant average
optical power over temperature and lifetime. The laser
driver is fabricated using Maxim’s in-house, second-
generation SiGe process.
The MAX3273 accepts differential CML-compatible
clock and data input signals. Inputs are self-biased to
allow AC-coupling. An input data-retiming latch can be
enabled to reject input jitter if a clock signal is available.
The driver can provide bias current up to 100mA and
modulation current up to 60mAP-Pwith typical (20% to
80%) edge speeds of 59ps. A failure-monitor output is
provided to indicate when the APC loop is unable to
maintain average optical power. The MAX3273 is avail-
able in 4mm ✕4mm, 24-pin QFN and thin QFN pack-
ages, as well as in die form.
ApplicationsSONET OC-48 and SDH STM-16
Transmission Systems
Add/Drop Multiplexers
Digital Cross-Connects
2.5Gbps Optical Transmitters
Features30mA Power-Supply Current Single +3.3V Power SupplyUp to 2.7Gbps (NRZ) OperationAutomatic Average Power Control with Failure
MonitorProgrammable Modulation Current from 5mA to
60mAProgrammable Bias Current from 1mA to 100mATypical Fall Time of 59psSelectable Data Retiming LatchComplies with ANSI, ITU, and Bellcore
SDH/SONET Specifications
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
Ordering Information19-2081; Rev 3; 2/07
PART TEMP RANGE PIN-
PACKAGE
PACKAGE
CODE MAX3273EGG -40°C to +85°C 24 QFN
(4mm 4mm) G2444-1
MAX3273ETG+ -40°C to +85°C 24 Thin QFN
(4mm 4mm) T2444-2
MAX3273E/D -40°C to +85°C Dice* —
Typical Application CircuitDATA +
DATA -
CLK+
CLK-
2.5GbpsSERIALIZER
WITH CLOCKGENERATION
100Ω
100Ω
DATA +
DATA -
CLK+
CLK-
VCC
VCCEN
LATCH
FAIL
APCFILT1
APCFILT2
GNDMODSETBIASMAXAPCSET
OUT-
OUT+
BIAS
0.01μFLP1
25ΩLP1
LP2
20Ω
0.056μF
REPRESENTS A CONTROLLED-IMPEDANCE TRANSMISSION LINE.
50Ω
50Ω
50Ω
50Ω
25Ω
VCC
500pF
MAX3273
Pin Configurations appear at end of data sheet.*Dice are designed to operate from TA= -40°C to +85°C, but
are tested and guaranteed at TA= +25°C only.
+Denotes lead-free package.
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS(VCC= +3.14V to +3.6V, TA= -40°C to +85°C. Typical values are at VCC= +3.3V, IBIAS= 60mA, IMOD= 30mA, TA= +25°C, unless
otherwise noted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage, VCC..............................................-0.5V to +6.0V
Current into BIAS, OUT+, OUT-......................-20mA to +150mA
Current into MD.....................................................-5mA to +5mA
Voltage at DATA+, DATA-, CLK+,
CLK-, LATCH, EN, FAIL..........................-0.5V to (VCC+ 0.5V)
Voltage at MODSET, BIASMAX,
APCSET, APCFILT1, APCFILT2.........................-0.5V to +3.0V
Voltage at BIAS.........................................+1.0V to (VCC+ 1.5V)
Voltage at OUT+, OUT-.............................+1.5V to (VCC+ 1.5V)
Current into FAIL...............................................-10mA to +10mA
Continuous Power Dissipation (TA= +85°C)
24-Pin QFN (derate 274mW/°C above +85°C)..........1781mW
Storage Temperature Range.............................-55°C to +150°C
Operating Junction Temperature......................-55°C to +150°C
Die Attach Temperature (die)..........................................+400°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSSupply CurrentICCExcluding IBIAS and IMOD3045mA
Bias-Current RangeIBIASVoltage on BIAS pin (VBIAS) = VCC - 1.6V1100mA
Bias Off-CurrentEN = high (Note 2), VBIAS ≤ 2.6V0.2mA
IBIAS = 100mA61Bias-Current StabilityAPC open loop (Note 3)IBIAS = 1mA198ppm/°C
Bias-Current Absolute AccuracyAPC open loop (Note 4)-15+15%
Differential Input VoltageVIDFigure 10.21.6VP-P
Common-Mode Input VoltageVICMVCC -
VCC -
VCC -
VID/4V
TTL Input High VoltageVIH2.0V
TTL Input Low VoltageVIL0.8V
TTL Output HighVOHSourcing 50µA2.4V
TTL Output LowVOLSinking 100µA0.4V
MD Voltage1.6V
Monitor Diode DC-Current RangeIMD(Note 3)181000µA
IMD = 1000µA-48083+480Monitor-Diode Bias Set Point
StabilityIMD = 18µA-480159+480ppm/°C
Monitor-Diode Bias Absolute
Accuracy-15+15%
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
AC ELECTRICAL CHARACTERISTICS(VCC= +3.14V to +3.6V, TA= -40°C to +85°C. Typical values are at VCC= +3.3V, IBIAS= 60mA, IMOD= 30mA, TA= +25°C, unless
otherwise noted.) (Notes 5, 6)
Note 1:Specifications at -40°C are guaranteed by design and characterization. Dice are tested at TA= +25°C only.
Note 2:Both the bias and modulation currents are switched off if any of the current set pins is grounded.
Note 3:Guaranteed by design and characterization.
Note 4:Accuracy refers to part-to-part variation.
Note 5:AC characterization was performed by using the circuit in Figure 2.
Note 6:AC characteristics are guaranteed by design and characterization, and measured using a 2.5Gbps 213- 1 PRBS input data
pattern with 80 consecutive zeros and 80 consecutive ones added.
Note 7:Measured using a 2.5Gbps repeating 0000 1111 pattern.
Note 8:PWD = (wide pulse - narrow pulse) / 2.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSModulation-Current RangeIMOD(Note 3)560mA
Modulation Off-CurrentEN = high0.2mA
IMOD = 60mA-48064+480Modulation-Current StabilityIMOD = 5mA-48034+480ppm/°C
Modulation-Current Absolute
Accuracy(Note 4)-15+15%
Output Current Rise TimetR20% to 80% (Note 7)5287ps
Output Current Fall TimetF20% to 80% (Note 7)59104ps
Output Overshoot/Undershootδ(Note 7)15%
Enable and Startup DelayAPC open loop364ns
Maximum Consecutive Identical
Digits80bits
Pulse-Width DistortionPWD(Notes 7, 8)345ps
Random Jitter1.01.5psRMS
Input Latch Setup TimeTSULATCH = high (Figure 1)75150ps
Input Latch Hold TimeTHDLATCH = high (Figure 1)050ps
MAX3273
+3.3V, 2.5Gbps Low-Power Laser DriverCLK+
CLK-
DATA-
DATA+
(DATA+) - (DATA-)
IMOD
TSUTHD
VIS = 0.1V TO 0.8V
VIS = 0.1V TO 0.8V
VID = 0.2V TO 1.6V
5mA TO 60mA
Figure 1. Required Input Signal and Setup/Hold-Time Definition
OUT-
OUT+
LP1
LP2
LP3
LP2
LP1
VCC
OSCILLOSCOPE
BIAS
15Ω
VCC
0.056μF
0.056μF
25Ω
50Ω
50Ω50Ω
LP1 = MURATA BLM11HA601SPT
LP2 = MURATA BLM21HA102SPT
LP3 = COILCRAFT D01607C-333
MAX3273
Figure 2. Output Termination for Characterization
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
Typical Operating Characteristics(VCC = 3.3V, TA = +25°C, unless otherwise noted.)
ELECTRICAL EYE DIAGRAM
(IMOD = 20mA, 213 - 1 80CID)MAX3273 toc01
125mV/div
60ps/div
ELECTRICAL EYE DIAGRAM
(IMOD = 60mA, 213 - 1 80CID)MAX3273 toc02
400mV/div
60ps/div
IBIASMAX vs. RBIASMAXMAX3273 toc04
RBIASMAX (kΩ)
IBIASMAX
(mA)
0.1101001100057ps/div
MITSUBISHI ML725C8F
LASER DIODE
OPTICAL EYE DIAGRAM
(2.488Gbps, 1300nm FP LASER,
1.87GHz FILTER)MAX3273 toc03
IMOD vs. RMODSET
MAX3273 toc05
RMODSET (kΩ)
IMOD
(mA)
IMD vs. RAPCSET
MAX3273 toc06
RAPCSET (kΩ)
IMD
(mA)
SUPPLY CURRENT vs. TEMPERATURE
MAX3273 toc07
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
EXCLUDE IBIAS, IMOD
25Ω LOAD
MAX3273
+3.3V, 2.5Gbps Low-Power Laser DriverPULSE-WIDTH DISTORTION vs. IMOD
MAX3273 toc08
IMOD (mA)
PWD (ps)
TYPICAL DISTRIBUTION OF IMOD RISE TIME
MAX3273 toc09
RISE TIME (ps)
PERCENT OF UNITS (%)
IMOD = 60mA
MEAN = 52.27ps
STDEV = 1.57ps62616364656667
MAX3273 toc10
FALL TIME (ps)
PERCENT OF UNITS (%)
TYPICAL DISTRIBUTION OF IMOD FALL TIMEIMOD = 5mA
MEAN = 63.23ps
STDEV = 1.21ps60615859626364
TYPICAL DISTRIBUTION OF IMOD FALL TIMEMAX3273 toc11
FALL TIME (ps)
PERCENT OF UNITS (%)
IMOD = 60mA
MEAN = 59.41ps
STDEV = 1.33ps4746484950515253
MAX3273 toc12
RISE TIME (ps)
PERCENT OF UNITS (%)
TYPICAL DISTRIBUTION OF IMOD RISE TIMEIMOD = 5mA
MEAN = 48.57ps
STDEV = 1.48ps
Typical Operating Characteristics (continued)(VCC = 3.3V, TA = +25°C, unless otherwise noted.)
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
Pin Description
PINNAMEFUNCTION1, 4, 13, 15, 18VCCPower-Supply VoltageDATA+Noninverting Data Input, with On-Chip BiasingDATA-Inverting Data Input, with On-Chip BiasingCLK+Noninverting Clock Input for Data Retiming, with On-Chip BiasingCLK-Inverting Clock Input for Data Retiming, with On-Chip Biasing
7, 9, 12GNDGroundLATCHData Retiming Enable Input, Active-High. Retiming disabled when floating or pulled low.ENTTL/CMOS Enable Input. Low for normal operation. Float or pull high to disable laser bias and
modulation currents. Internal 100kΩ pullup to VCC.MODSETA resistor connected from this pin to ground sets the desired modulation current.BIASLaser Bias Current Output. Connect to the laser through an inductor.OUT+Positive Modulation-Current Output. IMOD flows into this pin when input data is high.OUT-Negative Modulation-Current Output. Current flows into this pin when input data is low. Connect
to load equivalent to that on OUT+ to maintain differential output balance.MDMonitor Diode Input. Connect this pin to the anode of the monitor diode. Leave floating for
open-loop operation.APCFILT1A capacitor between APCFILT1 and APCFILT2 sets the dominant pole of the APC feedback
loop (CAPCFILT = 0.01µF). Ground APCFILT1 for open-loop operation.APCFILT2See above.FAILTTL/CMOS Failure Output, Active-Low. Indicates APC failure when low.APCSETA resistor connected from this pin to ground sets the desired average optical power. Connect a
100kΩ resistor to GND for open-loop operation.BIASMAX
A resistor connected from this pin to ground sets the maximum bias current. The APC function
can subtract current from this maximum value, but cannot add to it. For open-loop operation,
this pin sets the laser bias current.EXPOSED
PADGround. Solder this pad to ground.
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
Detailed DescriptionThe MAX3273 laser driver consists of two main parts: a
high-speed modulation driver and a laser-biasing block
with automatic power control (APC). The circuit design
is optimized for both high-speed and low-voltage
(+3.3V) operation. To minimize the jitter of the input sig-
nal at speeds as high as 2.7Gbps, the device accepts
a differential CML clock signal for data retiming. When
LATCH is high, the input data is synchronized by the
clock signal. When LATCH is low, the input data is
directly applied to the output stage.
The output stage is composed of a high-speed differ-
ential pair and a programmable modulation current
source. Because the modulation output drives a maxi-
mum current of 60mA into the laser with an edge speed
of 59ps, large transient voltage spikes can be generat-
ed (due to the parasitic inductance of the laser). These
transients and the laser-forward voltage leave insuffi-
cient headroom for the proper operation of the laser dri-
ver if the modulation output is DC-coupled to the laser
diode. To solve this problem, the MAX3273’s modula-
tion output is AC-coupled to the cathode of a laser
diode. An external pullup inductor is necessary to DC-
bias the modulation output at VCC. Such a configuration
isolates laser-forward voltage from the output circuitry
and the supply voltage VCC. A simplified functional dia-
gram is shown in Figure 3.
The MAX3273 modulation output is optimized for dri-
ving a 25Ωload. Modulation current swings of 75mA
are possible, but because of minimum power-supply
and jitter requirements at 2.5Gbps, the specified maxi-
mum modulation current is limited to 60mA. To inter-
face with the laser diode, a damping resistor (RD) is
required for impedance matching. An RC-shunt net-
work might also be necessary to compensate for the
laser-diode parasitic inductance, thereby improving the
LP2
LP1
MUXD
x160
FAILURE
DETECTOR
TIA
LP1
LATCH
DATA
CLK
VBG
IAPCSET
MODSETBIASMAXAPCFILT1APCFILT2APCSET
RAPCSET
CAPCFILT
RBIASMAXRMODSET
x190
VCC
FAILIMD
500pF
VCCBIAS
IBIAS
OUT+
OUT-
25ΩRD
IMOD
VCCVCC
MAX3273
Figure 3. Functional Diagram
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driveroptical output ringing and duty-cycle distortion. Refer to
Maxim application note HFAN 02.0, Interfacing Maxim
Laser Drivers with Laser Diodes, for more information.
At the data rate of 2.5Gbps, any capacitive load at the
cathode of a laser diode degrades the optical output
performance. Because the BIAS output is directly con-
nected to the laser cathode, the parasitic capacitance
associated with this pin is minimized by using an induc-
tor to isolate the BIAS pin from the laser cathode.
Automatic Power Control (APC)To maintain constant average optical power, the
MAX3273 incorporates an APC loop to compensate for
the changes in laser threshold current over temperature
and lifetime. A back-facet photodiode mounted in the
laser package is used to convert the optical power into
a photocurrent. The APC loop adjusts the laser bias
current so that the monitor current is matched to a ref-
erence current set by RAPCSET. The time constant of
the APC loop is determined by an external capacitor
(CAPCFILT). To minimize the pattern-dependent jitter
associated with the APC loop-time constant, and to
guarantee loop stability, the recommended value for
CAPCFILTis 0.01µF.
When the APC loop is functioning, the maximum allow-
able bias current is set by an external resistor, RBIASMAX.
An APC failure flag (FAIL) is asserted low when the bias
current can no longer be adjusted to achieve the desired
average optical power.
APC closed-loop operation requires the user to set three
currents with external resistors connected between
ground and BIASMAX, MODSET, and APCSET (see
Figure 3). Detailed guidelines for these resistor settings
are described in the Design Procedure section.
Open-Loop OperationIf necessary, the MAX3273 is fully operational without
APC. To disable the APC loop, ground the APCFILT1
pin. In this case, the laser current is directly set by two
external resistors connected from ground to BIASMAX
and MODSET. See the Design Proceduresection for
more details on open-loop operation.
Optional Data Input LatchTo minimize jitter in the input data, connect a synchro-
nous differential clock signal to the CLK+ and CLK-
inputs. When the LATCH control input is tied high, the
input data is retimed on the rising edge of CLK+. If
LATCH is tied low or left floating, the retiming function is
disabled and the input data is directly connected to the
output stage. When this latch function is not used, con-
nect CLK+ to VCCand leave CLK- unconnected.
Output Enable The MAX3273 incorporates a TTL/CMOS input to
enable the output. When ENis low, the modulation and
bias outputs are enabled. When ENis high or floating,
both the bias and modulation currents are off. The typi-
cal enable time is 364ns, and the typical disable time is
27ns when the bias is operated open loop.
Slow-StartFor laser safety reasons, the MAX3273 incorporates a
slow-start circuit that provides a delay of 364ns for
enabling a laser diode.
APC Failure MonitorThe MAX3273 provides an APC failure monitor
(TTL/CMOS) to indicate an APC loop tracking failure.
FAILis asserted low when the APC loop no longer can
regulate the bias current to maintain the desired moni-
tor diode current. FAILasserts low when the APC loop
is disabled.
Short-Circuit ProtectionThe MAX3273 provides short-circuit protection for the
modulation and bias current sources. If BIASMAX,
MODSET, or APCSET is shorted to ground, the bias
and modulation output turns off.
Design ProcedureWhen designing a laser transmitter, the optical output
usually is expressed in terms of average power and
extinction ratio. Table 1 gives relationships helpful in
converting between the optical average power and the
modulation current. These relationships are valid if the
mark density and duty cycle of the optical waveform
are 50%.
Programming the Modulation CurrentFor a given laser power (PAVG), slope efficiency (η), and
extinction ration (re), the modulation current can be cal-
culated using Table 1. See the IMODvs. RMODSET
graph in the Typical Operating Characteristicsand
select the value of RMODSETthat corresponds to the
required current at +25°C. The equation below provides
a derivation of the modulation current using Table 1.PrMODAVEe××−21η
