MAX3265 ,+3.0V to +5.5V, 1.25Gbps/2.5Gbps Limiting AmplifiersFeaturesThe 1.25Gbps MAX3264/MAX3268/MAX3768 and the ♦ +3.0V to +5.5V Supply Voltage2.5Gbps MAX3265 ..
MAX3265CUB ,3.0V to 5.5V / 1.25Gbps/2.5Gbps Limiting AmplifiersMAX3264/MAX3265/MAX3268/MAX326919-1523; Rev 1; 1/003.0V to 5.5V, 1.25Gbps/2.5Gbps Limiting Amplifie ..
MAX3265CUB+T ,+3.0V to +5.5V, 1.25Gbps/2.5Gbps Limiting AmplifiersFeaturesThe 1.25Gbps MAX3264/MAX3268/MAX3768 and the ♦ +3.0V to +5.5V Supply Voltage2.5Gbps MAX3265 ..
MAX3265CUE ,3.0V to 5.5V / 1.25Gbps/2.5Gbps Limiting AmplifiersELECTRICAL CHARACTERISTICS(Data outputs terminated per Figure 1, V = +3.0V to +5.5V, T = 0°C to +70 ..
MAX3265CUE ,3.0V to 5.5V / 1.25Gbps/2.5Gbps Limiting AmplifiersELECTRICAL CHARACTERISTICS(Data outputs terminated per Figure 1, V = +3.0V to +5.5V, T = 0°C to +70 ..
MAX3265EUE ,3.0V to 5.5V / 1.25Gbps/2.5Gbps Limiting AmplifiersApplicationsMAX3265C/D 0°C to +70°C Dice*Gigabit Ethernet Optical Receivers †MAX3265EUE -40°C to +8 ..
MAX691EWE ,Microprocessor Supervisory CircuitsGeneral Description
The MAX690 Family of supervisory circuits reduce the
complexity and number ..
MAX691EWE+ ,Microprocessor Supervisory CircuitsApplicationsthan +5V.● ComputersThe MAX691, MAX693, and MAX695 are supplied in 16-pin ● Controllers ..
MAX691EWE+T ,Microprocessor Supervisory CircuitsGeneral Description Beneits and
MAX691MJE ,Microprocessor Supervisory CircuitsELECTRICAL CHARACTERISTICS
(Vcc = full operating range, VBATT = 2.8V, T, = 25°C, unless otherwis ..
MAX692 ,Microprocessor Supervisory CircuitsMAX690–MAX695 Microprocessor Supervisory Circuits
MAX692 ,Microprocessor Supervisory CircuitsFeaturesThe MAX690 family of supervisory circuits reduces the ● Supervisory Function Integration Sa ..
MAX3265-MAX3269
+3.0V to +5.5V, 1.25Gbps/2.5Gbps Limiting Amplifiers
VCC
VCCCAZ
CAZ1CAZ2
VCC
VCC
CIN
0.01µF0.01µF
0.01µF
CIN
0.01µFSQUELCH
N.C.
100Ω
IN-
IN+OUT+
RTERM
RTERM
100Ω�OUT-
MAX3266
MAX3267
MAX3264CUE
MAX3265CUE
MAX3265EUE
LOS
LOSS
SIGNAL
LOS
N.C.RTH
LEVEL
N.C.
General DescriptionThe 1.25Gbps MAX3264/MAX3268/MAX3768 and the
2.5Gbps MAX3265/MAX3269/MAX3765 limiting ampli-
fiers are designed for Gigabit Ethernet and Fibre
Channel optical receiver systems. The amplifiers accept
a wide range of input voltages and provide constant-
level output voltages with controlled edge speeds.
Additional features include RMS power detectors with
programmable loss-of-signal (LOS) indication, an
optional squelch function that mutes the data output sig-
nal when the input voltage falls below a programmable
threshold, and excellent jitter performance.
The MAX3264/MAX3265/MAX3765 feature current-mode
logic (CML) data outputs that are tolerant of inductive
connectors and a 16-pin TSSOP package, making these
circuits ideal for GBIC receivers. The MAX3268/
MAX3269/MAX3768 feature standards-compliant posi-
tive-referenced emitter-coupled logic (PECL) data out-
puts and are available in a tiny 10-pin µMAX package
that is ideal for small-form-factor (SFF) receivers.
ApplicationsGigabit Ethernet Optical Receivers
Fibre Channel Optical Receivers
System Interconnect
ATM Optical Receivers
Features+3.0V to +5.5V Supply VoltageLow Deterministic Jitter
14ps (MAX3264)
11ps (MAX3265/MAX3765)150ps (max) Edge Speed (MAX3265/MAX3765)
300ps (max) Edge Speed (MAX3264)Programmable Signal-Detect FunctionChoice of CML or PECL Output Interface10-Pin µMAX or 16-Pin TSSOP Package
+3.0V to +5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers19-1523; Rev 7, 2/06
+Denotes lead-free package.
*EP = Exposed paddle.
**Dice are designed to operate from 0°C to +70°C, but are tested
and guaranteed only at TA= +25°C.
Ordering Information
Selector Guide appears at end of data sheet.
Pin Configurations appear at end of data sheet.
Typical Operating CircuitsTypical Operating Circuits continued at end of data sheet.
PARTTEMP RANGEPIN-PACKAGE
MAX3264CUE0°C to +70°C16 TSSOP-EP*
MAX3264CUE+0°C to +70°C16 TSSOP-EP*
MAX3264C/D0°C to +70°CDice**
MAX3265CUE0°C to +70°C16 TSSOP-EP*
MAX3265CUE+0°C to +70°C16 TSSOP-EP*
MAX3265CUB0°C to +70°C10 µMAX-EP*
MAX3265CUB+0°C to +70°C10 µMAX-EP*
MAX3265EUE-40°C to +85°C16 TSSOP-EP*
MAX3265EUE+-40°C to +85°C16 TSSOP-EP*
MAX3265C/D0°C to +70°CDice**
Ordering Information continued at end of data sheet.
+3.0V to +5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(Data outputs terminated per Figure 1, VCC= +3.0V to +5.5V, TA
= 0°C to +70°C. Typical values are at VCC = +3.3V, TA= +25°C,
unless otherwise noted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage (VCC)............................................-0.5V to +6.0V
Voltage at IN+, IN-..........................(VCC- 2.4V) to (VCC+ 0.5V)
Voltage at SQUELCH, CAZ1,
CAZ2, LOS, LOS, TH..................................-0.5V to (VCC+ 0.5V)
Voltage at LEVEL...................................................-0.5V to +2.0V
Current into LOS, LOS..........................................-1mA to +9mA
Differential Input Voltage (IN+ - IN-).....................................2.5V
Continuous Current at
CML Outputs (OUT+, OUT-)..........................-25mA to +25mA
Continuous Current at PECL Outputs (OUT+, OUT-).........50mA
Continuous Power Dissipation (TA= +70°C)
16-Pin TSSOP (derate 27mW/°C above +70°C).........2162mW
10-Pin µMAX (derate 20mW/°C above +70°C)...........1600mW
Operating Ambient Temperature Range.............-40°C to +85°C
Storage Temperature Range.............................-55°C to +150°C
Processing Temperature (dice).......................................+400°C
Lead Temperature (soldering, 10s).................................+300°C
Deterministic JitterMAX3265/MAX3269/MAX3765 (Notes 2, 3)
MAX3265/MAX3269/MAX3765
MAX3264/MAX3268/MAX3768
MAX3265/MAX3269/MAX3765
MAX3264/MAX3268/MAX3768
8.5Low LOS Deassert LevelmVRTH= 2.5kΩ
MAX3264/MAX3268/MAX3768 (Notes 2, 3)
PARAMETERMINTYPMAXUNITS12001200
Data RateGbps
Input Voltage RangemV3025
psp-pRandom Jitter8psRMS175300
100150150300Data Output Edge Speed
LOS Hysteresis2.54.4dB
LOS Assert/Deassert Time1µs
2.204.8Low LOS Assert LevelmV
CONDITIONSMAX3264/MAX3268/MAX3768 (Notes 2, 4)
MAX3265/MAX3269/MAX3765
MAX3264/MAX3268/MAX3768
MAX3265/MAX3269/MAX3765 (Notes 2, 4)
MAX3264 (Note 5)
MAX3265/MAX3765 (Note 6)
MAX3268/MAX3768 (Note 5)
MAX3269 (Note 6)
MAX3264/MAX3268/MAX3768
(Notes 2, 7)
MAX3265/MAX3269/MAX3765
(Notes 7, 8)
RTH= 2.5kΩ
+3.0V to +5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers
ELECTRICAL CHARACTERISTICS (continued)(Data outputs terminated per Figure 1, VCC= +3.0V to +5.5V, TA
= 0°C to +70°C. Typical values are at VCC = +3.3V, TA= +25°C,
unless otherwise noted.) (Note 1)
PARAMETERCONDITIONSMINTYPMAXUNITSMAX3264/MAX3268/MAX37685.69Medium LOS Assert LevelRTH = 7kΩMAX3265/MAX3269/MAX37659.916mV
MAX3264/MAX3268/MAX37681519.8Medium LOS Deassert LevelRTH = 7kΩMAX3265/MAX3269/MAX37652740.5mV
MAX3264/MAX3268/MAX37689.421.6
High LOS Assert LevelRTH = 20kΩMAX3265/MAX3269/MAX376518.041.5mV
MAX3264/MAX3268/MAX376835
High LOS Deassert LevelRTH = 20kΩMAX3265/MAX3269/MAX376567mV
Squelch Input Current080400µA
Differential Input ResistanceIN+ to IN-97100103Ω
MAX3264/MAX3268/MAX3768150Input-Referred NoiseMAX3265/MAX3269/MAX3765230µVRMS
LEVEL = open, RLOAD = 50Ω5501200
CML Output VoltageLEVEL = GND, RLOAD = 75Ω110012701800mV
PECL Output High VoltageReferenced to VCC-1.025-0.880V
PECL Output Low VoltageReferenced to VCC-1.810-1.620V
LOS Output High VoltageILOS = -30µA2.4V
LOS Output Low VoltageILOS = +1.2mA0.4V
Output Signal When SquelchedOutputs AC-coupled20mV
Power-Supply Rejection Ratiof < 2MHz20dB
CAZ = open2MHzLow-Frequency CutoffCAZ = 0.1µF2kHz
MAX3264/MAX3265/MAX376585100115utp ut Resi stance ( S i ng l e E nd ed ) MAX3268/MAX3269/MAX37684Ω
MAX32683962
MAX32694878
MAX32643862
MAX32655076
MAX37655076
Output not
squelched
MAX37683962
Power-Supply CurrentFigure 2
Output squelchedMAX37656490
+3.0V to +5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers
Note 1:Specifications for Input Voltage Range, LOS Assert/Deassert Levels, and CML Output Voltage refer to the total differential
peak-to-peak signal applied or measured. PECL output voltages are absolute (single-ended) voltages measured at a single
output.
Note 2:Input edge speed is controlled using four-pole, lowpass Bessel filters with bandwidth approximately 75% of the maximum
data rate.
Note 3:Deterministic jitter is measured with a K28.5 pattern (0011 1110 1011 0000 0101). Deterministic jitter is the peak-to-peak
deviation from ideal time crossings, measured at the zero-level crossings of the differential output per ANSI X3.230,
Annex A.
Note 4:Random jitter is measured with the minimum input signal applied after filtering with a four-pole, lowpass, Bessel filter (fre-
quency bandwidth at 75% of the maximum data rate). For Fibre Channel and Gigabit Ethernet applications, the peak-to-
peak random jitter is 14.1-times the RMS random jitter.
Note 5:Input signal applied after a 933MHz Bessel filter.
Note 6:Input signal applied after a 1.8GHz Bessel filter.
Note 7:Input for LOS assert/deassert and hysteresis tests is a repeating K28.5 pattern. Hysteresis is defined as:
20log (VLOS-DEASSERT / VLOS-ASSERT).
Note 8:Response time to a 10dB change in input power.
ELECTRICAL CHARACTERISTICS—MAX3265EUE(Data outputs terminated per Figure 1, VCC= +3.0V to +5.5V, TA
= -40°C to +85°C. Typical values are at VCC = +3.3V, TA= +25°C,
unless otherwise noted.) (Note 1)
CONDITIONSData RateGbps2.5
UNITSMINTYPMAXPARAMETERInput Voltage RangemV101200
(Notes 2, 3)Deterministic Jitterpsp-p1125
(Notes 2, 4)Random JitterpsRMS8
(Note 6)Data Output Edge Speedps100155
(Notes 2, 7)LOS HysteresisdB2.24.4
(Notes 7, 8)LOS Assert/Deassert Timeµs1
Output Resistance (single ended)Ω85100115
CAZ= 0.1µFkHz2
CAZ= openLow-Frequency CutoffMHz2
f < 2MHzPower-Supply Rejection RatiodB20
Outputs AC-coupledOutput Signal When Squelched20
ILOS= +1.2mALOS Output Low Voltage0.450
ILOS= -30µALOS Output High Voltage
LEVEL = GND, RLOAD= 75Ω110012701800
LEVEL = open, RLOAD = 50ΩCML Output Voltage5501200
Input-Referred NoiseµVRMS230
IN+ to IN-Differential Input ResistanceΩ97100103
Squelch Input CurrentµA080400
RTH= 20kΩHigh LOS Deassert LevelmV67111
RTH= 20kΩHigh LOS Assert LevelmV18.041.5
RTH= 7kΩMedium LOS Deassert LevelmV2743.0
RTH= 7kΩMedium LOS Assert LevelmV9.916
RTH= 2.5kΩLow LOS Deassert LevelmV8.513.6
RTH= 2.5kΩLow LOS Assert LevelmV2.204.8
Figure 2Power-Supply CurrentmA5076
2.4
+3.0V to +5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers20040060080010001200
MAX3264/MAX3268/MAX3768
DETERMINISTIC JITTER
vs. INPUT AMPLITUDEMAX3264/5/8/9 TOC04
INPUT AMPLITUDE (mV)
JITTER (ps)1020304050
MAX3264/MAX3268/MAX3768
RANDOM JITTER
vs. INPUT AMPLITUDEMAX3264/5/8/9 TOC05
INPUT AMPLITUDE (mV)
RMS JITTER (ps)
OUTPUT VOLTAGE
vs. INPUT VOLTAGE
MAX3264/5/8/9 TOC01a
INPUT VOLTAGE (mV)
OUTPUT VOLTAGE (mV)
MAX3264/MAX3268
MAX3265/MAX3269/MAX3765
MAX3264
LOS HYSTERESIS vs. TEMPERATURE
MAX3264/5/8/9 TOC03a
TEMPERATURE (°C)
LOS HYSTERESIS (dB)
RTH = 25kΩ
RTH = 7kΩ20040060080010001200
MAX3265/MAX3269/MAX3765
DETERMINISTIC JITTER
vs. INPUT AMPLITUDEMAX3264/5/8/9 TOC06
INPUT AMPLITUDE (mV)
JITTER (ps)1020304050
MAX3265/MAX3269/MAX3765
RANDOM JITTER
vs. INPUT AMPLITUDEMAX3264/5/8/9 TOC07
INPUT AMPLITUDE (mV)
RMS JITTER (ps)
VIN
VOUT
VLOS
LOSS OF SIGNAL WITH SQUELCHMAX3264/5/8/9 TOC08
500ns/div
300mV/div
200ps/div
MAX3268/MAX3768
DATA OUTPUT EYE DIAGRAM
(MINIMUM INPUT)MAX3264/5/8/9 TOC09
Typical Operating Characteristics(TA = +25°C, unless otherwise noted.)
MAX3265EUE
LOS HYSTERESIS vs. TEMPERATURE
MAX3264/5/8/9 TOC03
TEMPERATURE (°C)
LOS HYSTERESIS (dB)
RTH = 4.6kΩ
RTH = 16kΩ
+3.0V to +5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiersypical Operating Characteristics (continued)(TA = +25°C, unless otherwise noted.)
150mV/div
MAX3265/MAX3765
DATA OUTPUT EYE DIAGRAM
2.5Gbps (MAXIMUM INPUT)MAX3264/5/8/9 TOC13
100ps/div
100k1M10M100M1G
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCYMAX3264/5/8/9 TOC14
FREQUENCY (Hz)
PSRR (dB)
OUTPUT VSWR vs. FREQUENCY
MAX3264/5/8/9 TOC15
FREQUENCY (GHz)
VSWR
MAX3264
LOSS-OF-SIGNAL THRESHOLD vs. RTH
MAX3264/5/8/9 TOC18
RTH (kΩ)
LOS ASSERT THRESHOLD (mV)
MAX3265/MAX3765
LOSS-OF-SIGNAL THRESHOLD vs. RTH
MAX3264/5/8/9 TOC19
RTH (kΩ)
LOS ASSERT THRESHOLD (mV)100M10G10M1G
COMMON-MODE REJECTION RATIO
vs. FREQUENCYMAX3264/5/8/9 TOC20
FREQUENCY (Hz)
CMRR (dB)
MAX3268/MAX3768
MAX3265/MAX3765
150mV/div
MAX3264
DATA OUTPUT EYE DIAGRAM AT
1.25Gbps (MINIMUM INPUT)MAX3264/5/8/9 TOC10
200ps/div
50mV/div
MAX3264
DATA OUTPUT EYE DIAGRAM AT
1.25Gbps (MAXIMUM INPUT)MAX3264/5/8/9 TOC11
200ps/div
150mV/div
MAX3265/MAX3765
DATA OUTPUT EYE DIAGRAM
2.5Gbps (MINIMUM INPUT)MAX3264/5/8/9 TOC12
100ps/div
+3.0V to +5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers
Pin DescriptionEPGround. The exposed paddle must be soldered to the circuit–board ground for
proper thermal performance.
Exposed
Paddle7
Output Current Level. When this pin is not connected, the CML output current is
approximately 16mA. When this pin is connected to ground, the output current
increases to approximately 20mA. (In the MAX3265CUB/MAX3765CUB, LEVEL is
internally connected to ground.)15
Squelch Input. The squelch function is disabled when SQUELCH is not connected
or is set to a TTL low level. When SQUELCH is set to a TTL high level and LOS is
asserted, the data outputs, OUT+, and OUT-, are forced to static levels. See sec-
tions PECLOutput Buffer and CMLOutput Bufferfor more information. (In the
MAX3265/MAX3268/MAX3269 10-pin µMAX, SQUELCH is not connected. In the
MAX3765/MAX3768, SQUELCHis internally connected to VCC.)16No ConnectionN.C.
SQUELCH10
Noninverted Loss-of-Signal Output. LOS is low when the level of the input signal
is above the preset threshold set by the TH input. LOS asserts high when the sig-
nal level drops below the threshold.
LOS
LEVEL1Offset-Correction-Loop Capacitor. A capacitor connected between this pin and
CAZ2 extends the time constant of the offset correction loop.2
Offset-Correction-Loop Capacitor. A capacitor connected between this pin and
CAZ1 extends the time constant of the offset correction loop. Refer to Design
Procedure.
CAZ2
CAZ19
Inverted Loss-of-Signal Output. LOSis high when the level of the input signal is
above the preset threshold set by the TH input. LOSis asserted low when the
signal level drops below the threshold.12Inverted Data Output13Noninverted Data OutputOUT+
OUT-
7, 1011, 14Supply VoltageVCC
LOS5Inverted Input Signal8
Loss-of-Signal Threshold. A resistor connected from this pin to ground sets the
input signal level at which the loss-of-signal (LOS) output(s) is asserted. Refer to
Typical Operating Characteristicsand Design Procedure.
IN-4Noninverted Input SignalIN+
TSSOP
FUNCTION
µMAX
NAMEGND1, 43, 6Supply Ground
PIN
+3.0V to +5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers
(a) MAX3264/MAX3265/MAX3765 WITH 50Ω TERMINATION VCC
100Ω100Ω
100ΩRTERM
100Ω
2 x RLOAD
100Ω
COUT
COUT
COUT
COUT
VCC
(b) MAX3264/MAX3265/MAX3765 WITH 75Ω TERMINATION VCC
100Ω100Ω
300ΩRTERM
300Ω
2 x RLOAD
150Ω
VCC
(c) MAX3268/MAX3269/MAX3768 OUTPUT TERMINATIONVCC
VCC - 2V
OUT-
OUT+
50ΩRTERM
50Ω
MAX3264
MAX3265
MAX3765
MAX3264
MAX3265
MAX3765
MAX3268
MAX3269
MAX3768
Figure 1. Data Output Termination
+3.0V to +5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers
(a) CML SUPPLY CURRENT (ICC)VCC
ICC
ICC
VCC
OUT+OPEN
OPEN
OUT-
IOUT
100Ω
RTH
2.5kΩ
100Ω
CONTROL
SQUELCH
LEVEL
MAX3264CUE: OPEN
MAX3265CUE: OPEN
MAX3265CUB: GND (INTERNAL)
MAX3765CUB: VCC (INTERNAL)
(b) PECL SUPPLY CURRENT (ICC)RTH
2.5kΩ
MAX3264
MAX3265
MAX3765
MAX3268
MAX3269
MAX3768
MAX3264CUE: OPEN
MAX3265CUE: OPEN
MAX3265CUB: GND (INTERNAL)
MAX3765CUB: GND (INTERNAL)
Figure 2. Power-Supply Current Measurement
