MAX3265CUE ,3.0V to 5.5V / 1.25Gbps/2.5Gbps Limiting AmplifiersELECTRICAL CHARACTERISTICS(Data outputs terminated per Figure 1, V = +3.0V to +5.5V, T = 0°C to +70 ..
MAX3265CUE ,3.0V to 5.5V / 1.25Gbps/2.5Gbps Limiting AmplifiersELECTRICAL CHARACTERISTICS(Data outputs terminated per Figure 1, V = +3.0V to +5.5V, T = 0°C to +70 ..
MAX3265EUE ,3.0V to 5.5V / 1.25Gbps/2.5Gbps Limiting AmplifiersApplicationsMAX3265C/D 0°C to +70°C Dice*Gigabit Ethernet Optical Receivers †MAX3265EUE -40°C to +8 ..
MAX3266C/D ,1.25Gbps/2.5Gbps, 3V to 5.5V, Low-Noise Transimpedance Preamplifiers for LANsApplicationsN.C. 2 7 OUT+Gigabit EthernetMAX3266MAX3267IN 3 6 OUT-1.0Gbps to 2.5Gbps Optical Receiv ..
MAX3267CSA ,1.25Gbps/2.5Gbps / 3V to 5.5V / Low-Noise Transimpedance Preamplifiers for LANsApplicationsN.C. 2 7 OUT+Gigabit EthernetMAX3266MAX3267IN 3 6 OUT-1.0Gbps to 2.5Gbps Optical Receiv ..
MAX3268CUB ,3.0V to 5.5V / 1.25Gbps/2.5Gbps Limiting Amplifiersfeatures include 150ps max Edge Speed (MAX3265)RMS power detectors with programmable loss-of-signa ..
MAX691EWE+ ,Microprocessor Supervisory CircuitsApplicationsthan +5V.● ComputersThe MAX691, MAX693, and MAX695 are supplied in 16-pin ● Controllers ..
MAX691EWE+T ,Microprocessor Supervisory CircuitsGeneral Description Beneits and
MAX691MJE ,Microprocessor Supervisory CircuitsELECTRICAL CHARACTERISTICS
(Vcc = full operating range, VBATT = 2.8V, T, = 25°C, unless otherwis ..
MAX692 ,Microprocessor Supervisory CircuitsMAX690–MAX695 Microprocessor Supervisory Circuits
MAX692 ,Microprocessor Supervisory CircuitsFeaturesThe MAX690 family of supervisory circuits reduces the ● Supervisory Function Integration Sa ..
MAX6920AWP+ ,12-Output, 76V, Serial-Interfaced VFD Tube DriverApplications Ordering Information● White Goods ● Industrial WeighingPART TEMP RANGE PIN-PACKAGE● Ga ..
MAX3264CUE-MAX3265CUB-MAX3265CUE-MAX3265EUE-MAX3268CUB-MAX3269CUB
3.0V to 5.5V / 1.25Gbps/2.5Gbps Limiting Amplifiers
General DescriptionThe 1.25Gbps MAX3264/MAX3268 and the 2.5Gbps
MAX3265/MAX3269 limiting amplifiers are designed for
Gigabit Ethernet and Fibre Channel optical receiver sys-
tems. The amplifiers accept a wide range of input volt-
ages and provide constant-level output voltages with
controlled edge speeds. Additional features include
RMS power detectors with programmable loss-of-signal
(LOS) indication, an optional squelch function that
mutes the data output signal when the input voltage falls
below a programmable threshold, and excellent jitter
performance.
The MAX3264/MAX3265 feature current-mode logic
(CML) data outputs that are tolerant of inductive con-
nectors and a 16-pin TSSOP package, makingthese
circuits ideal for GBIC receivers. The MAX3268/
MAX3269 feature standards-compliant positive-refer-
enced emitter-coupled logic (PECL) data outputs and
are available in a tiny 10-pin µMAX package that is
ideal for small-form-factor receivers.
ApplicationsGigabit Ethernet Optical Receivers
Fibre Channel Optical Receivers
System Interconnect
ATM Optical Receivers
Features+3.0V to +5.5V Supply VoltageLow Deterministic Jitter
14ps (MAX3264)
11ps (MAX3265)150ps max Edge Speed (MAX3265)
300ps max Edge Speed (MAX3264)Programmable Signal-Detect FunctionChoice of CML or PECL Output Interface10-Pin µMAX or 16-Pin TSSOP Package
MAX3264/MAX3265/MAX3268/MAX3269
3.0V to 5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers19-1523; Rev 1; 1/00
Ordering Information
Selector Guide appears at end of data sheet.
Pin Configurations appear at end of data sheet.
Typical Operating Circuits
MAX3264/MAX3265/MAX3268/MAX3269
3.0V to 5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(Data outputs terminated per Figure 1, VCC= +3.0V to +5.5V, TA
= 0°C to +70°C. Typical values are at VCC = +3.3V, TA= +25°C,
unless otherwise noted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage (VCC)............................................-0.5V to +6.0V
Voltage at IN+, IN-..........................(VCC- 2.4V) to (VCC+ 0.5V)
Voltage at SQUELCH, CAZ1,
CAZ2, LOS, LOS, TH..................................-0.5V to (VCC+ 0.5V)
Voltage at LEVEL...................................................-0.5V to +2.0V
Current into LOS, LOS..........................................-1mA to +9mA
Differential Input Voltage (IN+ - IN-).....................................2.5V
Continuous Current at
CML Outputs (OUT+, OUT-)..........................-25mA to +25mA
Continuous Current at PECL Outputs (OUT+, OUT-).........50mA
Continuous Power Dissipation (TA= +70°C)
16-Pin TSSOP (derate 27mW/°C above +70°C).........2162mW
10-Pin µMAX (derate 20mW/°C above +70°C)...........1600mW
Operating Ambient Temperature Range.............-40°C to +85°C
Storage Temperature Range.............................-55°C to +150°C
Processing Temperature (dice).......................................+400°C
Lead Temperature (soldering, 10s).................................+300°C
MAX3264/MAX3265/MAX3268/MAX3269
3.0V to 5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers
ELECTRICAL CHARACTERISTICS (continued)(Data outputs terminated per Figure 1, VCC= +3.0V to +5.5V, TA
= 0°C to +70°C. Typical values are at VCC = +3.3V, TA= +25°C,
unless otherwise noted.) (Note 1)
MAX3264/MAX3265/MAX3268/MAX3269
3.0V to 5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers
Note 1:Specifications for Input Voltage Range, LOS Assert/Deassert Levels, and CML Output Voltage refer to the total differential
peak-to-peak signal applied or measured. PECL output voltages are absolute (single-ended) voltages measured at a single
output.
Note 2:Input edge speed is controlled using 4-pole, lowpass Bessel filters with bandwidth approximately 75% of the maximum
data rate.
Note 3:Deterministic jitter is measured with a K28.5 pattern (0011 1110 1011 0000 0101). Deterministic jitter is the peak-to-peak
deviation from ideal time crossings, measured at the zero-level crossings of the differential output per ANSI X3.230,
Annex A.
Note 4:Random jitter is measured with the minimum input signal applied after filtering with a 4-pole, lowpass, Bessel filter (frequen-
cy bandwidth at 75% of the maximum data rate). For Fibre Channel and Gigabit Ethernet applications, the peak-to-peak
random jitter is 14.1-times the RMS random jitter.
Note 5:Input signal applied after a 933MHz Bessel filter.
Note 6:Input signal applied after a 1.8GHz Bessel filter.
Note 7:Input for LOS assert/deassert and hysteresis tests is a repeating K28.5 pattern. Hysteresis is defined as:
20log (VLOS-DEASSERT / VLOS-ASSERT).
Note 8:Response time to a 10dB change in input power.
ELECTRICAL CHARACTERISTICS—MAX3265EUE(Data outputs terminated per Figure 1, VCC= +3.0V to +5.5V, TA
= -40°C to +85°C. Typical values are at VCC = +3.3V, TA= +25°C,
unless otherwise noted.) (Note 1)
MAX3264/MAX3265/MAX3268/MAX3269
3.0V to 5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers20040060080010001200
MAX3264/MAX3268
DETERMINISTIC JITTER
vs. INPUT AMPLITUDEMAX3264/5/8/9 TOC04
INPUT AMPLITUDE (mV)
JITTER (ps)1020304050
MAX3264/MAX3268
RANDOM JITTER
vs. INPUT AMPLITUDEMAX3264/5/8/9 TOC05
INPUT AMPLITUDE (mV)
RMS JITTER (ps)
OUTPUT VOLTAGE
vs. INPUT VOLTAGE
MAX3264/5/8/9 TOC01a
INPUT VOLTAGE (mV)
OUTPUT VOLTAGE (mV)
MAX3264
LOS HYSTERESIS vs. TEMPERATURE
MAX3264/5/8/9 TOC03a
TEMPERATURE (°C)
LOS HYSTERESIS (dB)20040060080010001200
MAX3265/MAX3269
DETERMINISTIC JITTER
vs. INPUT AMPLITUDEMAX3264/5/8/9 TOC06
INPUT AMPLITUDE (mV)
JITTER (ps)1020304050
MAX3265/MAX3269
RANDOM JITTER
vs. INPUT AMPLITUDEMAX3264/5/8/9 TOC07
RMS JITTER (ps)
VIN
VOUT
VLOS
LOSS OF SIGNAL WITH SQUELCHMAX3264/5/8/9 TOC08
500ns/div
300mV/div
200ps/div
MAX3268
DATA OUTPUT EYE DIAGRAM
(MINIMUM INPUT)MAX3264/5/8/9 TOC09
Typical Operating Characteristics(TA = +25°C, unless otherwise noted.)
