MAX3100CPD ,SPI/Microwire-Compatible UART in QSOP-16MAX310019-1259; Rev 0; 7/97SPI/Microwire-Compatible UART in QSOP-16_______________
MAX3100CPD+ ,SPI/MICROWIRE-Compatible UARTApplicationsMAX3100CEE+ 0°C to +70°C 16 QSOPHandheld Instruments MAX3100EPD+ -40°C to +85°C 14 Plas ..
MAX3100EEE ,SPI/Microwire-Compatible UART in QSOP-16MAX310019-1259; Rev 0; 7/97SPI/Microwire-Compatible UART in QSOP-16_______________
MAX3100EEE+ ,SPI/MICROWIRE-Compatible UARTMAX3100SPI/MICROWIRE-Compatible UART in QSOP-16
MAX3100EEE+T ,SPI/MICROWIRE-Compatible UARTELECTRICAL CHARACTERISTICS(V = +2.7V to +5.5V, T = T to T , unless otherwise noted. Typical values ..
MAX3100EPD ,SPI/Microwire-Compatible UART in QSOP-16ELECTRICAL CHARACTERISTICS(V = +2.7V to +5.5V, T = T to T , unless otherwise noted. Typical values ..
MAX635BCPA ,Preset -5V output or adjuistable output with 2 resistors, CMOS switching regulator. Output accuracy 10%.features such as MAX635XCSA 0 C to +70 C 8 Narrow SO
Itogic-level shutdown, adjustable oscillator ..
MAX636 ,Preset/Adjustable Output CMOS Inverting Switching Regulatorsapplications require only a diode, output filter . Only 3 External Components
capacitor, and a Iow ..
MAX6360LSUT-T ,Dual/Triple-Voltage レP Supervisory CircuitsApplicationsOrdering InformationComputers Intelligent InstrumentsPART* TEMP. RANGE PIN-PACKAGEContr ..
MAX6360LSUT-T ,Dual/Triple-Voltage レP Supervisory CircuitsApplicationsOrdering InformationComputers Intelligent InstrumentsPART* TEMP. RANGE PIN-PACKAGEContr ..
MAX6360SYUT-T ,Dual/Triple-Voltage レP Supervisory Circuitsfeatures both 3V and 5V active-low push-Systemspull reset outputs. The MAX6353/MAX6356/MAX6359offer ..
MAX6361HUT44+ ,SOT23, Low-Power レP Supervisory Circuits with Battery BackupMAX6361/MAX6363/MAX636419-1615; Rev 0; 1/00SOT23, Low-Power µP Supervisory Circuitswith Battery Bac ..
MAX3100CEE-MAX3100CPD-MAX3100EEE-MAX3100EPD
SPI/Microwire-Compatible UART in QSOP-16
_______________General DescriptionThe MAX3100 universal asynchronous receiver transmit-
ter (UART) is the first UART specifically optimized for
small microcontroller-based systems. Using an
SPI™/Microwire™ interface for communication with the
host microcontroller (µC), the MAX3100 comes in a com-
pact 16-pin QSOP. The asynchronous I/O is suitable for
use in RS-232, RS-485, IR, and opto-isolated data links.
IR-link communication is easy with the MAX3100’s
infrared data association (IrDA) timing mode.
The MAX3100 includes a crystal oscillator and a baud-
rate generator with software-programmable divider ratios
for all common baud rates from 300 baud to 230k baud.
A software- or hardware-invoked shutdown lowers quies-
cent current to 10µA, while allowing the MAX3100 to
detect receiver activity.
An 8-word-deep first-in/first-out (FIFO) buffer minimizes
processor overhead. This device also includes a flexible
interrupt with four maskable sources, including address
recognition on 9-bit networks. Two hardware-handshak-
ing control lines are included (one input and one output).
The MAX3100 is available in 14-pin plastic DIP and small,
16-pin QSOP packages in the commercial and extended
temperature ranges.
________________________ApplicationsHand-Held Instruments
Intelligent Instrumentation
UART in SPI Systems
Small Networks in HVAC or Building Control
Isolated RS-232/RS-485: Directly Drives Opto-Couplers
Low-Cost IR Data Links for Computers/Peripherals
____________________________Features16-Pin QSOP Package (8-pin SO footprint):
Smallest UART AvailableFull-Featured UART:
—IrDA SIR Timing Compatible
—8-Word FIFO Minimizes Processor
Overhead at High Data Rates
—Up to 230k Baud with a 3.6864MHz Crystal
—9-Bit Address-Recognition Interrupt
—Receive Activity Interrupt in ShutdownSPI/Microwire-Compatible µC InterfaceLowest Power:
—150µA Operating Current at 3.3V
—10µA in Shutdown with Receive Interrupt+2.7V to +5.5V Supply Voltage in Operating ModeSchmitt-Trigger Inputs for Opto-Couplers TX and RTSOutputs Sink 25mA for Opto-Couplers
MAX3100
SPI/Microwire-Compatible
UART in QSOP-16
__________________________________________________________Pin Configurations19-1259; Rev 0; 7/97
SPI is a trademark of Motorola, Inc. Microwire is a trademark of National Semiconductor Corp.
MAX3100
SPI/Microwire-Compatible
UART in QSOP-16
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VCC= +2.7V to +5.5V, TA= TMINto TMAX, unless otherwise noted. Typical values are measured at 9600 baud at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND...........................................................................+6V
Input Voltage to GND
(CS, SHDN, X1, CTS, RX, DIN, SCLK)....-0.3V to (VCC+ 0.3V)
Output Voltage to GND
(DOUT, RTS, TX, X2) ..............................-0.3V to (VCC+ 0.3V)IRQ...........................................................................-0.3V to 6V
TX, RTSOutput Current....................................................100mA
X2, DOUT, IRQShort-Circuit Duration
(to VCCor GND).........................................................Indefinite
Continuous Power Dissipation (TA= +70°C)
Plastic DIP (derate 10.00mW/°C above +70°C)..........800mW
QSOP (derate 8.30mW/°C above +70°C).....................667mW
Operating Temperature Ranges
MAX3100C_ _......................................................0°C to +70°C
MAX3100E_ _...................................................-40°C to +85°C
Storage Temperature Range............................-65°C to +160°C
Lead Temperature (soldering, 10sec)............................+300°C
MAX3100
SPI/Microwire-Compatible
UART in QSOP-16
ELECTRICAL CHARACTERISTICS (continued)(VCC= +2.7V to +5.5V, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
Figure 1. Detailed Serial-Interface Timing
Note 1:tCS0and tCS1specify the minimum separation between SCLK rising edges used to write to other devices on the SPI bus
and the CSused to select the MAX3100. A separation greater than tCS0and tCS1ensures that the SCLK edge is ignored.
MAX3100
SPI/Microwire-Compatible
UART in QSOP-16
__________________________________________Typical Operating Characteristics(TA = +25°C, unless otherwise noted.)
MAX3100
SPI/Microwire-Compatible
UART in QSOP-16
______________________________________________________________Pin Description
_______________Detailed DescriptionThe MAX3100 universal asynchronous receiver trans-
mitter (UART) interfaces the SPI/Microwire-compatible,
synchronous serial data from a microprocessor (µP) to
asynchronous, serial-data communication ports (RS-
232, RS-485, IrDA). Figure 2 shows the MAX3100 func-
tional diagram.
The MAX3100 combines a simple UART and a baud-rate
generator with an SPI interface and an interrupt genera-
tor. Configure the UART by writing a 16-bit word to a
write-configuration register, which contains the baud rate,
data-word length, parity enable, and enable of the 8-word
receive first-in/first-out (FIFO). The write configuration
selects between normal UART timing and IrDA timing,
controls shutdown, and contains 4 interrupt mask bits.
Transmit data by writing a 16-bit word to a write-data
register, where the last 7 or 8 bits are actual data to be
transmitted. Also included is the state of the transmitted
parity bit (if enabled). This register controls the state of
the RTSoutput pin. Received words generate an inter-
rupt if the receive-bit interrupt is enabled.
Read data from a 16-bit register that holds the oldest
data from the receive FIFO, the received parity data,
and the logic level at the CTSinput pin. This register
also contains a bit that is the framing error in normal
operation and a receive-activity indicator in shutdown.
The baud-rate generator determines the rate at which the
transmitter and receiver operate. Bits B0 to B3 in the
write-configuration register determine the baud-rate divi-
sor (BRD), which divides down the X1 oscillator frequen-
cy. The baud clock is 16 times the data rate (baud rate).
The transmitter section accepts SPI/Microwire data, for-
mats it, and transmits it in asynchronous serial format
from the TX output. Data is loaded into the transmit-
buffer register from the SPI/Microwire interface. The
MAX3100 adds start and stop bits to the data and
clocks the data out at the selected baud rate (Table 7).
MAX3100
SPI/Microwire-Compatible
UART in QSOP-16Figure 2. Functional Diagram
MAX3100
SPI/Microwire-Compatible
UART in QSOP-16The receiver section receives data in serial form. The
MAX3100 detects a start bit on a high-to-low RX transi-
tion (Figure 3). An internal clock samples data at 16
times the data rate. The start bit can occur as much as
one clock cycle before it is detected, as indicated by
the shaded portion. The state of the start bit is defined
as the majority of the 7th, 8th, and 9th sample of the
internal 16x baud clock. Subsequent bits are also
majority sampled. Receive data is stored in an 8-word
FIFO. The FIFO is cleared if it overflows.
The on-board oscillator can use a 1.8432MHz or
3.6864MHz crystal, or it can be driven at X1 with a 45%
to 55% duty-cycle square wave.
SPI InterfaceThe bit streams for DIN and DOUT consist of 16 bits,
with bits assigned as shown in the MAX3100
Operationssection. DOUT transitions on SCLK’s falling
edge, and DIN is latched on SCLK’s rising edge (Figure
4). Most operations, such as the clearing of internal
registers, are executed only on CS’s rising edge. The
DIN stream is monitored for its first two bits to tell the
UART the type of data transfer being executed (Write
Config, Read Config, Write Data, Read Data).
Only 16-bit words are expected. If CSgoes high in the
middle of a transmission (any time before the 16th bit),
the sequence is aborted (i.e., data does not get written
to individual registers). Every time CSgoes low, a new
16-bit stream is expected. An example of a write con-
figuration is shown in Figure 4.
Figure 3. Start-Bit Timing
Figure 4. SPI Interface (Write Configuration)
MAX3100
SPI/Microwire-Compatible
UART in QSOP-16
MAX3100 Operations
Write OperationsTable 1 shows write-configuration data. A 16-bit
SPI/Microwire write configuration clears the receive
FIFO and the R, T, RA/FE, D0r–D7r, D0t–D7t, Pr, and Pt
registers. RTSand CTSremain unchanged. The new
configuration is valid on CS’s rising edge if the transmit
buffer is empty (T = 1) and transmission is over. If the
latest transmission has not been completed, the regis-
ters are updated when the transmission is over (T = 0).
The write-configuration bits (FEN, SHDNi, IR, ST, PE, L,
B3–B0) take effect after the current transmission is
over. The mask bits (TM, RM, PM, RAM) take effect
immediately after the 16th clock’s rising edge at SCLK.
Read OperationsTable 2 shows read-configuration data. This register
reads back the last configuration written to the
MAX3100. The device enters test mode if bit 0 = 1. In
this mode, if CS= 0, the RTSpin acts as the 16x clock
generator’s output. This may be useful for direct baud-
rate generation (in this mode, TX and RX are in digital
loopback).
Normally, the write-data register loads the TX-buffer
register. To change the RTSpin’s state without writing
data, set the TEbit. Setting the TEbit high inhibits the
write command (Table 3).
Reading data clears the R bit and interrupt IRQ(Table 4).
Register FunctionsTable 5 shows read/write operation and power-on reset
state (POR), and describes each bit used in program-
ming the MAX3100. Figure 5 shows parity and word-
length control.
Table 3. Write Data (D15, D14 = 1, 0)
Table 4. Read Data (D15, D14 = 0, 0)
Table 2. Read Configuration (D15, D14 = 0, 1)
Table 1. Write Configuration (D15, D14 = 1, 1)
MAX3100
SPI/Microwire-Compatible
UART in QSOP-16
Table 5. Bit Descriptions
MAX3100
SPI/Microwire-Compatible
UART in QSOP-16
Table 5. Bit Descriptions (continued)Figure 5. Parity and Word-Length Control
MAX3100
SPI/Microwire-Compatible
UART in QSOP-16Figure 6. Interrupt Sources and Masks Functional Diagram
Table 6. Interrupt Sources and Masks—Bit Descriptions
Interrupt Sources and MasksA Read Data operation clears the interrupt IRQ. Table
6 gives the details for each interrupt source. Figure 6
shows the functional diagram for the interrupt sources
and mask blocks.
Clock-Oscillator Baud RatesBits B0–B3 of the write-configuration register determine
the baud rate. Table 7 shows baud-rate divisors for given
input codes, as well as the given baud rate for
1.8432MHz and 3.6864MHz crystals. Note that the baud
rate = crystal frequency / 16x division ratio.
Shutdown ModeIn shutdown, the oscillator turns off to reduce power
dissipation (ICC< 10µA). The MAX3100 enters shut-
down in one of two ways: by a software command
(SHDNi bit = 1) or by a hardware command (SHDN=
logic low). The hardware shutdown is effective immedi-
ately and will immediately terminate any transmission in
progress. The software shutdown, requested by setting
SHDNi bit = 1, is entered upon completing the trans-
mission of the data in both the transmit register and the
transmit-buffer register. The SHDNo bit is set when the
MAX3100 enters shutdown (either hardware or soft-
ware). The microcontroller (µC) can monitor the SHDNo
bit to determine when all data has been transmitted,
and shut down any external circuitry (such as RS-232
transceivers) at that time.
Shutdown clears the receive FIFO, R, A, RA/FE,
D0r–D7r, Pr, and Pt registers and sets the T bit high.
Configuration bits (RM, TM, PM, RAM, IR, ST, PE, L,
B0-3, and RTS) can be modified when SHDNo = 1 and
CTS can also be read. Even though RA is reset upon
entering shutdown, it will go high when any transitions
are detected on the RX pin. This allows the UART to
monitor activity on the receiver when in shutdown.
The command to power up (SHDNi = 0) turns on the
oscillator when CSgoes high if SHDNpin = logic high,
with a start-up time of about 25ms. This is done through
a write configuration, which clears all registers but RTS
and CTS. Since the crystal oscillator typically requires
25ms to start, the first received characters will be gar-
bled, and a framing error may occur.
__________Applications Information
Driving Opto-Couplers Figure 7 shows the MAX3100 in an isolated serial inter-
face. The MAX3100 Schmitt-trigger inputs are driven
directly by opto-coupler outputs. Isolated power is pro-
vided by the MAX845 transformer driver and linear reg-
ulator shown. A significant feature of this application is
that the opto-coupler’s skew does not affect the asyn-
chronous serial output’s timing. Only the set-up and
hold times of the SPI interface need to be met.
Figure 8 shows a bidirectional opto-isolated interface
using only two opto-isolators. Over 81% power savings
is realized using IrDA mode due to its 3/16-wide baud
periods.
Crystal-Oscillator Operation—
X1, X2 ConnectionThe MAX3100 includes a crystal oscillator for baud-rate
generation. For standard baud rates, use a 1.8432MHz
or 3.6864MHz crystal. The 1.8432MHz crystal results in
lower operating current; however, the 3.6864MHz crys-
tal may be more readily available in surface mount.
Ceramic resonators are low-cost alternatives to crystals
and operate similarly, though the “Q” and accuracy are
lower. Some ceramic resonators are available with inte-
gral load capacitors, which can further reduce cost.
The tradeoff between crystals and ceramic resonators
is in initial frequency accuracy and temperature drift.
The total error in the baud-rate generator should be
kept below 1% for reliable operation with other sys-
tems. This is accomplished easily with a crystal, and in
most cases can be achieved with ceramic resonators.
Table 8 lists the different types of crystals and res-
onators and their suppliers.
MAX3100
SPI/Microwire-Compatible
UART in QSOP-16
