MAX2360ECM-MAX2364ECM Fast Delivery |IC PHOENIX CO.,LIMITED

MAX2360ECM ,Complete Dual-Band Quadrature TransmittersApplicationsTriple-Mode, Dual-Mode, or Single-Mode Mobile PhonesSatellite Phones RFPLLRFL 1 36 REFW ..
MAX2361ETM/B4A ,Complete Dual-Band Quadrature Transmitters
MAX2361ETM-B4A ,Complete Dual-Band Quadrature Transmitters
MAX2361ETM-B4A ,Complete Dual-Band Quadrature Transmitters
MAX2363ETM+ ,Complete Dual-Band Quadrature Transmitters
MAX2364ECM ,Complete Dual-Band Quadrature TransmittersFeaturesThe MAX2360 dual-band, triple-mode complete transmit- Dual-Band, Triple-Mode Operationter ..
MAX549ACUA+T ,+2.5V to +5.5V, Low-Power, Single/Dual, 8-Bit Voltage-Output DACs in µMAX PackageFeaturesThe MAX548A/MAX549A/MAX550A serial, 8-bit voltage-♦ +2.5V to +5.5V Single-Supply Operationo ..
MAX549AEUA ,+2.5V to +5.5V, Low-Power, Single/Dual, 8-Bit Voltage-Output DACs in レMAX PackageMAX548A/MAX549A/MAX550A19-1206; Rev 0; 3/97+2.5V to +5.5V, Low-Power, Single/Dual,8-Bit Voltage-Out ..
MAX549AEUA+ ,+2.5V to +5.5V, Low-Power, Single/Dual, 8-Bit Voltage-Output DACs in µMAX PackageApplicationsMAX548AC/D 0°C to +70°C Dice*Battery-Powered SystemsMAX548AEPA -40°C to +85°C 8 Plastic ..
MAX550ACPA ,+2.5V to +5.5V, Low-Power, Single/Dual, 8-Bit Voltage-Output DACs in レMAX PackageFeaturesThe MAX548A/MAX549A/MAX550A serial, 8-bit voltage-' +2.5V to +5.5V Single-Supply Operationo ..
MAX550ACUA ,+2.5V to +5.5V, Low-Power, Single/Dual, 8-Bit Voltage-Output DACs in レMAX PackageFeaturesThe MAX548A/MAX549A/MAX550A serial, 8-bit voltage-' +2.5V to +5.5V Single-Supply Operationo ..
MAX550ACUA+T ,+2.5V to +5.5V, Low-Power, Single/Dual, 8-Bit Voltage-Output DACs in µMAX Packageapplications.MAX548ACPA 0°C to +70°C 8 Plastic DIPMAX548ACUA 0°C to +70°C 8 μMAX____

MAX2360ECM-MAX2364ECM
Complete Dual-Band Quadrature Transmitters
General Description
The MAX2360 dual-band, triple-mode complete transmit-
ter for cellular phones represents the most integrated and
architecturally advanced solution to date for this applica-
tion. The device takes a differential I/Q baseband input
and mixes it up to IF through a quadrature modulator and
IF variable-gain amplifier (VGA). The signal is then routed
to an external bandpass filter and upconverted to RF
through an SSB mixer and RF VGA. The signal is further
amplified with an on-board PA driver. Dual IF synthesiz-
ers, dual RF synthesizers, a local oscillator (LO) buffer,
and a 3-wire programmable bus complete the basic func-
tional blocks of this IC. The MAX2362 supports single-
band, single-mode (PCS) operation. The MAX2364
supports single-band cellular dual-mode operation.
The MAX2360 enables architectural flexibility because
its two IF voltage-controlled oscillators (VCOs), two IF
ports, two RF LO input ports, and three PA driver output
ports allow the use of a single receive IF frequency and
split-band PCS filters for optimum out-of-band noise
performance. The PA drivers allow up to three RF SAW
filters to be eliminated. Select a mode of operation by
loading data on the SPI™/QSPI™/MICROWIRE™-com-
patible 3-wire serial bus. Charge-pump current, side-
band rejection, IF/RF gain balancing, standby, and
shutdown are also controlled with the serial interface.
The MAX2360/MAX2362/MAX2364 come in a 48-pin
TQFP-EP package and are specified for the extended
(-40°C to +85°C) temperature range.
Applications
Triple-Mode, Dual-Mode, or Single-Mode
Mobile Phones
Satellite Phones
Wireless Data Links (WAN/LAN)
Wireless Local Area Networks (LANs)
High-Speed Data Modems
High-Speed Digital Cordless Phones
Wireless Local Loop (WLL)
FeaturesDual-Band, Triple-Mode Operation+7dBm Output Power with -54dBc ACPR100dB Power Control RangeSupply Current Drops as Output Power Is ReducedDual Synthesizer for IF and RF LODual On-Chip IF VCOQSPI/SPI/MICROWIRE-Compatible 3-Wire BusDigitally Controlled Operational Modes+2.7V to +5.5V OperationSingle Sideband Upconverter Eliminates SAW
Filters
MAX2360/MAX2362/MAX2364
Complete Dual-Band
Quadrature Transmitters
19-1635; Rev 1; 10/00
Functional Diagram
Ordering Information
*Exposed paddle
MAX2360/MAX2362/MAX2364
Complete Dual-Band
Quadrature Transmitters
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(MAX2360/2/4 test fixture:VCC= VBATT= 2.75V, SHDN= IDLE= TXGATE= 2.0V, VGC = 2.5V, RBIAS= 16kΩ, TA= -40°C to +85°C,
unless otherwise noted. Typical values are at TA= +25°C, and operating modes are defined in Table 6.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND...........................................................-0.3V to +3.6V
RFL, RFH0, RFH1................................................................+5.5V
DI, CLK, CS, VGC, SHDN, TXGATE,IDLE,LOCK................................................-0.3V to (VCC+ 0.3V)
AC Input Pins (IFINL, IFINH, Q, I, TANKL, TANKH,
REF, RFPLL, LOL, LOH)..........................................1.0V peak
Digital Input Current (SHDN, TXGATE, IDLE,
CLK, DI, CS)................................................................±10mA
Continuous Power Dissipation (TA= +70°C)
48-Pin TQFP-EP (derate 27mW/°C above +70°C)...........2.16W
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +160°C
Lead Temperature (soldering, 10s).................................+300°C
MAX2360/MAX2362/MAX2364
Complete Dual-Band
Quadrature Transmitters
ELECTRICAL CHARACTERISTICS
(MAX2360/62/64 evaluation kit, 50Ωsystem, operating modes as defined in Table 6, input voltage at I and Q = 200mVRMSdifferen-
tial, common mode = VCC/2, 300kHz quadrature CW tones, RF and IF synthesizers locked with passive lead-lag second-order loop
filter, REF = 200mVp-p at 19.68MHz, VCC= SHDN= IDLE= CS= TXGATE= 2.75V, VBAT= 2.75V, IF output load = 400Ω, LOH, LOL
input power = -7dBm, fLOL= 966MHz, fLOH= 1750MHz, IFINH = 125mVRMSat 130MHz, IS-95 CDMA modulation fRFH0= fRFH1=
1880MHz, fRFL= 836MHz, TA= +25°C, unless otherwise noted.)
MAX2360/MAX2362/MAX2364
Complete Dual-Band
Quadrature Transmitters
ELECTRICAL CHARACTERISTICS (continued)
(MAX2360/62/64 evaluation kit, 50Ωsystem, operating modes as defined in Table 6, input voltage at I and Q = 200mVRMSdifferen-
tial, common mode = VCC/2, 300kHz quadrature CW tones, RF and IF synthesizers locked with passive lead-lag second-order loop
filter, REF = 200mVp-p at 19.68MHz, VCC= SHDN= IDLE= CS= TXGATE= 2.75V, VBAT= 2.75V, IF output load = 400Ω, LOH, LOL
input power = -7dBm, fLOL= 966MHz, fLOH= 1750MHz, IFINH = 125mVRMSat 130MHz, IS-95 CDMA modulation fRFH0= fRFH1=
1880MHz, fRFL= 836MHz, TA= +25°C, unless otherwise noted.)
Note 1:See Table 6 for register settings.
Note 2:ACPR is met over the specified VCMrange.
Note 3:VCMmust be supplied by the I/Q baseband source with ±6µA capability.
Note 4:Guaranteed by design and characterization.
Note 5:When enabled, turbolock is active during acquisition and injects boost current in addition to the normal charge-pump current.
Note 6:>25°C guaranteed by production test, <25°C guaranteed by design and characterization.
Complete Dual-Band
Quadrature Transmitters
Typical Operating Characteristics
(MAX2360EVKIT, VCC= +2.75V, TA= +25°C, unless otherwise noted.)
MAX2360/MAX2362/MAX2364
Complete Dual-Band
Quadrature Transmitters
I/Q BASEBAND FREQUENCY RESPONSE
MAX2360/2/4-10
FREQUENCY (MHz)
(dBc)
IFOUTH DIFFERENTIAL PORT
OUTPUT IMPEDANCE
MAX2360/2/4-11
FREQUENCY (MHz)
PARALLEL RESISTANCE (
PARALLEL CAPACITANCE (pF)
IFINH DIFFERENTIAL PORT
INPUT IMPEDANCE
MAX2360/2/4-12
FREQUENCY (MHz)
PARALLEL RESISTANCE (
PARALLEL CAPACITANCE (pF)
-15010M
PHASE NOISE LOW-BAND OSCILLATOR
vs. FREQUENCY OFFSET (130.38MHz)
MAX2360/2/4-13
FREQUENCY (Hz)
(dBc/Hz)-110
10k100k1M
-15010M
PHASE NOISE HIGH-BAND OSCILLATOR
vs. FREQUENCY OFFSET (165MHz)
MAX2360/2/4-14
FREQUENCY (Hz)
(dBc/Hz)-110
10k100k1M
MAX2360/2/4-15
RFL OUTPUT SPECTRUM
FREQUENCY (MHz)
AMPLITUDE (dBm)
RFH0 OUTPUT SPECTRUM
MAX2360/2/4-16
FREQUENCY (MHz)
AMPLITUDE (dBm)
RFHO CASCADE ACPR
vs. POUT AND VBAT
MAX2360/2/4-17
POUT (dBm)
ACPR (
dBc)
MAX2360/2/4-18
POUT (dBm)
ACPR (dBc)
CASCADE ACPR vs. POUT AND VBAT
Typical Operating Characteristics (continued)
(MAX2360EVKIT, VCC= +2.75V, TA= +25°C, unless otherwise noted.)
Complete Dual-Band
Quadrature Transmitters
ICC vs. RFL OUTPUT POWER (836MHz)
MAX2360/2/4-19
OUTPUT POWER (dBm)
ICC
(mA)
ICC vs. RFH0 OUTPUT POWER (1880MHz)
MAX2360/2/4-21
OUTPUT POWER (dBm)
(mA)
ICC vs. RFH1 OUTPUT POWER (1880MHz)
MAX2360/2/4-21
OUTPUT POWER (dBm)
(mA)
Typical Operating Characteristics (continued)
(MAX2360EVKIT, VCC= +2.75V, TA= +25°C, unless otherwise noted.)
MAX2360/MAX2362/MAX2364
MAX2360/MAX2362/MAX2364
Complete Dual-Band
Quadrature Transmitters
Pin Description
MAX2360/MAX2362/MAX2364
Complete Dual-Band
Quadrature Transmitters
Pin Description (continued)
MAX2360/MAX2362/MAX2364
Complete Dual-Band
Quadrature Transmitters
Pin Description (continued)
MAX2360/MAX2362/MAX2364
Complete Dual-Band
Quadrature Transmitters
Detailed Description
The MAX2360 complete quadrature transmitter accepts
differential I/Q baseband inputs with external common-
mode bias. A modulator upconverts this to IF frequency
in the 120MHz to 300MHz range. A gain control voltage
pin (VGC) controls the gain of both the IF and RF VGAs
simultaneously to achieve best noise and linearity per-
formance. The IF signal is brought off-chip for filtering,
then fed to a single sideband upconverter followed by
the RF VGA and PA driver. The RF upconverter requires
an external VCO for operation. The IF PLL, RF PLL, and
operating mode can be programmed by an SPI/QSPI/
MICROWIRE-compatible 3-wire interface.
The following sections describe each block in the
MAX2360 Functional Diagram.
I/Q Modulator
Differential in-phase (I) and quadrature-phase (Q) input
pins are designed to be DC-coupled and biased with the
baseband output from a digital-to-analog converter
(DAC). I and Q inputs need a DC bias of VCC/2 and a
current-drive capability of 6µA. Common-mode voltage
will work within a +1.35V to (VCC- 1.25V) range.
Typically, I and Q will be driven differentially with a
200mVRMSbaseband signal. Optionally, I and Q may be
programmed for 100mVRMSoperation with the IQ_LEVEL
bit in the configuration register. The IF VCO output is fed
into a divide-by-two/quadrature generator block to derive
quadrature components to drive the IQ modulator. The
output of the modulator is fed into the VGA.
IF VCOs
There are two VCOs to support high IF and low IF appli-
cations. The VCOs oscillate at twice the desired IF fre-
quency. Oscillation frequency is determined by external
tank components (see Applications Information).
Typical phase-noise performance for the tank is as
shown in Table 1. The high-band and low-band VCOs
can be selected independently of the IF port being
used.
IFLO Output Buffer
IFLO provides a buffered LO output when BUF_EN is 1.
The IFLO output frequency is equal to the VCO fre-
quency when BUF_DIV is 0, and half the VCO frequen-
cy when BUF_DIV is 1. The output power is -6dBm. This
output is intended for applications where the receive IF
is the same frequency as the transmit IF.
IF/RF PLL
The IF/RF PLL uses a charge-pump output to drive a
loop filter. The loop filter will typically be a passive sec-
ond-order lead lag filter. Outside the filter’s bandwidth,
phase noise will be determined by the tank compo-
nents. The two components that contribute most signifi-
cantly to phase noise are the inductor and varactor.
Use high-Q inductors and varactors to maximize equiv-
alent parallel resistance. The IF_TURBO_CHARGE and
the RF_TURBO_CHARGE bits in the CONFIG register
can be set to 1 to enable turbo mode. Turbo mode pro-
vides maximum charge-pump current during frequency
acquisition. Turbo mode is disabled after the second
transition from phase lead to phase lag or from phase
lag to phase lead. Turbo mode is also disabled after
frequency acquisition is achieved. When turbo mode is
disabled, charge-pump current will return to the pro-
grammed levels as set by ICP and RCP bits in the
CONFIG register (Table 4).
IF VGA
The IF VGA allows varying an IF output level that is con-
trolled by the VGC. The voltage range on VGC of 0.5V
to 2.6V. provide a gain-control range of 85dB. There
are two differential IF output ports from the VGA.
IFOUTL+/IFOUTL- are optimized for low IF operation
(120MHz to 235MHz) for IFOUTH+/IFOUTH- support
high IF operation (120MHz to 300MHz). IFOUTL ports
support direct VCO FM modulation. The differential IF
output port has an output impedance of 600Ωwhen
pulled up to VCCthrough a choke.
Single Sideband Mixer
The RF transmit mixer uses a single sideband architec-
ture to eliminate an off-chip RF filter. The single sideband
mixer has IF input stages that correspond to IF output
ports of the VGA. The mixer is followed by the RF VGA.
The RF VGA is controlled by the same VGC pin as the IF
VGA to provide optimum linearity and noise perfor-
mance. The total power control range is >100dB.
PA Driver
The MAX2360 includes three power-amplifier (PA) dri-
vers. Each is optimized for the desired operating fre-
quency. RFL is optimized for cellular-band operation.
Table 1. Typical VCO Phase Noise
(IF = 130.38MHz)
MAX2360/MAX2362/MAX2364
Complete Dual-Band
Quadrature Transmitters
RFH0 and RFH1 are optimized for split-band PCS opera-
tion.The PA drivers have open-collector outputs and
require pull-up inductors. The pull-up inductors can act
as the shunt element in a shunt series match.
Programmable Registers
The MAX2360/MAX2362/MAX2364 include seven pro-
grammable registers consisting of four divide registers,
a configuration register, an operational control register,
and a test register. Each register consists of 24 bits.
The 4 least significant bits (LSBs) are the register’s
address. The 20 most significant bits (MSBs) are used
for register data. All registers contain some “don't care”
bits. These can be either a “0” or a “1” and will not
affect operation (Figure 1). Data is shifted in MSB first,
followed by the 4-bit address. When CSis low, the
clock is active and data is shifted with the rising edge
of the clock. When CStransitions to high, the shift reg-
ister is latched into the register selected by the con-
tents of the address bits. Power-up defaults for the
seven registers are shown in Table 2. The dividers and
control registers are programmed from the SPI/
QSPI/MICROWIRE-compatible serial port.
The RFM register sets the main frequency divide ratio
for the RF PLL. The RFR register sets the reference fre-
quency divide ratio. The RF VCO frequency can be
determined by the following:
RF VCO frequency = fREF·(RFM / RFR)
IFM and IFR registers are similar:
IF VCO frequency = fREF·(IFM / IFR)
where fREFis the external reference frequency for the
MAX2360/MAX2362/MAX2364.
The operational control register (OPCTRL) controls the
state of the MAX2360/MAX2362/MAX2364. See Table 3
for the function of each bit.
The configuration register (CONFIG) sets the configura-
tion for the RF/IF PLL and the baseband I/Q input lev-
els. See Table 4 for a description of each bit.
The test register is not needed for normal use.
Power Management
Bias control is distributed among several functional
sections and can be controlled to accommodate many
different power-down modes as shown in Table 5.
The shutdown control bit is of particular interest since it
differs from the SHDNpin. When the shutdown control
bit is active (SHDN_BIT= 0), the serial interface is left
active so that the part can be turned on with the serial
bus while all other functions remain shut off. In contrast,
when the SHDNpin is low it shuts down everything. In
either case, PLL programming and register information
is lost. To retain the register information, use standby
mode (STBY= 0).
Signal Flow Control
Table 6 shows an example of key registers for triple-
mode operation, assuming half-band PCS and IF fre-
quencies of 130MHz/165MHz.
Applications Information
The MAX2360 is designed for use in dual-band, triple-
mode systems. It is recommended for triple-mode hand-
sets (Figure 2). The MAX2362 is designed for use in
CDMA PCS handset or WLL single-mode 2.4GHz ISM
systems (Figure 3). The MAX2364 is designed for use in
dual-mode cellular systems (Figure 4).
3-Wire Interface
Figure 5 shows the 3-wire interface timing diagram. The
3-wire bus is SPI/QSPI/MICROWIRE compatible.
Table 2. Register Power-Up Default States

Partno	Mfg	Dc	Qty	Available	Descript
MAX2360ECM	MAXIM	N/a	48	avai	Complete Dual-Band Quadrature Transmitters
MAX2364ECM	MAXIM	N/a	2	avai	Complete Dual-Band Quadrature Transmitters