MAX199BCNI+ ,8-Channel, Multi-Range, 5V, 12-Bit DAS with 8+4 Bus Interface and Fault ProtectionELECTRICAL CHARACTERISTICS (continued)(V = 5V ±5%; unipolar/bipolar range; external reference mode, ..
MAX199BCNI+ ,8-Channel, Multi-Range, 5V, 12-Bit DAS with 8+4 Bus Interface and Fault ProtectionApplications REFADJRD 4 25Industrial-Control SystemsHBEN 5 24 INTMAX199RoboticsSHDN 6 23 CH7Data-Ac ..
MAX199BEAI+ ,8-Channel, Multi-Range, 5V, 12-Bit DAS with 8+4 Bus Interface and Fault ProtectionApplications REFADJRD 4 25Industrial-Control SystemsHBEN 5 24 INTMAX199RoboticsSHDN 6 23 CH7Data-Ac ..
MAX199BENI ,Multi-Range (【4V, 【2V, +4V, +2V), +5V Supply, 12-Bit DAS with 8+4 Bus InterfaceFeatures' 12-Bit Resolution, 1/2LSB LinearityThe MAX199 multi-range, 12-bit data-acquisition system ..
MAX199BENI+ ,8-Channel, Multi-Range, 5V, 12-Bit DAS with 8+4 Bus Interface and Fault ProtectionMAX19919-0401; Rev 0; 6/95Multi-Range (±4V, ±2V, +4V, +2V),+5V Supply, 12-Bit DAS w ith 8+4 Bus Int ..
MAX2003ACSE ,NiCd/NiMH Battery Fast-Charge ControllersApplications:VSS 8 9 SNSMemory Hold-UpEmergency SwitchoversDIP/SO____ Maxim Integrated Products 1Fo ..
MAX503CWG ,5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DACApplicationsMAX503CNG 0°C to +70°C 24 Narrow Plastic DIPBattery-Powered Data-Conversion ProductsMAX ..
MAX503CWG+ ,5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DACELECTRICAL CHARACTERISTICS—Single +5V Supply(V = 5V, V = 0V, AGND = DGND = REFGND = 0V, REFIN = 2.0 ..
MAX503EAG ,5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DACELECTRICAL CHARACTERISTICS—Single +5V Supply(V = 5V, V = 0V, AGND = DGND = REFGND = 0V, REFIN = 2.0 ..
MAX503EAG+ ,5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DACapplications. In addition, the shrink small-40μA Shutdown-Mode Currentoutline package (SSOP) measur ..
MAX503EWG ,5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DACFeatures' Buffered Voltage OutputThe MAX503 is a low-power, 10-bit, voltage-output digital-to-analo ..
MAX5041AEAI ,Dual-Phase / Parallelable / Average-Current-Mode ControllersApplicationsOUTPUTServers and WorkstationsPIN-PART TEMP RANGE VOLTAGEPACKAGEPoint-of-Load High-Curr ..
MAX199ACAI+-MAX199ACWI+-MAX199AEAI+-MAX199AENI+-MAX199AEWI+-MAX199BCNI+-MAX199BEAI+-MAX199BENI+
8-Channel, Multi-Range, 5V, 12-Bit DAS with 8+4 Bus Interface and Fault Protection
_______________General DescriptionThe MAX199 multi-range, 12-bit data-acquisition system
(DAS) requires only a single +5V supply for operation,
and converts analog signals up to ±4V at its inputs. This
system provides eight analog input channels that are
independently software programmable for a variety of
ranges: ±VREF, ±VREF/2, 0V to VREF, or 0V to VREF/2.
This increases effective dynamic range to 14 bits, and
provides the user flexibility to interface 4mA-to-20mA,
±12V, and ±15V powered sensors to a single +5V sys-
tem. In addition, the converter is fault-protected to
±16.5V; a fault condition on any channel will notaffect
the conversion result of the selected channel. Other fea-
tures include a 5MHz bandwidth track/hold, 100ksps
throughput rate, internal/external clock, internal/external
acquisition control, 8+4 parallel interface, and operation
with an internal 4.096V or external reference.
A hardware SHDNpin and two programmable power-
down modes (STBYPD, FULLPD) provide low-current
shutdown between conversions. In STBYPD mode, the
reference buffer remains active, eliminating start-up
delays.
The MAX199 employs a standard microprocessor (μP)
interface. Its three-state data I/O interface is configured
to operate with 8-bit data buses, and data-access and
bus-release timing specifications are compatible with
most popular μPs. All logic inputs and outputs are
TTL/CMOS compatible.
The MAX199 is available in 28-pin DIP, wide SO, SSOP,
and ceramic SB packages.
For a different combination of input ranges (±10V, ±5V,
0V to 10V, 0V to 5V), see the MAX197 data sheet. For 12-
bit bus interfaces, see the MAX196/MAX198 data sheet.
________________________ApplicationsIndustrial-Control Systems
Robotics
Data-Acquisition Systems
Automatic Testing Systems
Medical Instruments
Telecommunications
____________________________Features12-Bit Resolution, 1/2LSB LinearitySingle +5V OperationSoftware-Selectable Input Ranges:
±VREF, ±VREF/2, 0V to VREF, 0V to VREF/2Internal 4.096V or External ReferenceFault-Protected Input Multiplexer (±16.5V)8 Analog Input Channels6μs Conversion Time, 100ksps Sampling RateInternal or External Acquisition ControlTwo Power-Down ModesInternal or External Clockulti-Range (±4V, ±2V, +4V, +2V),V Supply, 12-Bit DAS with 8+4 Bus Interface
________________________________________________________________Maxim Integrated Products1DGND
VDD
REF
REFADJ
INT
CH7
AGND
CH6
CH5
CH4
CH3
CH2
CH1
CH0
D0/D8
D1/D9
D2/D10
D3/D11
SHDN
HBEN
CLK
DIP/SO/SSOP/Ceramic SBTOP VIEW
MAX199
__________________Pin Configuration
Call toll free 1-800-722-8266 for free samples or literature.19-0401; Rev 0; 6/95
PARTMAX199ACNI
MAX199BCNI
MAX199ACWI0°C to +70°C
0°C to +70°C
0°C to +70°C
TEMP. RANGEPIN-PACKAGE28 Narrow Plastic DIP
28 Narrow Plastic DIP
28 Wide SO
______________Ordering InformationMAX199BCWI0°C to +70°C28 Wide SO
MAX199ACAI0°C to +70°C28 SSOP
MAX199BCAI0°C to +70°C28 SSOP
MAX199BC/D0°C to +70°CDice*
Functional Diagram appears at end of data sheet.
Ordering Information continued at end of data sheet.*Dice are specified at TA= +25°C, DC parameters only.
Multi-Range (±4V, ±2V, +4V, +2V),V Supply, 12-Bit DAS with 8+4 Bus Interface_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VDD= 5V ±5%; unipolar/bipolar range; external reference mode, VREF= 4.096V; 4.7μF at REF pin; external clock, fCLK= 2.0MHz
with 50% duty cycle; TA= TMINto TMAX, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto AGND............................................................-0.3V to +7V
AGND to DGND.....................................................-0.3V to +0.3V
REF to AGND..............................................-0.3V to (VDD+ 0.3V)
REFADJ to AGND.......................................-0.3V to (VDD+ 0.3V)
Digital Inputs to DGND...............................-0.3V to (VDD+ 0.3V)
Digital Outputs to DGND............................-0.3V to (VDD+ 0.3V)
CH0–CH7 to AGND..........................................................±16.5V
Continuous Power Dissipation (TA= +70°C)
Narrow Plastic DIP (derate 14.29mW/°C above +70°C)....1143mW
Wide SO (derate 12.50mW/°C above +70°C)..............1000mW
SSOP (derate 9.52mW/°C above +70°C)......................762mW
Narrow Ceramic SB (derate 20.00mW/°C above +70°C)..1600mW
Operating Temperature Ranges
MAX199_C_ _.......................................................0°C to +70°C
MAX199_E_ _.....................................................-40°C to +85°C
MAX199_M_ _..................................................-55°C to +125°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10sec).............................+300°C
MAX199A
Internal CLK mode/internal acquisition
control (Note 4)
External CLK mode/external acquisition
control
External CLK mode/external acquisition control
50kHz, VIN= ±4V (Note 3)
Bipolar
Unipolar
Up to the 5th harmonic
Bipolar
MAX199B
Unipolar
CONDITIONS<50
Aperture Jitter15Aperture Delay-86Channel-to-Channel Crosstalk80SFDRSpurious-Free Dynamic Range-85-78THDTotal Harmonic Distortion70
LSB±1/2INLIntegral Nonlinearity
Bits12Resolution
±0.5LSB±0.1Channel-to-Channel Offset
Error Matching
±10
LSB±1DNLDifferential Nonlinearity
LSB
Offset Error±5
UNITSMINTYPMAXSYMBOLPARAMETERMAX199A
MAX199B
MAX199A
MAX199B
Bipolar
Unipolar
Bipolar
Unipolarppm/°C3Gain Temperature Coefficient
(Note 2)
±10
MAX199A
MAX199B
MAX199A
MAX199B
LSB
Gain Error
(Note 2)
±10SINADSignal-to-Noise + Distortion Ratio
ACCURACY (Note 1)
DYNAMIC SPECIFICATIONS(10kHz sine-wave input, ±4.096Vp-p, fSAMPLE= 100ksps)
MAX199A
MAX199B
ulti-Range (±4V, ±2V, +4V, +2V),V Supply, 12-Bit DAS with 8+4 Bus Interface_______________________________________________________________________________________3
ELECTRICAL CHARACTERISTICS (continued)(VDD= 5V ±5%; unipolar/bipolar range; external reference mode, VREF= 4.096V; 4.7μF at REF pin; external clock, fCLK= 2.0MHz
with 50% duty cycle; TA= TMINto TMAX, unless otherwise noted.)
fCLK= 2.0MHz
MAX199_C= +25°C
(Note 5)
Unipolar (see Table 2)
CONDITIONS30Output Short-Circuit Current
ppm/°C
±15REF Output Tempco
(Contact Maxim Applications
for guaranteed temperature
drift specifications)4.0764.0964.116VREFREF Output Voltage40Input Capacitance 3Track/Hold Acquisition TimeVREF/2VVREF
Input Voltage Range
-3dB rolloff2.5
UNITSMINTYPMAXSYMBOLPARAMETERMHz
Small-Signal Bandwidth2.5
Bipolar-60010
Unipolar range
-120010±VREFrange
±VREF/2range
Bipolar
Unipolar40Input Dynamic Resistance
Bipolar (see Table 2)-VREF/2VREF/2
-VREFVREF
0mA to 0.5mA output current (Note 6)7.52.4652.5002.535REFADJ Output Voltage4.7Capacitive Bypass at REF
With recommended circuit (Figure 1)%±1.5REFADJ Adjustment Range
V/V1.6384Buffer Voltage Gain2.44.18Input Voltage Range
Input CurrentVREF= 4.18VVDD- 50mVREFADJ Threshold for
Buffer Disable
Normal, or STANDBY power-down modekΩ10Input ResistanceFULL power-down mode5MΩ
±VREFrange
±VREF/2range
0V to VREFrange
0V to VREF/2range
Normal, or STANDBY
power-down mode
FULL power-down
mode
TC VREFInput Current
MAX199_M±40
MAX199_E±30
0mA to 0.1mA output current (Note 6)mV0.8Load Regulation
ANALOG INPUT
INTERNAL REFERENCE
REFERENCE INPUT (Buffer disabled, reference input applied to REF pin)
Multi-Range (±4V, ±2V, +4V, +2V),V Supply, 12-Bit DAS with 8+4 Bus Interface_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)(VDD= 5V ±5%; unipolar/bipolar range; external reference mode, VREF= 4.096V; 4.7μF at REF pin; external clock, fCLK= 2.0MHz
with 50% duty cycle; TA= TMINto TMAX, unless otherwise noted.)
Internal acquisition3.05.0
External reference = 4.096V
After FULLPD or STBYPD
External acquisition (Note 9)
CONDITIONSFull power-down mode (FULLPD) (Note 7)
3.0tACQI
Acquisition Time
LSB±1/2PSRRPower-Supply Rejection Ratio
(Note 8)
3.0tACQE
External CLKμs4.755.25VDDSupply Voltage
6.0tCONVConversion TimeInternal CLK, CCLK= 100pF6.07.710.0
To 0.1mV, REF
bypass capacitor
fully discharged8Reference Buffer Settling120
Normal mode, bipolar ranges
Normal mode, unipolar ranges
UNITSMINTYPMAXSYMBOLPARAMETERStandby power-down (STBYPD)18
IDDSupply Current610
Internal reference±1/2
CCLK= 100pFMHz1.251.562.00fCLKInternal Clock Frequency
0.12.0fCLKExternal Clock Frequency RangeMHz
External CLK
Internal CLK
Power-up (Note 10)μs200Bandgap Reference
Start-Up Time
External CLKksps100Throughput RateInternal CLK, CCLK= 100pF62
CREF= 4.7μF
CREF= 33μF2.4VINHInput High Voltage0.8VINLInput Low Voltage
VIN= 0V or VDDμA±10IINInput Leakage Current
(Note 5)pF15CINInput Capacitance
VDD= 4.75V, ISINK= 1.6mAV0.4VOLOutput Low Voltage
VDD= 4.75V, ISOURCE= 1mAVVDD- 1VOHOutput High Voltage
(Note 5)pF15COUTThree-State Output Capacitance
POWER REQUIREMENTS
TIMING
DIGITAL INPUTS(D7–D0, CLK, RD, WR, CS, HBEN, SHDN) (Note 11)
DIGITAL OUTPUTS(D7–D4, D3/D11, D2/D10, D1/D9, D0/D8, INT)
ulti-Range (±4V, ±2V, +4V, +2V),V Supply, 12-Bit DAS with 8+4 Bus Interface_______________________________________________________________________________________5
Note 1:Accuracy specifications tested at VDD= 5.0V. Performance at power-supply tolerance limits guaranteed by Power-Supply
Rejection test. Tested for the ±4.096V input range.
Note 2:External reference: VREF= 4.096V, offset error nulled, ideal last code transition = FS - 3/2LSB.
Note 3:Ground “on” channel; sine wave applied to all “off” channels.
Note 4:Maximum full-power input frequency for 1LSB error with 10ns jitter = 3kHz.
Note 5:Guaranteed by design. Not tested.
Note 6:Use static loads only.
Note 7:Tested using internal reference.
Note 8:PSRR measured at full-scale. VDD= 4.75V to 5.25V.
Note 9:External acquisition timing: starts at rising edge of WRwith control bit ACQMOD = low; ends at rising edge of WRwith
ACQMOD = high.
Note 10:Not subject to production testing. Provided for design guidance only.
Note 11:All input control signals specified with tR= tF= 5ns from a voltage level of 0.8V to 2.4V.
Note 12:tDOand tDO1are measured with the load circuits of Figure 2 and defined as the time required for an output to cross 0.8V
or 2.4V.
Note 13:tTRis defined as the time required for the data lines to change by 0.5V.
TIMING CHARACTERISTICS(VDD= 5V ±5%; unipolar/bipolar range; external reference mode, VREF= 4.096V; 4.7μF at REF pin; external clock, fCLK= 2.0MHz
with 50% duty cycle; TA= TMINto TMAX, unless otherwise noted.)
(Note 13)ns70
CONDITIONStTRRDHigh to Output Disable120tINT1RDLow to INTHigh Delay80tCSCSPulse Width
UNITSMINTYPMAXSYMBOLPARAMETER80tWRWRPulse Width0tCSWS0tCSWHCSto WRHold Timeto WRSetup Time0tCSRS0tCSRHCSto RDHold Timeto RDSetup Time100tCWS50tCWHCLK to WRHold Time
CLK to WRSetup Time60tDS0tDHData Valid to WRHold
Data Valid to WRSetup
Figure 2, CL= 100pF (Note 12)
Figure 2, CL= 100pF (Note 12)120tDO120tDO1HBENHighor HBENLowto
Output ValidLow to Output Data Valid
Multi-Range (±4V, ±2V, +4V, +2V),V Supply, 12-Bit DAS with 8+4 Bus Interface_______________________________________________________________________________________
__________________________________________Typical Operating Characteristics(TA = +25°C, unless otherwise noted.)
INTEGRAL NONLINEARITY
vs. DIGITAL CODE
AX199-1
DIGITAL CODE
LIN
ITY
(L
FFT PLOT
FREQUENCY (kHz)
E (d
fTONE = 10kHz
fSAMPLE = 100kHz
MAX199-2
EFFECTIVE NUMBER OF BITS
vs. INPUT FREQUENCY
MAX199-3
INPUT FREQUENCY (kHz)
TIV
F B
fSAMPLE = 100kHz
-55-3545105125TEMPERATURE (°C)
F (V
REFERENCE OUTPUT VOLTAGE (VREF)
vs. TEMPERATURE
MAX199-4
REFADJ
AV = 1.6384
REF+2.5VINTERNAL
REFERENCE
-70-5050110130TEMPERATURE (°C)
(L
CHANNEL-TO-CHANNEL
GAIN-ERROR MATCHING vs. TEMPERATURE
MAX199-7
MAX199-5
-70-5050110130TEMPERATURE (°C)
(L
POWER-SUPPLY REJECTION RATIO
vs. TEMPERATURE
100Hz
120Hz
VDD = 5V ±0.25V
MAX199-6
-70-5050110130TEMPERATURE (°C)
(L
CHANNEL-TO-CHANNEL
OFFSET-ERROR MATCHING vs. TEMPERATURE
ulti-Range (±4V, ±2V, +4V, +2V),V Supply, 12-Bit DAS with 8+4 Bus Interface_______________________________________________________________________________________7
______________________________________________________________Pin DescriptionDigital GroundDGND28
+5V Supply. Bypass with 0.1μF capacitor to AGND.VDD27
INTgoes low when conversion is complete and output data is ready.INT24
Bandgap Voltage-Reference Output / External Adjust Pin. Bypass with a 0.01μF capacitor to AGND.
Connect to VDDwhen using an external reference at the REFpin.REFADJ25
Reference Buffer Output / ADC Reference Input. In internal reference mode, the reference buffer provides a
4.096V nominal output, externally adjustable at REFADJ. In external reference mode, disable the internal
buffer by pulling REFADJ to VDD.
REF26
Three-State Digital I/O. D2 output (HBEN = low), D10 output (HBEN = high).D2/D1012
Three-State Digital I/O. D1 output (HBEN = low), D9 output (HBEN = high).D1/D913
Three-State Digital I/O. D0 output (HBEN = low), D8 output (HBEN = high). D0 = LSB.D0/D814
Analog GroundAGND15
Analog Input ChannelsCH0–CH716–23
Used to multiplex the 12-bit conversion result. When high, the 4 MSBs are multiplexed on the data bus;
when low, the 8 LSBs are available on the bus.HBEN5
Shutdown. Puts the device into full power-down (FULLPD) mode when pulled low.SHDN6
Three-State Digital I/OD7–D47–10
Three-State Digital I/O. D3 output (HBEN = low), D11 output (HBEN = high).D3/D1111
When CSis low, a falling edge on RDwill enable a read operation on the data bus.RD4
When CSis low, in the internal acquisition mode, a rising edge on WRlatches in configuration data and starts an
acquisition plus a conversion cycle. When CSis low, in the external acquisition mode, the first rising edge onstarts an acquisition and a second rising edge on WRends acquisition and starts a conversion cycle.3
PINChip Select, active low.CS2
Clock Input. In external clock mode, drive CLK with a TTL/CMOS compatible clock. In internal clock mode,
place a capacitor (CCLK) from this pin to ground to set the internal clock frequency; fCLK= 1.56MHz typical
with CCLK= 100pF.
CLK1
FUNCTIONNAME100k
510k
24k
REFADJ
+5V
0.01mF
MAX199
Figure 1. Reference-Adjust Circuit
DOUT
DOUT
+5V
a) High-Z to VOH and VOL to VOHb) High-Z to VOL and VOH to VOLCLOADCLOAD
Figure 2. Load Circuits for Enable Time
Multi-Range (±4V, ±2V, +4V, +2V),V Supply, 12-Bit DAS with 8+4 Bus Interface_______________________________________________________________________________________
_______________Detailed Description
Converter OperationThe MAX199, a multi-range, fault-tolerant ADC, uses
successive approximation and internal input track/hold
(T/H) circuitry to convert an analog signal to a 12-bit
digital output. The parallel-output format provides easy
interface to microprocessors (μPs). Figure 3 shows the
MAX199 in its simplest operational configuration.
Analog-Input Track/HoldIn the internal acquisition control mode (control bit D5
set to 0), the T/H enters its tracking mode on WR’s ris-
ing edge, and enters its hold mode when the internally
timed (6 clock cycles) acquisition interval ends. In bipo-
lar mode, a low-impedance input source, which settles
in less than 1.5μs, is required to maintain conversion
accuracy at the maximum conversion rate.
When configured for unipolar mode, the input does not
need to be driven from a low-impedance source. The
acquisition time (tAZ) is a function of the source output
resistance (RS), the channel input resistance (RIN), and
the T/H capacitance.
Acquisition time is calculated by:
For 0V to VREF: tAZ= 9 x (RS+ RIN) x 16pF
For 0V to VREF/2: tAZ= 9 x (RS+ RIN) x 32pF
where RIN= 7kΩ, and tAZis never less than 2μs (0V to
VREFrange) or 3μs (0V to VREF/2range).
In the external acquisition control mode (D5 = 1), the
T/H enters its tracking mode on the first WRrising edge
and enters its hold mode when it detects the second WR
rising edge with D5 = 0. See the External Acquisition
section.
Input BandwidthThe ADC’s input tracking circuitry has a 5MHz small-
signal bandwidth. When using the internal acquisition
mode with an external clock frequency of 2MHz, a
100ksps throughput rate can be achieved. It is possible
to digitize high-speed transient events and measure
periodic signals with bandwidths exceeding the ADC’s
sampling rate by using undersampling techniques. To
avoid high-frequency signals being aliased into the fre-
quency band of interest, anti-alias filtering is recom-
mended (MAX274/MAX275 continuous-time filters).
Input Range and ProtectionFigure 4 shows the equivalent input circuit. The MAX199
can be programmed for input ranges of ±VREF, ±VREF/2,
0V to VREF, or 0V to VREF/2by setting the appropriate
control bits (D3, D4) in the control byte (see Tables 1 and
2). When an external reference is applied at REFADJ, the
voltage at REF is given by VREF= 1.6384 x VREFADJ(2.4V
< VREF< 4.18V).
DGND
VDD
REF
REFADJ
INT
CH7
CH6
CH5
CH4
CH3
CH2
CH1
CH0
AGND
4.7mF0.1mF
+5V
+4.096V
OUTPUT STATUSP
CONTROL
INPUTS
CLK
HBEN
SHDN
D3/D11
D2/D10
D1/D9
D0/D8
100pFP DATA BUS
ANALOG
INPUTS
MAX199
Figure 3. Operational Diagram
5.12k
5.12k
CH_
BIPOLAR
UNIPOLAR
VOLTAGE
REFERENCE
T/H
OUT
HOLDTRACK
TRACKHOLD
OFF
CHOLD
S1 = BIPOLAR/UNIPOLAR SWITCH
S2 = INPUT MUX SWITCH
S3, S4 = T/H SWITCH
Figure 4. Equivalent Input Circuit
