MAX1997ETJ+T ,Quintuple/Triple-Output TFT LCD Power Supplies with Fault Protection and VCOM BufferELECTRICAL CHARACTERISTICS(Circuit of Figure 1, V = 3V, V = 10V, SHDN = ONDC = FREQ = IN, C = 0.22µ ..
MAX1997ETJ+T ,Quintuple/Triple-Output TFT LCD Power Supplies with Fault Protection and VCOM Bufferfeatures a high-current backplane driverMAX1998ETP -40°C to +85°C 20 Thin QFN 5mm x 5mm(VCOM). This ..
MAX1997ETJ+T ,Quintuple/Triple-Output TFT LCD Power Supplies with Fault Protection and VCOM BufferFeaturesThe MAX1997/MAX1998 provide the voltages required for♦ 2.7V to 5.5V Input Supply Rangeactiv ..
MAX19985AETX+T ,Dual, SiGe, High-Linearity, High-Gain, 700MHz to 1000MHz Downconversion Mixer with LO Buffer/SwitchApplications for Operating Device in Reduced-Power/Reduced-Performance Mode®850MHz WCDMA and cdma20 ..
MAX1999 ,High-Efficiency, Quad Output, Main Power-Supply Controllers for Notebook ComputersApplicationsPGOOD 2 27 LX3ON3 3 26 DH3Notebook and Subnotebook ComputersON5 4 25 LDO3PDAs and Mobil ..
MAX19995AETX+T ,Dual, SiGe, High-Linearity, 1700MHz to 2200MHz Downconversion Mixer with LO Buffer/SwitchApplications♦ External Current-Setting Resistors Provide OptionUMTS/WCDMA Base Stationsfor Operatin ..
MAX5033CASA ,500mA, 76V, High-Efficiency, MAXPower Step-Down DC-DC ConverterFeatures Wide 7.5V to 76V Input Voltage Range The MAX5033 easy-to-use, high-efficiency, high-volta ..
MAX5033CUSA+ ,500mA, 76V, High-Efficiency, MAXPower Step-Down DC-DC ConverterApplicationsMAX5033BASA -40°C to +125°C 8 SO● Consumer ElectronicsMAX5033CUSA 0°C to +85°C 8 SO● In ..
MAX5033DASA ,500mA, 76V, High-Efficiency, MAXPower Step-Down DC-DC ConverterELECTRICAL CHARACTERISTICS (MAX5033_U_ _)(V = +12V, V = +12V, I = 0, T = 0°C to +85°C, unless other ..
MAX5033DASA+ ,500mA, 76V, High-Efficiency, MAXPower Step-Down DC-DC ConverterFeaturesThe MAX5033 easy-to-use, high-efficiency, high-voltage, ● Wide 7.5V to 76V Input Voltage Ra ..
MAX5033DASA+T ,500mA, 76V, High-Efficiency, MAXPower Step-Down DC-DC ConverterEVALUATION KIT AVAILABLEMAX5033 500mA, 76V, High-Efficiency, MAXPower Step-Down DC-DC Converter
MAX5033DUSA+ ,500mA, 76V, High-Efficiency, MAXPower Step-Down DC-DC ConverterFeaturesThe MAX5033 easy-to-use, high-efficiency, high-voltage, ● Wide 7.5V to 76V Input Voltage Ra ..
MAX1997ETJ+-MAX1997ETJ+T
Quintuple/Triple-Output TFT LCD Power Supplies with Fault Protection and VCOM Buffer
General DescriptionThe MAX1997/MAX1998 provide the voltages required for
active-matrix, thin-film transistor liquid-crystal displays
(TFT LCDs). Both combine a high-performance step-up
regulator with two linear-regulator controllers, input pro-
tection switch control, and flexible sequence program-
ming. The MAX1997 contains two additional linear-
regulator controllers and a VCOM buffer. The MAX1997/
MAX1998 can operate from input supplies of 2.7V to 5.5V
and feature multiple levels of protection circuitry, making
them complete power-supply systems for displays.
The main DC-DC converter provides the regulated supply
voltage for the display’s source-driver ICs. The converter
is a high-frequency (up to 1.5MHz) step-up regulator with
an integrated 14V N-channel MOSFET that allows the use
of ultra-small inductors and ceramic capacitors while
achieving efficiencies over 85%. Its current-mode control
architecture provides fast transient response to pulsed
loads. Internal soft-start and cycle-by-cycle current limit
help prevent input surge currents.
The positive and negative linear-regulator controllers
postregulate charge-pump outputs for TFT gate-on and
gate-off supplies. Both linear-regulator controllers, as well
as the step-up regulator, have supply-sequencing control
inputs. The three outputs can be sequenced in any order
by selecting the appropriate external components.
The MAX1997 features a high-current backplane driver
(VCOM). This buffer provides peak currents exceeding
300mA (typ) and requires only a 0.47µF output filter
capacitor. The MAX1997’s two additional linear-regulator
controllers can be used to build the gamma reference
voltage and a logic supply.
The MAX1997/MAX1998 have a unique input switch con-
trol that can replace the typical input supply fuse. When a
fault is detected, the regulator is disconnected from the
input supply. The fault detector monitors all the regulated
output voltages and the current from the input supply. In
addition, the MAX1997/MAX1998 enter shutdown when
the internal over-temperature threshold is reached.
The MAX1997 is available in a 32-pin thin QFN package
and the MAX1998 is available in a 20-pin thin QFN pack-
age. Both packages have a maximum thickness of
0.8mm suitable for ultra-thin LCD panels.
ApplicationsNotebook Computer Displays
LCD Monitors
Car Navigation Displays
Features2.7V to 5.5V Input Supply RangeAdjustable (Up to +13V) Output Voltage for
Source-Driver ICsIntegrated High-Efficiency Power MOSFETLinear-Regulator Controllers for TFT Gate-On and
Gate-Off SuppliesHigh-Current VCOM Buffer (MAX1997 Only)Two Additional Linear-Regulator Controllers
(MAX1997 Only)Programmable Power-Up SequencingMultiple Overload Protection with Thermal
Shutdown1µA Shutdown Current32-Pin/20-Pin Thin QFN Packages
MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM Buffer19-2638; Rev 0; 10/02
Ordering Information
PARTTEMP RANGEPIN-PACKAGE
MAX1997ETJ-40°C to +85°C32 Thin QFN 5mm x 5mm
MAX1998ETP-40°C to +85°C20 Thin QFN 5mm x 5mm
FREQINGATEOCPOCN
DRVN
FBN
DRVA
REF
GND
FBP
DRVP
ON2
ONP
ONN
PGNDTGNDA
TOP VIEW19181716789
MAX1998
THIN QFN 5mm × 5mm
Pin ConfigurationsPin Configurations continued at end of data sheet.
MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM Buffer
ABSOLUTE MAXIMUM RATINGSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
IN, SHDN, FB, FBP, FBN, FB1, FB2, ONDC,
ONP, ONN, ON2, TGNDA, TGNDB to GND.............-0.3V to +6V
PGND to GND.....................................................................±0.3V
LX, VDDBto GND....................................................-0.3V to +14V
DRVP, DRV1, DRV2, DRVA to GND.......................-0.3V to +30V
REF, FREQ, GATE, OCN, OCP, CT,
PFLT to GND..................................................-0.3V to VIN+ 0.3V
DRVN to GND..........................................VIN - 28V to VIN + 0.3V
FBPB, FBNB, OUTB to GND.......................-0.3V to VDDB + 0.3V
OUTB Continuous Output Current..................................±100mA
MAX1997 Continuous Power Dissipation (TA= +70°C)
32-Pin Thin QFN
(derate 21.2mW/°C above +70°C)............................1702mW
MAX1998 Continuous Power Dissipation (TA= +70°C)
20-Pin Thin QFN
(derate 20mW/°C above +70°C)...............................1600mW
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
ELECTRICAL CHARACTERISTICS(Circuit of Figure 1, VIN= 3V, VDDB= 10V, SHDN= ONDC = FREQ = IN, CREF= 0.22µF, PGND = GND, TA
= 0°C to +85°C. Typical values are at TA= +25°C, unless otherwise noted.)
PARAMETERCONDITIONSMINTYPMAXUNITSIN Supply Range2.75.5V
VIN rising2.52.72.9IN Undervoltage Lockout Threshold350mV (typ)
hysteresisVIN falling2.22.352.5V
VFB = VFBP = VFB1 = VFB2 = 1.5V, VFBN = 0
(MAX1997 only)0.541.25IN Quiescent Current (Note 1)
VFB = VFBP = 1.5V, VFBN = 0 (MAX1998 only)0.4761
IN Shutdown CurrentV SHDN = 0, VIN = 5.5V0.11µA
-2µA < IREF < 50µA1.2311.2501.269REF Output Voltage-2µA < IREF < 75µA1.2251.2501.275V
Thermal Shutdown160°C
OVERCURRENT COMPARATORInput Offset VoltageVOCN = VOCP = 1.5V to 0.8V × VIN-5+5mV
Input Bias CurrentVOCN = VOCP = 0.8V × VIN-50+50nA
OCN, OCP Input Common-Mode Range1.50.8 ×
VINV
FAULT TIMERPFLT = GND (MAX1997 only)21.8
PFLT unconnected (MAX1997 only)43.6Fault Timer Period
PFLT = IN, or MAX199887.2
GATE Output Sink Current During SlewVGATE = 1.5V during turn-on transition51015µAGATE Output Pulldown Resistance VGATE < 0.5V 200 ΩGATE Output Pullup Resistance 200 Ω
MAIN STEP-UP REGULATOROutput Voltage Range VIN 13 VFREQ = IN 1.5FREQ unconnected 0.637 0.75 0.863 Operating FrequencyFREQ = GND 0.375 MHz
MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM Buffer
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1, VIN= 3V, VDDB= 10V, SHDN= ONDC = FREQ = IN, CREF= 0.22µF, PGND = GND, TA
= 0°C to +85°C.Typical values are at TA= +25°C, unless otherwise noted.)
PARAMETERCONDITIONSMINTYPMAXUNITSOscillator Maximum Duty Cycle 80 85 90 %FB Regulation Voltage ILX = 200mA 1.229 1.242 1.254 VFB Fault Trip Level VFB falling 0.96 1.00 1.04 VFB Load Regulation IMAIN = 0 to full load -1.6 %FB Line Regulation VIN = 2.7V to 5.5V 0.2 0.4 %/VFB Input Bias Current VFB = 1.5V -100 +100 nALX On-Resistance 250 450 mΩLX Leakage Current VLX = 13V 0.01 20 µALX Current Limit 1.6 2.1 2.8 ALX RMS Current Rating (Note 2) 1.4 ASoft-Start Period 4096/fOSC sSoft-Start Step Size VREF/32 V
POSITIVE LINEAR-REGULATOR CONTROLLERS (REG P, REG 1, AND REG 2)IDRVP = 100µAIDRV1 = 1350µA (MAX1997 only) FB_ Regulation VoltageIDRV2 = 335µA (MAX1997 only)1.225 1.250 1.275 VFB_ Fault Trip Level VFB_ falling 0.96 1.00 1.04 VFB_ Input Bias Current VFB_ = 1.25V -250 +250 nAVDRVP = 10V, IDRVP = 0.05mA to 1mAVDRV1 = 10V, IDRV1 = 0.5mA to 5mA
(MAX1997 only) FB_ Effective Load Regulation Error
(Transconductance) VDRV2 = 10V, IDRV2 = 0.1mA to 2mA
(MAX1997 only) -1.5 -2 %IDRVP = 100µA, 2.7V < VIN < 5.5VIDRV1 = 1350µA, 2.7V < VIN < 5.5V
(MAX1997 only) FB_ Line (IN) Regulation ErrorIDRV2 = 335µA, 2.7V < VIN < 5.5V
(MAX1997 only) 1 mVBandwidth (Note 2) 1000 kHzDRVP Sink Current 2 3.3 DRV1 Sink Current (MAX1997 only) 5 18 DRV2 Sink Current (MAX1997 only)VFB_ = 1.1V, VDRV_ = 10V5 15 mADRV_ Leakage Current VFB_ = 1.5V, VDRV_ = 28V 0.1 10 µASoft-Start Period 4096/fOSC sSoft-Start Step Size VREF/32 V
NEGATIVE LINEAR-REGULATOR CONTROLLER (REG N)FBN Regulation Voltage IDRVN = 100µA 95 125 155 mVFBN Fault Trip Level VFBN rising 325 370 475 mVFBN Input Bias Current VFBN = 0V -200 +200 nA
MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM Buffer
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1, VIN= 3V, VDDB= 10V, SHDN= ONDC = FREQ = IN, CREF= 0.22µF, PGND = GND, TA
= 0°C to +85°C.Typical values are at TA= +25°C, unless otherwise noted.)
PARAMETERCONDITIONSMINTYPMAXUNITSFBN Effective Load Regulation Error
(Transconductance) VDRVN = -10V, IDRVN = 50µA to 1mA 18 25 mVFBN Line (IN) Regulation Error IDRVN = 100µA, 2.7V < VIN < 5.5V 1 mVBandwidth (Note 2) 1000 kHzDRVN Source Current VFBN = 200mV, VDRVN = -10V 2 4.2 mADRVN Leakage Current VFBN = -0.1V, VDRVN = -20V 0.1 10 µASoft-Start Period 4096/fOSC sSoft-Start Step Size VREF/32 V
VCOM BUFFER (MAX1997 only)VDDB Supply Range 4.5 13 VVDDB Supply Current VFBPB = VFBNB = 5V, VDDB = 9V 367 900 µAVDDB Shutdown Current VDDB = 13V, SHDN = ONDC = GND 3.5 13 µAInput Offset Voltage VFBPB = 2.5V, no load -5 +5 mVInput Bias Current VFBPB = VFBNB = 1.2V to VDDB - 1.2V 1 µAInput Offset Current VFBPB = VFBNB = 1.2V to VDDB - 1.2V -100 +100 nAInput Common-Mode Range VDDB = 4.5V to 13V 1.2 VDDB -
1.2 VPower-Supply Rejection Ratio VDDB = 4.5V to 13V, VFBPB = 2.25V 70 dBCommon-Mode Rejection Ratio VFBPB = VFBNB = 1.2V to VDDB - 1.2V 70 dBGain-Bandwidth Product Small signal 1/6πCL HzLoad-Transient Settling Time RL = 25Ω, CL = 10nF, VDRIVE = 9V, settle to within
10mV (Note 4) 5 µsSmall signal (±1mV overdrive) 0.3 Transconductance Large signal (±30mV overdrive) 7.2 µSOutput Current Drive±100mV overdrive, VOUTB = 3V or 7V±150±300mA
LOGIC SIGNALS (SHDN, ONDC)Input Low Voltage 100mV typ hysteresis 0.4 VInput High Voltage 1.6 VInput Current 0.01 1 µA
CONTROL INPUTS AND OUTPUTSONN, ONP, ON2 Comparator OffsetV O N _ - VCT, VCT = 1.25V ±50mV-50+50mV
DRVA Sink CurrentVDRVA = 10V, VCT = 1.25V, V ON2 = 2V511mADRVA Off-LeakageVDRVA = 28V, VCT = 1.25V, V ON2 = 1V0.110µA
CT Source CurrentVCT = 1V2.557.5µA
CT Discharge ResistanceVCT = 1V15100Ω
FREQ, PFLT Input Low Voltage1V
FREQ, PFLT Input Middle VoltageVIN/2
FREQ, PFLT Input High VoltageVIN - 1V
FREQ, PFLT Input CurrentFREQ, PFLT = GND or IN-50+50µA
MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM Buffer
ELECTRICAL CHARACTERISTICS(VIN= 3V, VDDB= 10V, SHDN= ONDC = FREQ = IN, CREF= 0.22µF, PGND = GND, TA
= -40°C to +85°C, unless otherwise noted.)(Note 3)
PARAMETERCONDITIONSMINTYPMAXUNITSIN Supply Range2.75.5V
VIN rising2.52.9IN Undervoltage Lockout Threshold350mV typ
hysteresisVIN falling2.22.5V
VFB = VFBP = VFB1 = VFB2 = 1.5V, VFBN = 0
(MAX1997 only)1.25IN Quiescent Current (Note 1)
VFB = VFBP = 1.5V, VFBN = 0 (MAX1998 only)1
-2µA < IREF < 50µA1.2231.270REF Output Voltage-2µA < IREF < 75µA1.2181.280V
OVERCURRENT COMPARATORInput Offset VoltageVOCN = VOCP = 1.5V to 0.8V × VIN-5+5mV
Input Bias CurrentVOCN = VOCP = 0.8V × VIN-50+50nA
OCN, OCP Input Common-Mode Range 1.50.8 ×
VINV
MAIN STEP-UP REGULATOROutput Voltage Range VIN 13 VFREQ = IN1 2FREQ unconnected 0.563 0.937 Operating FrequencyFREQ = GND 0.25 0.50MHzOscillator Maximum Duty Cycle 78 92 %FB Regulation Voltage ILX = 200mA 1.215 1.260 VFB Fault Trip Level VFB falling 0.96 1.04 VFB Input Bias Current VFB = 1.5V -100 +100 nALX On-Resistance 450 mΩLX Current Limit 1.6 2.8 A
POSITIVE LINEAR-REGULATOR CONTROLLERS (REG P, REG 1, AND REG 2)IDRVP = 100µAIDRV1 = 1350µA (MAX1997 only) FB_ Regulation VoltageIDRV2 = 335µA (MAX1997 only)1.213 1.288 VFB_ Fault Trip Level VFB_ falling 0.96 1.04 VVDRVP = 10V, IDRVP = 0.05mA to 1mAVDRV1 = 10V, IDRV1 = 0.5mA to 5mA
(MAX1997 only) FB_ Effective Load Regulation Error
(Transconductance) VDRV2 = 10V, IDRV2 = 0.1mA to 2mA
(MAX1997 only) -2.5 %DRVP Sink Current 1 DRV1 Sink Current (MAX1997 Only) 5 DRV2 Sink Current (MAX1997 Only)VFB_ = 1.1V, VDRV_ = 10V5 mA
MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM Buffer
ELECTRICAL CHARACTERISTICS (continued)(VIN= 3V, VDDB= 10V, SHDN= ONDC = FREQ = IN, CREF= 0.22µF, PGND = GND, TA
= -40°C to +85°C, unless otherwise noted.)(Note 3)
PARAMETERCONDITIONSMINTYPMAXUNITS
NEGATIVE LINEAR-REGULATOR CONTROLLER (REG N)FBN Regulation Voltage IDRVN = 100µA 95 155 mVFBN Fault Trip Level VFBN rising 325 475 mVFBN Effective Load Regulation Error
(Transconductance) VDRVN = -10V, IDRVN = 0.05mA to 5mA 30 mVDRVN Source Current VFBN = 200mV, VDRVN = -10V 1 mA
VCOM BUFFER (MAX1997 only)VDDB Supply Range 4.5 13 VVDDB Supply Current VFBPB = VFBNB = 5V, VDDB = 9V 900 µAInput Offset Voltage VFBPB = 2.5V, no load -5 +5 mVInput Bias Current VFBPB = VFBNB = 1.2V to VDDB - 1.2V 1 µAInput Common-Mode Range VDDB = 4.5V to 13V 1.2 VDDB -
1.2 VOut Current Drive±100mV overdrive, VOUTB = 3V or 7V±150mA
LOGIC SIGNALS (SHDN, ONDC)Input Low Voltage 100mV typ hysteresis 0.4 VInput High Voltage 1.6 V
CONTROL INPUTS AND OUTPUTSFREQ, PFLT Input Low Voltage1V
FREQ, PFLT Input High VoltageVIN - 1V
FREQ, PFLT Input CurrentFREQ, PFLT = GND or IN-50+50µA
Note 1:Quiescent current does not include switching losses.
Note 2:Guaranteed by design, not production tested.
Note 3:Specifications to -40°C are guaranteed by design, not production tested.
Note 4:The VCOM buffer load transient settling time is measured with the following circuit:
MAX1997
20kΩ
20kΩ
25Ω
10nF
FBPBVDDB
GND
1μF
1μF
OUTB
FBNB
VGAMMA
8.6V
VSOURCE
VDRIVE
MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM Buffer
Typical Operating Characteristics(Circuit of Figure 1, VIN= 3.3V, VMAIN= 9V, VG_ON= 20V, VG_OFF= -7V, VLOGIC= 2.5V, VGAMMA= 8.6V, TA= +25°C,
unless otherwise noted.)
STEP-UP REGULATOR EFFICIENCY
vs. LOAD CURRENT (VMAIN = 9V)MAX1997 toc01
LOAD CURRENT (mA)
EFFICIENCY (%)
VIN = 2.7V
VIN = 3.3V
VIN = 5.5V
STEP-UP REGULATOR OUTPUT VOLTAGE
vs. LOAD CURRENT (VMAIN = 9V)MAX1997 toc02
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
VIN = 2.7V
VIN = 3.3V
VIN = 5.5V
STEP-UP REGULATOR EFFICIENCY
vs. LOAD CURRENT (VMAIN = 13V)MAX1997 toc03
LOAD CURRENT (mA)
EFFICIENCY (%)
VIN = 2.7V
VIN = 3.3V
VIN = 5.5V
STEP-UP REGULATOR EFFICIENCY
vs. LOAD CURRENTMAX1997 toc04
LOAD CURRENT (mA)
EFFICIENCY (%)
VIN = 5.5V
VIN = 3.3V
VIN = 2.7V
750kHz OPERATION
L = 4.7μH COILCRAFT LPO25061B-472
COUT = 3 x 4.7μF/10V X7R CERAMIC
STEP-UP REGULATOR
SWITCHING FREQUENCY vs. INPUT VOLTAGEMAX1997 toc05
INPUT VOLTAGE (V)
FREQUENCY (kHz)
VMAIN = 9V
IMAIN = 200mA
FREQUENCY = VIN
FREQUENCY = OPEN
FREQUENCY = 0
STEP-UP REGULATOR NORMAL OPERATION
(200mA LOAD)MAX1997 toc06
1μs/div1A
10V
8.98V
9.02V
A: VLX, 5V/div
B: VMAIN = 9V, 20mV/div, AC-COUPLED
C: INDUCTOR CURRENT, 1A/div
STEP-UP REGULATOR LOAD TRANSIENT RESPONSE
(WITHOUT LAG COMPENSATION, FIGURE 1)MAX1997 toc07
10μs/div0.5A
200mA
8.95V
A: IMAIN = 0 TO 200mA, 200mA/div
B: VMAIN = 9V, 50mV/div, AC-COUPLED
C: INDUCTOR CURRENT, 500mA/div
MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM Buffer
Typical Operating Characteristics (continued)(Circuit of Figure 1, VIN= 3.3V, VMAIN= 9V, VG_ON= 20V, VG_OFF= -7V, VLOGIC= 2.5V, VGAMMA= 8.6V, TA= +25°C,
unless otherwise noted.)
STEP-UP REGULATOR LOAD TRANSIENT RESPONSE
(WITH LAG COMPENSATION, FIGURE 9)MAX1997 toc08
10μs/div0.5A
200mA
8.9V
A: IMAIN = 0 TO 200mA, 200mA/div
B: VMAIN = 9V, 50mV/div, AC-COUPLED
C: INDUCTOR CURRENT, 500mA/div
R7 = 76.8kΩ, R8 = 12.1kΩ, R10 = 1.5kΩ, C10 = 470pF
STEP-UP REGULATOR LOAD TRANSIENT RESPONSE
(2μs PULSES)
(WITHOUT LAG COMPENSATION, FIGURE 1)MAX1997 toc09
4μs/div1A
8.9V
50mA
A: IMAIN = 50mA TO 1A, 1A/div
B: VMAIN = 9V, 100mV/div, AC-COUPLED
C: INDUCTOR CURRENT, 1A/div
STEP-UP REGULATOR LOAD TRANSIENT RESPONSE
(2μs PULSES)
(WITH LAG COMPENSATION, FIGURE 9)MAX1997 toc10
10μs/div1A
8.9V
50mA
A: IMAIN = 50mA TO 1A, 1A/div
B: VMAIN = 9V, 100mV/div, AC-COUPLED
C: INDUCTOR CURRENT, 1A/div
R7 = 76.8kΩ, R8 = 12.1kΩ, R10 = 1.5kΩ, C10 = 470pF
STEP-UP REGULATOR SOFT-STARTMAX1997 toc11
1ms/div
10V
A: VSHDN, 5V/div
B: VGATE, 5V/div
C: VDRAIN, 5V/div
D: VMAIN, 5V/div
POWER-UP SEQUENCEMAX1997 toc12
4ms/div
10V
-10V
10V
20V
A: VMAIN, 10V/div
B: VSOURCE, 10V/div
C: VGATE_ON, 10V/div
D: VGATE_OFF, 10V/div
VONN < VONP < VON2
10V
POWER-UP SEQUENCEMAX1997 toc13
4ms/div
10V
-10V
10V
20V
A: VMAIN, 10V/div
B: VSOURCE, 10V/div
C: VGATE_ON, 10V/div
D: VGATE_OFF, 10V/div
VONN > VONP > VON2
10V
MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM Bufferypical Operating Characteristics (continued)(Circuit of Figure 1, VIN= 3.3V, VMAIN= 9V, VG_ON= 20V, VG_OFF= -7V, VLOGIC= 2.5V, VGAMMA= 8.6V, TA= +25°C,
unless otherwise noted.)
REG P (GATE-ON VOLTAGE)
LOAD REGULATIONMAX1997 toc14
LOAD CURRENT (mA)
OUTPUT-VOLTAGE VARIATION (%)
REG N (GATE-OFF VOLTAGE)
LOAD REGULATION
MAX1997 toc15
LOAD CURRENT (mA)
OUTPUT-VOLTAGE VARIATION (%)
REG 1 (LOGIC SUPPLY)
LOAD REGULATION
MAX1997 toc16
LOAD CURRENT (mA)
OUTPUT-VOLTAGE VARIATION (%)-0.8
REG 2 (GAMMA REFERENCE)
LOAD REGULATION
MAX1997 toc17
LOAD CURRENT (mA)
OUTPUT-VOLTAGE VARIATION (%)
REG 1 (LOGIC SUPPLY)
LOAD TRANSIENT RESPONSE
MAX1997 toc18
40μs/div
2.49V
300mA
2.5V
100mA
200mA
A: LOAD CURRENT, 0 TO 250mA, 100mA/div
B: VLOGIC = 2.5V, 10mV/div, AC-COUPLED
REG 2 (GAMMA REFERENCE)
VMAIN TRANSIENT REJECTIONMAX1997 toc19
4μs/div
8.8V
20V
8.58V
8.60V
8.62V
A: VLX, 20V/div
B: VGAMMA = 8.6V, 20mV/div, AC-COUPLED
C: VMAIN = 9V, 200mV/div, AC-COUPLED
D: IMAIN = 0 TO 1A, 1A/div
9.0V
Typical Operating Characteristics (continued)(Circuit of Figure 1, VIN= 3.3V, VMAIN= 9V, VG_ON= 20V, VG_OFF= -7V, VLOGIC= 2.5V, VGAMMA= 8.6V, TA= +25°C,
unless otherwise noted.)
MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM Buffer
OVERCURRENT PROTECTION RESPONSE
TO OVERLOAD DURING STARTUPMAX1997 toc20
20ms/div
10V
-10V
10V
20V
A: VMAIN, 5V/div
B: VGATE, 5V/div
C: VG_ON, 10V/div
D: VG_OFF, 10V/div
OVERCURRENT PROTECTION RESPONSE
TO OVERLOAD DURING NORMAL OPERATIONMAX1997 toc21
20ms/div
10V
-10V
10V
20V
A: VMAIN, 5V/div
B: VGATE, 5V/div
C: VG_ON, 10V/div
D: VG_OFF, 10V/div
REFERENCE VOLTAGE
vs. LOAD CURRENTMAX1997 toc22
LOAD CURRENT (μA)
REFERENCE VOLTAGE (V)
LX CURRENT LIMIT vs. INPUT VOLTAGE
MAX1997 toc23
INPUT VOLTAGE (V)
CURRENT LIMIT (A)
TA = -40°C
TA = +25°C
TA = +85°C
VCOM BUFFER TRANSCONDUCTANCE
vs. TEMPERATUREMAX1997 toc24
TEMPERATURE (°C)
TRANSCONDUCTANCE (S)6040200-20
LARGE-SIGNAL
TRANSCONDUCTANCE
SMALL-SIGNAL
TRANSCONDUCTANCE
VCOM LOAD TRANSIENT RESPONSE
(CIRCUIT OF PAGE 6, NOTE 4)MAX1997 toc25
4μs/div0
-20V
20V
3.4V
3.6V
A: LOAD CURRENT, 1A/div
B: VOUTB = 3.6V, 200mV/div, AC-COUPLED
C: VX, 20V/div
-1A
3.8V
PIN
MAX1997MAX1998NAMEFUNCTION—TGNDBInternal Connection. Connect this pin to ground. Do not leave this pin floating.1PGNDPower Ground. PGND is the source of the N-channel power MOSFET. Connect PGND to the
star ground at the device’s backside pad.—DRV1
Logic Linear-Regulator (REG 1) Base Drive. Open drain of an internal N-channel MOSFET.
Connect DRV1 to the base of an external PNP linear regulator pass transistor. (See the Pass
Transistor Selection section).
Pin Description
MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM Buffer
PIN
MAX1997MAX1998NAMEFUNCTION—FB1
Logic Linear-Regulator (REG 1) Feedback Input. FB1 regulates at 1.25V nominal. Connect
FB1 to the center tap of a resistive voltage-divider between the REG 1 output and the analog
ground (GND) to set the output voltage. Place the resistive voltage-divider close to the pin.CT
Sequence Timing Control Input. Connect a capacitor from this pin to GND. This timing
capacitor controls the turn-on of REG P, REG N, REG 2, and DRVA. The sequence timing
block is enabled, together with the main step-up regulator, when ONDC goes high. Then an
internal 5µA current source charges the timing capacitor from 0V to VIN, which sets the turn-
on delay. A discharge switch keeps CT at GND when the sequence timing block is disabled.
(See the Power-Up Sequencing and Inrush Current Control section.)ONN
Gate-Off Linear-Regulator (REG N) Sequence Control Input. REG N is enabled when SHDN is
high, the gate to the input P-channel MOSFET is low, ONDC is high, and VCT > V O N N . (See
the Power-Up Sequencing and Inrush Current Control section.)ONP
Gate-On Linear-Regulator (REG P) Sequence Control Input. REG P is enabled when SHDN is
high, the gate to the input P-channel MOSFET is low, ONDC is high, and VCT > V ONP. (See
the Power-Up Sequencing and Inrush Current Control section.)ON2
Gamma Linear-Regulator (REG 2) Sequence Control Input. REG 2 is enabled when SHDN is
high, the gate to the input P-channel MOSFET is low, ONDC is high, and VCT > V O N 2 . ON2
also controls the DRVA open-drain output, which is typically used to turn on an N-channel
MOSFET between the step-up regulator output and the source driver ICs’ supply pins. (See
the Power-Up Sequencing and Inrush Current Control section.)6DRVN
Gate-Off Linear-Regulator (REG N) Base Drive. Open drain of an internal P-channel MOSFET.
Connect DRVN to the base of an external NPN linear regulator pass transistor. (See the Pass
Transistor Selection section.)7FBNate- Off Li near - Reg ul ator ( RE G N ) Feed b ack Inp ut. FBN r eg ul ates to 125m V nom i nal . C onnect
FBN to the center tap of a r esi sti ve vol tag e- d i vi d er b etw een the RE G N outp ut and the r efer ence
vol tag e ( RE F) to set the outp ut vol tag e. P l ace the r esi sti ve vol tag e- d i vi d er cl ose to the p i n.8DRVA
Open-Drain Sequence Output. The DRVA open-drain output is controlled by ON2. DRVA is
typically used to turn on an N-channel MOSFET between the step-up regulator output and the
source-driver ICs’ supply pins. DRVA is high impedance when SHDN is high, the gate to the
input P-channel MOSFET is low, ONDC is high, and VCT > V ON2. Otherwise, DRVA connects
to ground. (See the Power-Up Sequencing and Inrush Current Control section.)9REFInternal Reference Bypass Terminal. Connect a 0.22µF ceramic capacitor from REF to the
analog ground (GND). External load capability is at least 75µA.10GNDAnalog Ground.—FBNBVCOM Buffer Inverting Input. (See the VCOM Buffer section.)—OUTBVCOM Buffer Output. Requires a minimum 0.47µF ceramic filter capacitor to GND. Place the
capacitor as close as possible to OUTB.—VDDBVCOM Buffer Supply Input. Bypass to GND with a 0.47µF capacitor as close as possible to
the pin.—FBPBVCOM Buffer Noninverting Input. (See the VCOM Buffer section.)—FB2
Gamma Linear-Regulator (REG 2) Feedback Input. FBP regulates to 1.25V nominal. Connect
FB2 to the center tap of a resistive voltage-divider between the REG 2 output and the analog
ground (GND) to set the output voltage. Place the divider close to the pin.
Pin Description (continued)
MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM Buffer
PIN
MAX1997MAX1998NAMEFUNCTION—DRV2
Gamma Linear-Regulator (REG 2) Base Drive. Open drain of an internal N-channel MOSFET.
Connect DRV2 to the base of an external PNP linear regulator pass transistor. (See the Pass
Transistor Selection section.)11FB
Main Step-Up Regulator Feedback Input. Connect FB to the center tap of a resistive voltage-
divider between the main output (VMAIN) and the analog ground (GND) to set the main step-
up regulator output voltage. (See the Main Step-Up Regulator, Output Voltage Selection
section.) Place the resistive voltage-divider close to the pin.12FBPate- On Li near - Reg ul ator ( RE G P ) Feed b ack Inp ut. FBP r eg ul ates to 1.25V nom i nal . C onnect
FBP to the center tap of a r esi sti ve vol tag e- d i vi d er b etw een the RE G P outp ut and the anal og r ound ( GN D ) to set the outp ut vol tag e. P l ace the r esi sti ve vol tag e- d i vi d er cl ose to the p i n.13DRVP
Gate-On Linear-Regulator (REG P) Base Drive. Open drain of an internal N-channel MOSFET.
Connect DRVP to the base of an external PNP linear-regulator pass transistor. (See the Pass
Transistor Selection section.)14LXSwitching Node. Drain of the internal N-channel power MOSFET for the main step-up
regulator.15TGNDAInternal Connection. Connect this pin to ground. Do not leave this pin floating.16OCN
Overcurrent Comparator Inverting Input. Connect OCN to the center tap of a resistive
voltage-divider connected to the drain of the external input protection P-channel MOSFET.
(See the Input Overcurrent Protection section.) If unused, connect OCN to REF.17OCP
Overcurrent Comparator Noninverting Input. Connect OCP to the center tap of a resistive
voltage-divider connected to the source of the external input protection P-channel MOSFET.
The voltage on OCP sets the input overcurrent threshold. (See the Input Overcurrent
Protection section.) If unused, connect OCP to GND.18GATEGate-Drive Output to the External Input Protection P-Channel MOSFET. (See the Input
Overcurrent Protection section.) If unused, leave GATE unconnected.—PFLT
Fault Timer Select Input. Pull PFLT above its logic high threshold (0.7 × VIN) to set the fault
delay period to 87ms. Pull PFLT below its logic low threshold (0.3 × VIN) to set the fault delay
period to 22ms. Leave PFLT unconnected to set the fault delay period to 44ms. The fault
delay period for the MAX1998 is fixed at 87ms.19IN
Supply Input. The supply voltage powers all the control circuitry. The input voltage range is
from 2.7V to 5.5V. Bypass IN to GND with a 0.47µF ceramic capacitor. Place the capacitor
within 5mm of IN.—ONDCS tep - U p Reg ul ator Log i c C ontr ol Inp ut. The step - up r eg ul ator , V C O M b uffer , and the seq uence
ti m i ng b l ock ar e enab l ed w hen O N D C i s hi g h and d i sab l ed w hen ON D C i s l ow .20FREQ
Frequency Select Input. Pull FREQ above its logic high threshold (0.7 × VIN) to set the main
step-up regulator switching frequency to 1.5MHz. Pull FREQ below its logic low threshold
(0.3 × VIN) to set the frequency to 375kHz. Leave FREQ unconnected to set the frequency
to 750kHz.—SHDN
Active-Low Shutdown Control Input. All the sections of the device are disabled and the GATE
pin goes high when SHDN is below its 0.4V logic low threshold. Pull SHDN above its 1.6V
logic high threshold to enable the device. Do not leave SHDN unconnected.
Pin Description (continued)
MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM BufferFigure 1. Standard Application Circuit
VIN
2.7V TO 5.5V
3.0μHP1
51.1kΩ
10μF
6.3V
10Ω
VLOGIC
2.5V
1000pFC8
100pF
0.47μF
150kΩ
150kΩ
R88
12.4kΩ
R99
12.4kΩ
R77
510Ω
43.2kΩ
C12
1μF
C13
10μF
C18
0.1μF
ANALOG GROUND
(GND)POWER GROUND
(PGND)
GATEOCNLX
OCP
SHDN
FREQ
DRV1
FB125
VMAINLX
R15
6.8kΩ
R18
6.8kΩ
R11
118kΩ
R12
20kΩ
R10
2.2kΩ
7.68kΩ
1MΩ
1.21kΩ
100kΩ
R16
150kΩ
R17
24.3kΩ
R21
39kΩ
R20
20kΩ
R14
20kΩ
R13
20kΩ
R19
301kΩ
R22
39kΩ
R23
39kΩ
DRVP
FBPD4
DRV2
FB2
VG_OFF
-7V
VG_ON
20V
ONDC30
PFLT28
ON2
ONP
ONN
FBNB
OUTB
FBPB
VDDB16
DRVA11
TGNDA
TGNDB
DRVN
FBN
C27
1000pF
VSOURCE
REF
GND
REFD6
REF
VVCOM
PGND
VGAMMA
8.6V
C17
0.22μF
C16
0.1μF
C20
0.47μF
C26
1μF
C19
0.1μF
C24
0.1μF
C25
0.1μF
C22
0.1μF
C14
2.2μF
C15
1μF
C11
0.47μF
0.01μF
4.7μF
10V
4.7μF
10V
4.7μF
10V
C23
0.1μF
MAX1997
R24
150kΩ
C28
1000pF
MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM BufferFigure 2. System Functional Diagram
UVLO AND GATE
CONTROL
FBN
DRVN
FBP
DRVP
GATE
OCN
OCP
OVERCURRENT
COMPARATOR
PGND
ONDCON2INSHDNONPONN
DRVAOC
REFPFLTFREQ
DRV1
FB1
DRV2
FB2
VG_ON
VLOGIC
VSOURCE
VSOURCE
VMAIN
VMAIN
VIN
VCOM
BUFFER
GND
VDDB
FBPB
FBNB
OUTB
VVCOM
VGAMMA
VG_OFF
MAX1997/MAX1998
MAX1997 ONLYREF, OSC, AND BIAS
SEQUENCE
CONTROL
REG 1
WITH SOFT-START
AND FAULT
COMPARATOR
REG 2
WITH SOFT-START
AND FAULT
COMPARATOR
REG N
WITH SOFT-START
AND FAULT
COMPARATOR
REG P
WITH SOFT-START
AND FAULT
COMPARATOR
MAIN STEP-UP
REGULATOR
WITH SOFT-START
AND FAULT
COMPARATOR
CONTROL
BLOCK
CONTROL INPUTS
N.C.N.C.
MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM Buffer
Standard Application CircuitThe standard application circuit (Figure 1) of the
MAX1997 is a complete power-supply system for TFT
liquid-crystal displays. The circuit generates 9V for source
drivers, +20V and -7V for gate drivers, a 2.5V logic supply
for the timing controller, a 8.6V gamma reference voltage,
and a VCOM buffer. The input voltage range is from 2.7V
to 5.5V. Table 1 lists the selected component options and
Table 2 lists the component suppliers.
Detailed DescriptionThe MAX1997 and MAX1998 contain a high-perfor-
mance step-up switching regulator, two low-cost linear-
regulator controllers, and multiple levels of protection
circuitry. The MAX1997 also includes two additional lin-
ear-regulator controllers and a high-current VCOM
buffer. Figure 2 shows the MAX1997/MAX1998 system
functional diagram. The output voltage of the main
step-up regulator (VMAIN) can be set from VINto 13V
with an external resistive voltage-divider. High switch-
ing frequency (375kHz/750kHz/1.5MHz) and current-
mode control provide fast transient response and allow
the use of low-profile inductors and ceramic capacitors.
The low RDS(ON)internal power MOSFET minimizes the
external component count and achieves high efficiency
using a lossless current-sense architecture.
Two charge pumps take energy from the main step-up
regulator’s switching node (LX) to generate positive and
negative supplies. Additional capacitor and diode stages
can be used to generate supply voltages greater than
+35V and less than -15V. The positive and negative
linear-regulator controllers postregulate the charge-pump
supply voltages and allow users to program the power-up
sequence as well.
The high-current VCOM buffer of the MAX1997 is ideal for
driving the backplane of a TFT LCD panel. It requires only
a 0.47µF ceramic output capacitor for stability. The
MAX1997’s two additional linear-regulator controllers can
be used to build the gamma reference and logic supply.
The unique input switch control of the MAX1997/
MAX1998 senses the current drawn from the input
power supply by monitoring the voltage drop across
the input P-channel MOSFET. The protection MOSFET
and all regulator outputs latch off if an overcurrent
condition lasts for more than the fault timer period.
Table 1. Selected Component List
DESIGNATIONDESCRIPTIONC2, C1310µF, 6.3V X5R ceramic capacitors (1206), TDK C3216X5R0J106M
C4, C5, C64.7µF, 10V X7R ceramic capacitors (1210), Taiyo Yuden LMK352BJ475MF1.0A, 30V Schottky diode (S-flat), Toshiba CRS02
D2, D3, D4200mA, 25V dual-series Schottky diodes (SOT23), Fairchild BAT54S
D5, D6200mA, 75V diode (SOT23), Fairchild MMBD41483.0µH, 1.3A inductor, Sumida CLS5D11HP-3R0NC1.9A, 30V N-channel MOSFET (SuperSOT™-3), Fairchild FDN357P2.4A, 20V P-channel MOSFET (SuperSOT-3), Fairchild FDN304P3A, 25V PNP bipolar transistor (SuperSOT-3), Fairchild FSB749
Q2, Q3200mA, 40V PNP bipolar transistors (SOT23), Fairchild MMBT3906200mA, 40V NPN bipolar transistor (SOT23), Fairchild MMBT3904
SUPPLIERPHONEFAXWEBSITEFairchild408-822-2000408-822-2102www.fairchildsemi.com
Sumida847-545-6700847-545-6720www.sumida.com
Taiyo Yuden800-348-2496847-925-0899www.t-yuden.com
TDK847-803-6100847-390-4405www.component.tdk.com
Toshiba949-455-2000949-859-3963www.toshiba.com
Table 2. Component SuppliersSuperSOT is a trademark of Fairchild Semiconductor.
MAX1997/MAX1998
Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM BufferIn addition, all outputs are monitored for fault conditions
that last longer than the fault timer period. The device
goes into a latched shutdown state, if the junction tem-
perature of the device exceeds +160°C.
Main Step-Up ControllerThe main step-up regulator switches at up to 1.5MHz,
and employs a current-mode control architecture to
maximize loop bandwidth and provide fast transient
response to pulsed loads found in source drivers for
TFT LCD panels. In addition, the high switching fre-
quency allows the use of low-profile inductors and
ceramic capacitors to minimize the thickness of LCD
panel designs. The integrated high-efficiency MOSFET
reduces the number of external components. The IC’s
built-in soft-start function controls the inrush current.
Depending on the input-to-output voltage ratio, the reg-
ulator controls the output voltage and the power deliv-
ered to the output by modulating the duty cycle (D) of
the power MOSFET in each switching cycle.
The duty cycle of the MOSFET is approximated by:
On the rising edge of the internal clock, the controller sets
a flip-flop, which turns on the N-channel MOSFET (Figure
3). The input voltage is applied across the inductor. The
inductor current ramps up linearly, storing energy in a
magnetic field. Once the sum of the feedback voltage,
slope-compensation, and current-feedback signals trip
the multi-input PWM comparator, the MOSFET turns off,
and the flip-flop resets. Since the inductor current is con-
tinuous, a transverse potential develops across the induc-
tor that turns on the diode (D1). The voltage across the
inductor becomes the difference between the output volt-
age and the input voltage. This discharge condition
forces the current through the inductor to ramp back
down, transferring the energy stored in the magnetic field
to the output capacitor and the load. The MOSFET
remains off for the rest of the clock cycle.V-VMAININ
MAIN≈V
Figure 3. Main Step-Up Converter Functional Diagram
TO FAULT
LOGIC
1.0V
REFOUTREFIN
CLK
PGND
SOFT-START
RESET DOMINANT
ILIM COMPARATOR
FROM
OSCILLATOR
CURRENT
SENSE
SLOPE_COMP
VLIMIT
REF
