MAX196ACAI ,Multirange, Single %V, 12-Bit DAS with 12-Bit Bus InterfaceApplicationsMAX196D8 6 23 REFMAX198Industrial-Control SystemsD7 7 22 REFADJRoboticsD6 8 21 CH5Data- ..
MAX196ACAI+ ,6-Channel, Multirange, 5V, 12-Bit DAS with 12-Bit Bus Interface and Fault ProtectionFeatures♦ 12-Bit Resolution, 1/2LSB LinearityThe MAX196/MAX198 multirange, 12-bit data-acquisi-tion ..
MAX196ACAI+ ,6-Channel, Multirange, 5V, 12-Bit DAS with 12-Bit Bus Interface and Fault ProtectionFeatures♦ 12-Bit Resolution, 1/2LSB LinearityThe MAX196/MAX198 multirange, 12-bit data-acquisi-tion ..
MAX196ACNI+ ,6-Channel, Multirange, 5V, 12-Bit DAS with 12-Bit Bus Interface and Fault ProtectionFeatures♦ 12-Bit Resolution, 1/2LSB LinearityThe MAX196/MAX198 multirange, 12-bit data-acquisi-tion ..
MAX196ACNI+ ,6-Channel, Multirange, 5V, 12-Bit DAS with 12-Bit Bus Interface and Fault ProtectionApplicationsMAX196D8 6 23 REFMAX198Industrial-Control SystemsD7 7 22 REFADJRoboticsD6 8 21 CH5Data- ..
MAX196ACWI ,Multirange, Single %V, 12-Bit DAS with 12-Bit Bus InterfaceELECTRICAL CHARACTERISTICS(V = 5V ±5%; unipolar/bipolar range; external reference mode, VREF = 4.09 ..
MAX4928BETN+ ,DisplayPort/PCIe Passive SwitchesELECTRICAL CHARACTERISTICS(V = +3.3V ±10%, T =T to T , unless otherwise noted. Typical values are a ..
MAX4928BETN+T ,DisplayPort/PCIe Passive SwitchesApplicationsMAX4928BETN+ -40°C to +85°F 56 TQFN-EPDesktop PCs+Denotes a lead-free package/RoHS-Comp ..
MAX492CPA ,Single/Dual/Quad, Micropower, Single-Supply Rail-to-Rail Op AmpsELECTRICAL CHARACTERISTICS(V = 2.7V to 6V, V = GND, T = +25°C, unless otherwise noted.)CC EE APARAM ..
MAX492CPA ,Single/Dual/Quad, Micropower, Single-Supply Rail-to-Rail Op AmpsFeatures' Low-Voltage Single-Supply Operation (+2.7V to +6V)The dual MAX492, quad MAX494, and singl ..
MAX492CPA+ ,Single/Dual/Quad, Micropower, Single-Supply, Rail-to-Rail Op Amps Not Recommended for New Designs The MAX495 was manufactured for Maxim by an outside wafer foundr ..
MAX492CSA ,Single/Dual/Quad, Micropower, Single-Supply Rail-to-Rail Op AmpsMAX492/MAX494/MAX49519-0265; Rev 2; 9/96Single/Dual/Quad, Micropower,Single-Supply Rail-to-Rail Op ..
MAX196ACAI-MAX196ACWI-MAX196AEAI-MAX196AENI-MAX196BCAI-MAX196BEWI-MAX198ACNI-MAX198ACWI-MAX198AEAI-MAX198BCWI-MAX198BENI
Multirange, Single %V, 12-Bit DAS with 12-Bit Bus Interface
_______________General DescriptionThe MAX196/MAX198 multirange, 12-bit data-acquisi-
tion systems (DAS) require only a single +5V supply for
operation, yet convert analog signals at their inputs up
to ±10V (MAX196) and ±4V (MAX198). These systems
provide six analog input channels that are indepen-
dently software programmable for a variety of ranges:
±10V, ±5V, 0V to +10V, and 0V to +5V for the MAX196;
±VREF, ±VREF/2, 0V to +VREF, and 0V to +VREF/2 for
the MAX198. This range switching increases the effec-
tive dynamic range to 14 bits and provides the flexibility
to interface ±12V, ±15V, and 4mA to 20mA powered
sensors to a single +5V system. In addition, these con-
verters are fault protected to ±16.5V; a fault condition
on any channel will notaffect the conversion result of
the selected channel. Other features include a 5MHz
bandwidth track/hold, 100ksps throughput rate, soft-
ware-selectable internal/external clock, internal/external
acquisition control, 12-bit parallel interface, and internal
4.096V or external reference.
Two programmable power-down modes (STBYPD,
FULLPD) provide low-current shutdown between con-
versions. In STBYPD mode, the reference buffer
remains active, eliminating start-up delays.
The MAX196/MAX198 employ a standard microproces-
sor (µP) interface. A three-state data I/O port is config-
ured to operate with 16-bit data buses, and data-
access and bus-release timing specifications are com-
patible with most popular µPs. All logic inputs and out-
puts are TTL/CMOS compatible.
These devices are available in 28-pin DIP, wide SO,
SSOP (55% smaller in area than wide SO), and ceramic
SB packages. For 8+4 bus interface, see the MAX197
and the MAX199 data sheets. An evaluation kit will be
available after December 1995 (MAX196EVKIT-DIP).
________________________ApplicationsIndustrial-Control Systems
Robotics
Data-Acquisition Systems
Automatic Testing Systems
Medical Instruments
Telecommunications
____________________________Features12-Bit Resolution, 1/2LSB LinearitySingle +5V Supply OperationSoftware-Selectable Input Ranges:
±10V, ±5V, 0V to +10V, 0V to +5V (MAX196)
±VREF, ±VREF/2, 0V to +VREF, 0V to +VREF/2
(MAX198)Internal 4.096V or External ReferenceFault-Protected Input Multiplexer6 Analog Input Channels6µs Conversion Time, 100ksps Sampling RateInternal or External Acquisition ControlTwo Power-Down ModesInternal or External Clock
MAX196/MAX198
Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface
________________________________________________________________Maxim Integrated Products1
__________________Pin Configuration
Call toll free 1-800-722-8266 for free samples or literature.Functional Diagram appears at end of data sheet.
Ordering Information continued at end of data sheet.
MAX196/MAX198
Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VDD= 5V ±5%; unipolar/bipolar range; external reference mode, VREF= 4.096V; 4.7µF at REF pin; external clock, fCLK= 2.0MHz
with 50% duty cycle; TA= TMINto TMAX; unless otherwise noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto AGND............................................................-0.3V to +7V
AGND to DGND.....................................................-0.3V to +0.3V
REF to AGND..............................................-0.3V to (VDD+ 0.3V)
REFADJ to AGND.......................................-0.3V to (VDD+ 0.3V)
Digital Inputs to DGND...............................-0.3V to (VDD+ 0.3V)
Digital Outputs to DGND............................-0.3V to (VDD+ 0.3V)
CH0–CH5 to AGND..........................................................±16.5V
Continuous Power Dissipation (TA= +70°C)
Narrow Plastic DIP (derate 14.29mW/°C above +70°C)....1143mW
Wide SO (derate 12.50mW/°C above +70°C)..............1000mW
SSOP (derate 9.52mW/°C above +70°C)......................762mW
Narrow Ceramic SB (derate 20.00mW/°C above +70°C)..1600mW
Operating Temperature Ranges
MAX196_C_ I/MAX198_C_ I.................................0°C to +70°C
MAX196_E_ I/MAX198_E_ I...............................-40°C to +85°C
MAX196_MYI/MAX198_MYI.............................-55°C to +125°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10sec).............................+300°C
MAX196/MAX198
Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface
_______________________________________________________________________________________3
ELECTRICAL CHARACTERISTICS (continued)(VDD= 5V ±5%; unipolar/bipolar range; external reference mode, VREF= 4.096V; 4.7µF at REF pin; external clock, fCLK= 2.0MHz
with 50% duty cycle; TA= TMINto TMAX; unless otherwise noted. Typical values are at TA= +25°C.)
MAX196/MAX198
Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)(VDD= 5V ±5%; unipolar/bipolar range; external reference mode, VREF= 4.096V; 4.7µF at REF pin; external clock, fCLK= 2.0MHz
with 50% duty cycle; TA= TMINto TMAX; unless otherwise noted. Typical values are at TA= +25°C.)
MAX196/MAX198
Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface
_______________________________________________________________________________________5
Note 1:Accuracy specifications tested at VDD= 5.0V. Performance at power-supply tolerance limits guaranteed by Power-Supply
Rejection test. Tested for the ±10V (MAX196) and ±4.096V (MAX198) input ranges.
Note 2:External reference: VREF= 4.096V, offset error nulled, ideal last code transition = FS - 3/2LSB.
Note 3:Ground “on” channel; sine wave applied to all “off” channels.
Note 4:Maximum full-power input frequency for 1LSB error with 10ns jitter = 3kHz.
Note 5:Guaranteed by design. Not tested.
Note 6:Use static loads only.
Note 7:Tested using internal reference.
Note 8:PSRR measured at full-scale.
Note 9:External acquisition timing: starts at data valid at ACQMOD = low control byte; ends at rising edge of WRwith ACQMOD
= high control byte.
Note 10:Not subject to production testing. Provided for design guidance only.
Note 11:All input control signals specified with tR= tF= 5ns from a voltage level of 0.8V to 2.4V.
Note 12:tDOis measured with the load circuits of Figure 2 and defined as the time required for an output to cross 0.8V or 2.4V.
Note 13:tTRis defined as the time required for the data lines to change by 0.5V.
TIMING CHARACTERISTICS(VDD= 5V ±5%; unipolar/bipolar range; external reference mode, VREF= 4.096V; 4.7µF at REF pin; external clock, fCLK= 2.0MHz
with 50% duty cycle; TA= TMINto TMAX; unless otherwise noted.)
ELECTRICAL CHARACTERISTICS (continued)(VDD= 5V ±5%; unipolar/bipolar range; external reference mode, VREF= 4.096V; 4.7µF at REF pin; external clock, fCLK= 2.0MHz
with 50% duty cycle; TA= TMINto TMAX; unless otherwise noted. Typical values are at TA= +25°C.)
EFFECTIVE NUMBER OF BITS
vs. INPUT FREQUENCY
MAX196/8-3
INPUT FREQUENCY (kHz)
EFFECTIVE NUMBER OF BITS
MAX196/MAX198
Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface_______________________________________________________________________________________
__________________________________________Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
4.080-55-3545105125TEMPERATURE (°C)
REF
(V)
REFERENCE OUTPUT VOLTAGE (VREF)
vs. TEMPERATURE
MAX196/8-4
MAX196/8-6
-70-5050110130TEMPERATURE (°C)
CHANNEL-TO-CHANNEL
OFFSET-ERROR MATCHING (LSB)
CHANNEL-TO-CHANNEL
OFFSET-ERROR MATCHING vs. TEMPERATURE
MAX196/8-5
-70-5050110130TEMPERATURE (°C)
PSRR (LSB)
POWER-SUPPLY REJECTION RATIO
vs. TEMPERATURE
0.27-70-5050110130TEMPERATURE (°C)
CHANNEL-TO-CHANNEL
GAIN-ERROR MATCHING (LSB)
CHANNEL-TO-CHANNEL
GAIN-ERROR MATCHING vs. TEMPERATURE
MAX196/8-7
MAX196/MAX198
Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface
_______________________________________________________________________________________7
______________________________________________________________Pin DescriptionFigure 1. Reference-Adjust Circuit
Figure 2. Load Circuits for Enable Time
_______________Detailed Description
Converter OperationThe MAX196/MAX198 multirange, fault-tolerant ADCs
use successive approximation and internal input
track/hold (T/H) circuitry to convert an analog signal to
a 12-bit digital output. The 12-bit parallel-output format
provides easy interface to microprocessors (µPs).
Figure 3 shows the MAX196/MAX198 in the simplest
operational configuration.
Analog-Input Track/HoldIn the internal acquisition control mode (control bit D5
set to 0), the T/H enters its tracking mode on WR’s ris-
ing edge, and enters its hold mode when the internally
timed (6 clock cycles) acquisition interval ends. In bipo-
lar mode and unipolar mode (MAX196 only), a low-
impedance input source, which settles in less than
1.5µs, is required to maintain conversion accuracy at
the maximum conversion rate.
When the MAX198 is configured for unipolar mode, the
input does not need to be driven from a low-impedance
source. The acquisition time (tAZ) is a function of the
source output resistance (RS), the channel input resis-
tance (RIN), and the T/H capacitance.
MAX196/MAX198
Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface_______________________________________________________________________________________Acquisition time is calculated as follows:
For 0V to VREF: tAZ= 9 x (RS+ RIN) x 16pF
For 0V to VREF/2: tAZ= 9 x (RS+ RIN) x 32pF
where RIN= 7kΩand tAZis never less than 2µs (0V to
VREFrange) or 3µs (0V to VREF/2 range).
In the external acquisition control mode (D5 = 1), the
T/H enters its tracking mode on the first WRrising edge
and enters its hold mode when it detects the secondrising edge with D5 = 0 (see External Acquisition
section).
Input BandwidthThe ADC’s input tracking circuitry has a 5MHz small-
signal bandwidth. When using the internal acquisition
mode with an external clock frequency of 2MHz, a
100ksps throughput rate can be achieved. It is possible
to digitize high-speed transient events and measure
periodic signals with bandwidths exceeding the ADC’s
sampling rate by using undersampling techniques. To
avoid high-frequency signals being aliased into the fre-
quency band of interest, anti-alias filtering is recom-
mended (MAX274/MAX275 continuous-time filters).
Input Range and ProtectionFigure 4 shows the equivalent input circuit. The full-
scale input voltage depends on the voltage at the refer-
ence (VREF). The MAX196 uses a scaling factor, which
allows input voltage ranges of ±10V, ±5V, 0V to +10V,
or 0V to +5V with a 4.096V voltage reference (Table 1).
Program the desired range by setting the appropriate
control bits (D3, D4) in the control byte (Tables 2 and
3). The MAX198 does not use a scaling factor, so its
input voltage range directly corresponds with the refer-
ence voltage. It can be programmed for input voltages
of ±VREF, ±VREF/2, 0V to VREF, or 0V to VREF/2 (Table
3). When an external reference is applied at REFADJ,
the voltage at REF is given by VREF= 1.6384 x VREFADJ
(2.4V < VREF< 4.18V).
The input channels are overvoltage protected to
±16.5V. This protection is active even if the device is in
power-down mode.
Even with VDD= 0V, the input resistive network provides
current-limiting that adequately protects the device.
Digital InterfaceInput data (control byte) and output data are multi-
plexed on a three-state parallel interface. This parallel
I/O can easily be interfaced with a µP. CS, WR, and RD
control the write and read operations. CSis the stan-
dard chip-select signal, which enables a µP to address
the MAX196/MAX198 as an I/O port. When high, it dis-
ables the WRand RDinputs and forces the interface
into a high-Z state.
