MAX1960EEP+ ,2.35V to 5.5V, 0.5% Accurate, 1MHz PWM Step-Down Controllers with Voltage MarginingFeaturesThe MAX1960/MAX1961/MAX1962 high-current, high- ♦ 0.5% Accurate Outputefficiency voltage-mo ..
MAX1960EEP+ ,2.35V to 5.5V, 0.5% Accurate, 1MHz PWM Step-Down Controllers with Voltage MarginingApplicationsAND ON/OFFCTL2DHCOMPASIC, FPGA, DSP, and CPU Core and I/O Voltages OUTPUT0.8 TO 0.87 ✕ ..
MAX1961EEP ,2.35V to 5.5V, 0.5% Accurate, 1MHz PWM Step-Down Controllers with Voltage MarginingApplicationsAND ON/OFFCTL2DHCOMPASIC, FPGA, DSP, and CPU Core and I/O VoltagesOUTPUT0.8 TO 0.87 ✕ V ..
MAX1962EEP+ ,2.35V to 5.5V, 0.5% Accurate, 1MHz PWM Step-Down Controllers with Voltage Marginingapplications♦ Adaptive Dead Time Prevents Shoot-Throughwith dynamic loads.Lossless current sensing ..
MAX1962EEP+ ,2.35V to 5.5V, 0.5% Accurate, 1MHz PWM Step-Down Controllers with Voltage MarginingELECTRICAL CHARACTERISTICS(V = 3.3V, Circuits of Figures 9–12, T = 0°C to +85°C. Typical values are ..
MAX1962EEP+T ,2.35V to 5.5V, 0.5% Accurate, 1MHz PWM Step-Down Controllers with Voltage Marginingapplications. The operating frequency is♦ Fast Transient Responseprogrammable to either 500kHz or 1 ..
MAX491ECPD+ ,±15kV ESD-Protected, Slew-Rate-Limited, Low-Power, RS-485/RS-422 Transceiversapplications that are not ESD sensitive see the pin-and function-compatible MAX481, MAX483, MAX485, ..
MAX491ECSD ,15kV ESD-Protected / Slew-Rate-Limited / Low-Power / RS-485/RS-422 TransceiversELECTRICAL CHARACTERISTICS(V = 5V ±5%, T = T to T , unless otherwise noted.) (Notes 1, 2)CC A MIN M ..
MAX491ECSD+ ,±15kV ESD-Protected, Slew-Rate-Limited, Low-Power, RS-485/RS-422 TransceiversApplicationsPART TEMP RANGE PIN-PACKAGELow-Power RS-485 TransceiversMAX481ECPA 0°C to +70°C 8 Plast ..
MAX491ECSD+T ,±15kV ESD-Protected, Slew-Rate-Limited, Low-Power, RS-485/RS-422 TransceiversApplications:ate from a single +5V supply.MAX3293/MAX3294/MAX3295: 20Mbps, +3.3V,Drivers are short- ..
MAX491EEPD+ ,±15kV ESD-Protected, Slew-Rate-Limited, Low-Power, RS-485/RS-422 TransceiversApplications:state. The receiver input has a fail-safe feature that guar-MAX3440E–MAX3444E: ±15kV E ..
MAX491EESD ,15kV ESD-Protected / Slew-Rate-Limited / Low-Power / RS-485/RS-422 Transceiversapplications that are not ESD sen-MAX481ECPA 0°C to +70°C 8 Plastic DIPsitive see the pin- and func ..
MAX1960EEP+-MAX1962EEP+-MAX1962EEP+T
2.35V to 5.5V, 0.5% Accurate, 1MHz PWM Step-Down Controllers with Voltage Margining
General DescriptionThe MAX1960/MAX1961/MAX1962 high-current, high-
efficiency voltage-mode step-down DC-DC controllers
operate from a 2.35V to 5.5V input and generate output
voltages down to 0.8V at up to 20A. An on-chip charge
pump generates a regulated 5V for MOSFET drive.
Additionally, adaptive dead-time drivers allow a
wide variety of MOSFETs to be used without risking
shoot-through.
Fixed-frequency PWM operation and external synchro-
nization make these controllers suitable for telecom
and datacom applications. The operating frequency is
programmable to either 500kHz or 1MHz, or from
450kHz to 1.2MHz with an external clock. A clock output
is providedto synchronize another converter for 180°
out-of-phase operation. A high closed-loop bandwidth
provides excellent transient response for applications
with dynamic loads.
Lossless current sensing in the MAX1960 and
MAX1961 is achieved by monitoring the drain-to-source
voltage of the low-side external FET. The current limit is
scalable to accommodate a wide variety of MOSFETs
and load currents. The MAX1962 has 10% accurate
sense-resistor-based current limiting.
The MAX1960 and MAX1962 have an adjustable output
voltage from 0.8V to 4.95V. The MAX1961 and
MAX1962 have four preset output voltages (1.5V, 1.8V,
2.5V, and 3.3V) and feature 0.5% voltage accuracy
over temperature, line, and load variations. The
MAX1960 and MAX1961 also feature voltage-margining
control inputs that shift the output voltage up or down
by 4% for system testing.
ApplicationsASIC, FPGA, DSP, and CPU Core and I/O Voltages
Cellular Base Stations
Telecom and Network Equipment
Server and Storage Systems
Features0.5% Accurate OutputOperates from 2.35V to 5.5V SupplyGenerates Low Output Voltage Down to 0.8VOn-Chip Charge Pump Provides 5V Gate DriveCeramic or Electrolytic Capacitors94% EfficiencyExternal Synchronization from 450kHz to 1.2MHz500kHz/1MHz Fixed-Frequency PWM Operation Fast Transient ResponseTwo Converters Can Operate 180°Out-of-Phase±4% Voltage Margining for System Test10% Accurate Current Sensing (MAX1962)Adaptive Dead Time Prevents Shoot-Through
MAX1960/MAX1961/MAX1962
2.35V to 5.5V, 0.5% Accurate, 1MHz PWM
Step-Down Controllers with Voltage Margining
Ordering Information19-2740; Rev 1; 6/09
EVALUATION KIT
AVAILABLE
PARTTEMP RANGEPIN-PACKAGE
MAX1960EEP-40°C to +85°C20 QSOP
MAX1961EEP-40°C to +85°C20 QSOP
MAX1962EEP-40°C to +85°C20 QSOP
Pin Configurations and Selector Guide appear at the end
of the data sheet.MAX1960
VCC
CTL1
COMP
REF
GND
FSET/SYNC
CLKOUT
AVDD
VDD
BST
PGNDC-INPUT
2.35V TO 5.5V
CLKOUT
180° OUT-OF-PHASE
OUTPUT
0.8 TO 0.87 ✕ VIN
UP TO 20A
CTL2
ILIM
OPTIONAL
SYNCHRONIZATION
VOLTAGE
MARGINING
AND ON/OFF
Typical Operating Circuit
MAX1960/MAX1961/MAX1962
2.35V to 5.5V, 0.5% Accurate, 1MHz PWM
Step-Down Controllers with Voltage Margining
ABSOLUTE MAXIMUM RATINGSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCC, CTL_, CS, FSET/SYNC, SEL, EN,
OUT to GND..........................................................-0.3V to +6V
ILIM, COMP, REF, FB, CLKOUT,
C- to GND..............................................-0.3V to VAVDD+ 0.3V
C+ to GND.............-0.3V to higher of VVCC+ 1V or VVDD+ 0.3V
VDD, AVDDto GND..............-0.3V to higher of VVCC- 0.3V or 6V
DL to PGND................................................-0.3V to VVDD+ 0.3V
BST to GND............................................................-0.3V to +12V
DH to LX...................................................................-0.3V to +6V
LX to BST..................................................................-6V to +0.3V
PGND to GND, or VDDto AVDD............................-0.3V to +0.3V
Continuous Power Dissipation (TA= +70°C)
20-Pin QSOP (derate up to +70°C)..............................727mW
20-Pin QSOP (derate above +70°C)........................9.1mW/°C
Operating Temperature Range (Extended).........-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
ELECTRICAL CHARACTERISTICS(VVCC= 3.3V, Circuits of Figures 9–12, TA
= 0°C to +85°C. Typical values are at TA= +25°C, unless otherwise noted.)
PARAMETERCONDITIONSMINTYPMAXUNITSVCC Input Voltage Range2.355.5V
VCC Input Voltage UVLORising or falling, hysteresis = 33mV (typ)1.952.3V
VDD Input Voltage UVLORising or falling, hysteresis = 44mV (typ)3.94.45V
Output Voltage0.8V
MAX1960/MAX1962 (measured at FB)0.7960.8000.804
SEL = GND1.4921.5001.508
SEL = REF1.7911.8001.809
SEL not connected2.4872.5002.514
DC Output AccuracyMAX1961/
MAX1962 (FB = VDD),
measured at output
SEL = VDD3.2723.3003.336
Positive Voltage-Margining ShiftMAX1960/MAX1961+3.8+4+4.2%
Negative Voltage-Margining ShiftMAX1960/MAX1961-3.8-4-4.2%
Load Regulation Error0V to full load0.08%
Line Regulation ErrorVVCC = 2.7V to 5.5V0.1%
FB Input Bias Current-0.2+0.2μA
Feedback Transconductance123mS
COMP Discharge ResistanceIn shutdown10100Ω
DC-DC Soft-Start Time1280cycles
FSET/SYNC = GND450500550Switching FrequencyFSET/SYNC = VCC88010001120kHz
SYNC Frequency Range4501200kHz
Maximum Duty Cyclef = 1MHz8083%
Maximum Duty Cyclef = 500kHz9092%
Quiescent Supply Current1115mA
Shutdown Supply Current15μA
MAX1960/MAX1961/MAX1962
2.35V to 5.5V, 0.5% Accurate, 1MHz PWM
Step-Down Controllers with Voltage Margining
ELECTRICAL CHARACTERISTICS (continued)(VVCC= 3.3V, Circuits of Figures 9–12, TA
= 0°C to +85°C. Typical values are at TA= +25°C, unless otherwise noted.)
PARAMETERCONDITIONSMINTYPMAXUNITS2.7V ≤ VVCC ≤ 5.5V, ILOAD = 1mA to 50mA4.755.25V
2.35V ≤ VVCC ≤ 2.7V, ILOAD = 1mA to 35mA, C1
= 4.7μF, C6 = 22μF (Note 1)4.455.25VVDD Output Voltage
2.35V ≤ VVCC ≤ 3.6V with tripler, ILOAD = 1 to
50mA (circuit of Figure 12) (Note 1)4.755.25V
Reference Voltage (No Load)1.2691.2801.291V
Reference Load Regulation-50μA to +50μA3mV
VOUT = 0.8V445362
VOUT = 2.0V455055Positive Current-Limit Threshold
(VPGND - VLX)MAX1962
VOUT = 3.3V384858
Negative Current-Limit Threshold
(VLX - VPGND)MAX1962, VOUT = 0.8V to 3.3V385068mV
CS Bias CurrentMAX1962, VCS = 3.3V2050μA
OUT Bias CurrentMAX1961/MAX1962, VOUT = 3.3V3050μA
Current-Limit Threshold (Positive
Direction, Fixed, VPGND - VLX)MAX1960/MAX1961, ILIM = VDD587490mV
Current-Limit Threshold (Negative
Direction, Fixed, VLX - VPGND)MAX1960/MAX1961, ILIM = VDD506785mV
MAX1960/MAX1961, RILIM = 160kΩ100114135Current-Limit Threshold (Positive
Direction, Adjustable, VPGND - VLX)RILIM = 400kΩ250279306mV
MAX1960/MAX1961, RILIM = 160kΩ90107125Current-Limit Threshold (Negative
Direction, Adjustable, VLX - VPGND)RILIM = 400kΩ245271296mV
Thermal-Shutdown Threshold15°C hysteresis+160°C
DH Gate-Driver On-ResistanceVBST - VLX = 5V, pulling up or down1.83.5Ω
DL Gate-Driver On-Resistance (Pullup)DL high state1.83.5Ω
DL Gate-Driver On-Resistance (Pulldown)DL low state0.51.6Ω
DH falling to DL rising35Minimum Adaptive Dead TimeDH rising to DL falling26ns
Minimum high time (Note 1)200FSET/SYNC Pulse WidthMinimum low time (Note 1)200ns
FSET/SYNC Rise/Fall Time(Note 1)100ns
CTL_, FSET/SYNC, EN Input High VoltageVVCC = 2.35V to 5.5V2.0V
CTL_, FSET/SYNC, EN Input Low VoltageVVCC = 2.35V to 5.5V0.8V
CTL_, FSET/SYNC, EN Input Current-1+1μA
CLKOUT VOLSinking 1mA0.010.1V
CLKOUT VOHSourcing 1mAVVCC -
0.2V
VVCC -
0.01VV
CLKOUT Rise/Fall TimeCLOAD = 100pF (Note 1)40ns
MAX1960/MAX1961/MAX1962
2.35V to 5.5V, 0.5% Accurate, 1MHz PWM
Step-Down Controllers with Voltage Margining
ELECTRICAL CHARACTERISTICS(VVCC= 3.3V, Circuits of Figures 9–12, TA
= -40°C to +85°C, unless otherwise noted.) (Note 2)
PARAMETERCONDITIONSMINTYPMAXUNITSVCC Input Voltage Range2.355.50V
VCC Input Voltage UVLORising or falling1.952.3V
VDD Input Voltage UVLORising or falling3.904.45V
Output Voltage0.8V
MAX1960/MAX1962 (measured at FB)0.7950.805
SEL = GND1.4921.508
SEL = REF1.7891.809
SEL not connected2.4822.517
DC Output AccuracyMAX1961/MAX1962
(FB = VDD),
measured at output
SEL = VDD3.2723.339
Positive Voltage-Margining ShiftMAX1960/MAX19613.84.2%
Negative Voltage-Margining ShiftMAX1960/MAX1961-3.8-4.2%
FB Input Bias Current-0.2+0.2µA
Feedback Transconductance13mS
COMP Discharge ResistanceIn shutdown100Ω
FSET/SYNC = GND450550Switching FrequencyFSET/SYNC = VCC8801120kHz
SYNC Frequency Range4501200kHz
Maximum Duty Cyclef = 1MHz80%
Maximum Duty Cyclef = 500kHz90%
Quiescent Supply Current15mA
Shutdown Supply Current15µA
2.7V ≤ VVCC ≤ 5.5V, ILOAD = 1mA to 50mA4.755.25
2.35V ≤ VVCC ≤ 2.7V, ILOAD = 1mA to 35mA,
C1 = 4.7µF, C6 = 22µF4.455.25VDD Output Voltage
2.35V ≤ VVCC ≤ 3.6V with tripler, ILOAD = 1mA
to 50mA (circuit of Figure 12)4.755.25
Reference Voltage (No Load)1.2671.291V
Positive Current-Limit Threshold
(VCS - VOUT)MAX1962, VOUT = 2V4556mV
Negative Current-Limit Threshold
(VOUT - VCS)MAX1962, VOUT = 2V4264mV
CS Bias CurrentMAX1962, VCS = 3.3V50µA
OUT Bias CurrentMAX1961/MAX1962, VOUT = 3.3V50µA
Current-Limit Threshold (Positive
Direction, Fixed, VPGND - VLX)MAX1960/MAX1961, ILIM = VDD5890mV
Current-Limit Threshold (Negative
Direction, Fixed, VLX - VPGND)MAX1960/MAX1961, ILIM = VDD5085mV
MAX1960/MAX1961, RILIM = 160kΩ100135Current-Limit Threshold (Positive
Direction, Adjustable, VPGND - VLX)RILIM = 400kΩ250306mV
MAX1960/MAX1961/MAX1962
2.35V to 5.5V, 0.5% Accurate, 1MHz PWM
Step-Down Controllers with Voltage Margining
ELECTRICAL CHARACTERISTICS (continued)(VVCC= 3.3V, Circuits of Figures 9–12, TA
= -40°C to +85°C, unless otherwise noted.) (Note 2)
PARAMETERCONDITIONSMINTYPMAXUNITSMAX1960/MAX1961, RILIM = 160kΩ90125Current-Limit Threshold (Negative
Direction, Adjustable, VLX - VPGND)RILIM = 400kΩ245296mV
DH Gate-Driver On-ResistanceVBST - VLX = 5V, pulling up or down3.5Ω
DL Gate-Driver On-Resistance (Pullup)DL high state3.5Ω
DL Gate-Driver On-Resistance (Pulldown)DL low state1.6Ω
Minimum high time200FSET/SYNC Pulse WidthMinimum low time200ns
FSET/SYNC Rise/Fall Time100ns
CTL_, FSET/SYNC, EN Input High VoltageVVCC = 2.35V to 5.5V2.0V
CTL_, FSET/SYNC, EN Input Low VoltageVVCC = 2.35V to 5.5V0.8V
CTL_, FSET/SYNC, EN Input Current-1+1µA
CLKOUT VOLSinking 1mA0.1V
CLKOUT VOHSourcing 1mAVVCC -
0.2VV
CLKOUT Rise/Fall TimeCLOAD = 100pF40ns
Note 1:Guaranteed by design.
Note 2:Specifications at -40°C are guaranteed by design, and not production tested.
MAX1960/MAX1961/MAX1962
2.35V to 5.5V, 0.5% Accurate, 1MHz PWM
Step-Down Controllers with Voltage Margining
Typical Operating Characteristics(Circuit of Figure 9, TA = +25°C, unless otherwise noted.)
EFFICIENCY vs. LOAD CURRENT WITH
15A 1MHz CIRCUIT, 3.3V INPUTMAX1960 toc01
LOAD CURRENT (A)
EFFICIENCY (%)1
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.5V
EFFICIENCY vs. LOAD CURRENT WITH
15A 1MHz CIRCUIT, 5V INPUTMAX1960 toc02
LOAD CURRENT (A)
EFFICIENCY (%)1
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.5V
VOUT = 1.8V
EFFICIENCY vs. LOAD CURRENT WITH
15A 500kHz CIRCUIT, 3.3V INPUTMAX1960 toc03
LOAD CURRENT (A)
EFFICIENCY (%)1
VOUT = 2.5V
VOUT = 1.5V
VOUT = 1.8V
EFFICIENCY vs. LOAD CURRENT WITH
15A 500kHz CIRCUIT, 5V INPUTMAX1960 toc04
LOAD CURRENT (A)
EFFICIENCY (%)1
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.5V
VOUT = 1.8V
OUTPUT VOLTAGE
vs. INPUT VOLTAGE, 1MHzMAX1960 toc05
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
3.3V OUTPUT
2.5V OUTPUT
1.8V OUTPUT
1.5V OUTPUT
1.2V OUTPUT
15A LOAD
DROPOUT
OUTPUT VOLTAGE
vs. INPUT VOLTAGE, 500kHzMAX1960 toc06
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
3.3V OUTPUT
2.5V OUTPUT
1.8V OUTPUT
1.5V OUTPUT
1.2V OUTPUT
15A LOAD
DROPOUT
FB REGULATION VOLTAGE
vs. LOAD CURRENTMAX1960 toc07
LOAD CURRENT (A)
FB VOLTAGE (V)105
FREQUENCY
vs. INPUT VOLTAGE
MAX1960 toc08
INPUT VOLTAGE (V)
FREQUENCY (kHz)
FSET/SYNC = VCC
FSET/SYNC = GND
MAX1960/MAX1961/MAX1962
2.35V to 5.5V, 0.5% Accurate, 1MHz PWM
Step-Down Controllers with Voltage Margining
FREQUENCY vs. TEMPERATUREMAX1960 toc09
TEMPERATURE (°C)
FREQUENCY (kHz)3510-15
FSET/SYNC = VCC
FSET/SYNC = GND
CHARGE-PUMP OUTPUT VOLTAGE
vs. CHARGE-PUMP LOAD CURRENT, 1MHzMAX1960 toc10
CHARGE-PUMP LOAD CURRENT (mA)
CHARGE-PUMP OUTPUT VOLTAGE (V)
VIN = 3.3V
VIN = 2.5V
C1 = 0.47μF
C6 = 2.2μF
CHARGE-PUMP OUTPUT VOLTAGE
vs. CHARGE-PUMP LOAD CURRENT, 500kHzMAX1960 toc11
CHARGE-PUMP LOAD CURRENT (mA)
CHARGE-PUMP OUTPUT VOLTAGE (V)
VIN = 3.3VVIN = 2.5V
C1 = 1μF
C6 = 4.7μF
TRIPLER CHARGE-PUMP OUTPUT VOLTAGE
vs. CHARGE-PUMP LOAD CURRENT, 1MHzMAX1960 toc12
CHARGE-PUMP LOAD CURRENT (mA)
CHARGE-PUMP OUTPUT VOLTAGE (V)2010
VIN = 2.5V
CIRCUIT OF FIGURE 12
C10, C11, C12 = 0.47μF
C6 = 2.2μF
TRIPLER CHARGE-PUMP OUTPUT VOLTAGE
vs. CHARGE-PUMP LOAD CURRENT, 500kHzMAX1960 toc13
CHARGE-PUMP LOAD CURRENT (mA)
CHARGE-PUMP OUTPUT VOLTAGE (V)2010
VIN = 2.5V
C10, C11, C12 = 1μF
C6 = 4.7μF
CIRCUIT OF FIGURE 12
MAX1960/MAX1961
CURRENT-LIMIT THRESHOLD
VOLTAGE vs. TEMPERATUREMAX1960 toc14
CURRENT-LIMIT THRESHOLD VOLTAGE (mV)3510-15
RILIM = 390kΩ
ILIM = VDD
MAX1962
CURRENT-LIMIT THRESHOLD
VOLTAGE vs. TEMPERATUREMAX1960 toc15
CURRENT-LIMIT THRESHOLD VOLTAGE (mV)3510-15
Typical Operating Characteristics (continued)
(Circuit of Figure 9, TA = +25°C, unless otherwise noted.)
MAX1960/MAX1961/MAX1962
2.35V to 5.5V, 0.5% Accurate, 1MHz PWM
Step-Down Controllers with Voltage Margining
7.5A TO 15A TO 7.5A LOAD TRANSIENTMAX1960 toc16
20μs/div
VOUT50mV/div
5A/divILOAD
VOLTAGE-MARGINING STEP RESPONSEMAX1960 toc17
50μs/div
CTL2
IIN
CTL15V/div
5V/div
200mA/div
200mV/divVOUT
CIRCUIT OF FIGURE 13
STARTUP/SHUTDOWN WAVEFORMSMAX1960 toc18
1ms/div
IIN10A/div
10A/div
1V/divVOUT
MAX1960/MAX1961
SHORT-CIRCUIT WAVEFORMSMAX1960 toc19
50μs/div
IIN
2V/div
20A/div
5A/div
VOUTCIRCUIT OF FIGURE 13
MAX1962
SHORT-CIRCUIT WAVEFORMSMAX1960 toc20
50μs/div
IIN10A/div
10A/div
2V/divVOUT
VIN = 5V
VOUT = 3.3V
SYNC TIMING WAVEFORMSMAX1960 toc21
200ns/div
MASTER
MASTER
SLAVE
SLAVE
CLKOUT
MASTER/
SYNC
SLAVE
Typical Operating Characteristics (continued)(Circuit of Figure 9, TA = +25°C, unless otherwise noted.)
MAX1960/MAX1961/MAX1962
2.35V to 5.5V, 0.5% Accurate, 1MHz PWM
Step-Down Controllers with Voltage Margining
Pin Description
PIN
MAX1960MAX1961MAX1962
NAMEFUNCTION11CLKOUT
Clock Output. Connect to FSET/SYNC of a second converter to operate 180° out-of-
phase. CLKOUT swings from VCC to GND. CLKOUT is low in shutdown (see the
Operating Frequency and Synchronization section).22FSET/SYNC
Frequency Set and Synchronization. Connect to GND for 500kHz operation,
connect to VCC for 1MHz operation, or drive with clock signal to synchronize
(between 450kHz and 1200kHz).3—ILIMCurrent Limit. Connect a resistor from ILIM to GND to set the current-sense
threshold voltage. Connect ILIM to VDD to select the default threshold of 75mV.3ENE nab l e. D r i ve hi g h for nor m al op er ati on. D r i ve l ow or connect to GN D for shutd ow n m od e.44SEL
Preset Output Voltage Select. Allows the output to be set to one of four preset
voltages (1.5V, 1.8V, 2.5V, and 3.3V). For the MAX1962, FB must be connected to
VDD if SEL is to be used (see the Setting the Output Voltage section).——N.C.No Connection. Not internally connected.85OUTOutput. Connect to the output. Used to sense the output voltage for internal
feedback and current sense.5—CTL16—CTL2
Control Pins. Controls voltage margining and shutdown. Connect both CTL1 and
CTL2 high for normal operation. Connect both CTL1 and CTL2 low for shutdown.
Connect CTL1 high and CTL2 low for +4% voltage margining. Connect CTL1 low
and CTL2 high for -4% voltage margining. If voltage margining is not to be used,
connect CTL1 and CTL2 together and use to enable/shutdown the device.6CSC ur r ent- S ense Inp ut. C onnect to the j uncti on of the cur r ent- sense r esi stor and thend uctor . The M AX 1962 cur r ent- sense thr eshol d i s 50m V m easur ed fr om C S to O U T.
777AVDDFiltered Supply from VDD. Connect a 1µF bypass capacitor. AVDD is forced to VCC
in shutdown. Do not apply an external load to AVDD.8FB
Feed b ack Inp ut. The feed b ack thr eshol d i s 0.8V . C onnect to the center of a r esi sti ve
vol tag e- d i vi d er fr om the outp ut to GN D to set the outp ut vol tag e to 0.8V or g r eater . On
the M AX 1962, connect FB to V DD to sel ect p r eset outp ut vol tag es ( see S E L) .99COMPCompensation Pin. COMP is forced to GND in shutdown, UVLO, or thermal fault.1010REFReference Output. VREF = 1.28V. Bypass with a 0.22µF capacitor to GND.1111GNDAnalog Ground. Connect to the PC board analog ground plane. Connect the PC
board analog ground plane and power ground planes with a single connection.1212VDDhar g e- P um p O utp ut. P r ovi d es r eg ul ated 5V to p ow er the IC and g ate d r i ver s.
Byp ass w i th a 4.7µF cer am i c cap aci tor for op er ati ng fr eq uenci es b etw een 450kH z
and 950kH z. Byp ass w i th a 2.2µF cer am i c cap aci tor for 1M H z op er ati on. V DD i snter nal l y for ced to V CC i n shutd ow n. D o not ap p l y an exter nal l oad to V DD.1313DLLow-Side MOSFET Synchronous Rectifier Gate-Driver Output. DL is high in
shutdown.1414PGNDPower Ground. Connect to the PC board power ground plane.
MAX1960/MAX1961/MAX1962
Detailed DescriptionThe MAX1960/MAX1961/MAX1962 are high-current,
high-efficiency voltage-mode step-down DC-DC con-
trollers that operate from 2.35V to 5.5V input and gener-
ate adjustable voltages down to 0.8V at up to 20A. An
on-chip charge pump generates a regulated 5V for dri-
ving a variety of external N-channel MOSFETs.
Constant frequency PWM operation and external syn-
chronization make these controllers suitable for telecom
and datacom applications. The operating frequency is
programmed externally to either 500kHz or 1MHz, or
from 450kHz to 1.2MHz with an external clock. A clock
output is provided to synchronize another converter for
180°out-of-phase operation.
A high closed-loop bandwidth provides excellent tran-
sient response for applications with dynamic loads.
Internal Charge PumpAn on-chip regulated charge pump develops 5V at
50mA (max) with input voltages as low as 2.35V. The
output of this charge pump provides power for the
internal circuitry, bias for the low-side driver (DL), and
the bias for the boost diode, which supplies the high-
side MOSFET gate driver (DH). The charge pump is
synchronized with the DL driver signal and operates at
1/2 the PWM frequency.
The external MOSFET gate charge is the dominant load
for the charge pump and is proportional to the PWM
switching frequency. The charge pump must supply
chip-operating current plus adequate gate current for
both MOSFETs at the selected operating frequency.
The required charge-pump output current is given by
the formula:
ITOTAL= IAVDD+ fOSC(QG1+ QG2)
where IAVDDis the current supplied to the IC through
AVDD(typically 2mA), fOSCis the PWM switching
frequency, QG1is the gate charge of the high-side
MOSFET, and QG2is the gate charge of the low-side
MOSFET. The MOSFETs must be chosen such that
ITOTALdoes not exceed 50mA. For example, with 1MHz
operation, QG1+ QG2should be less than 48nC.
Voltage Margining and ShutdownThe voltage-margining feature on the MAX1960/
MAX1961 shifts the output voltage up or down by 4%.
This is useful for the automatic testing of systems at high
and low supply conditions to find potential hardware fail-
ures. CTL1 and CTL2 control voltage margining as out-
lined in Table 1.
A shutdown feature is included on all three parts, which
stops switching the output drivers and the charge
pump, reducing the supply current to less than 15µA.
For the MAX1962, drive EN high for normal operation,
or low for shutdown. For the MAX1960/MAX1961, drive
both CTL1 and CTL2 high for normal operation, or drive
CTL1 and CTL2 low for shutdown. For a simple
enable/shutdown function with no voltage margining,
connect CTL1 and CTL2 together and drive as one
input.
2.35V to 5.5V, 0.5% Accurate, 1MHz PWM
Step-Down Controllers with Voltage Margining
Pin Description (continued)
PIN
MAX1960MAX1961MAX1962
NAMEFUNCTION1515C-Charge-Pump Flying Capacitor Negative Connection. Use a 0.47µF ceramic
capacitor at 1MHz, and 1µF between 450kHz and 950kHz.1616C+Charge-Pump Flying Capacitor Positive Connection. Use a 0.47µF ceramic
capacitor at 1MHz and 1µF between 450kHz and 950kHz.1717VCCInput Supply to Charge Pump1818BSTBoost Capacitor Connection. Connect a 0.1µF ceramic capacitor from BST to LX.1919DHHigh-Side MOSFET Gate-Driver Output. DH is low in shutdown.2020LXInductor Connection
CTL1CTL2FUNCTIONHighHighNormal operation
HighLow+4% output-voltage shift
LowHigh-4% output-voltage shift
LowLowShutdown
Table 1. Voltage Margining Truth Table
MOSFET Gate DriversThe DH and DL drivers are designed to drive logic-level
N-channel MOSFETs to optimize system cost and effi-
ciency. MOSFETs with RDSONrated at VGS4.5V are
recommended. An adaptive dead-time circuit monitors
the DL output and prevents the high-side MOSFET from
turning on until DL is fully off. There must be a low-resis-
tance, low-inductance path from the DL driver to the
MOSFET gate for the adaptive dead-time circuit to work
properly. Otherwise, the internal sense circuitry could
interpret the MOSFET gate as “off” while there is actually
still charge left on the gate. Use very short, wide traces
measuring no more than 20 squares (50mils to 100mils
wide if the MOSFET is 1in from the IC).
Undervoltage Lockout and Soft-StartThere are two undervoltage lockout (UVLO) circuits on
the MAX1960/MAX1961/MAX1962. The first UVLO cir-
cuit monitors VCC, which must be above 2.15V (typ) in
order for the charge pump to operate. The second
UVLO circuit monitors the output of the charge pump.
The charge-pump output, VDD, must be above 4.2V
(typ) in order for the PWM converter to operate. Both
UVLO circuits inhibit switching and force DL high and DH
low when either VCCor VDDare below their threshold.
When the monitored voltages are above their thresh-
olds, an internal soft-start timer ramps up the error-
amplifier reference voltage. The ramp occurs in eighty
10mV steps. Full output voltage is reached 1.28ms after
activation with a 1MHz operating frequency.
MAX1960/MAX1961/MAX1962
2.35V to 5.5V, 0.5% Accurate, 1MHz PWM
Step-Down Controllers with Voltage MarginingCURRENT
SENSE
OSC
UVLO
SOFT-START
DAC
CHARGE
PUMPOSC
VDD
REF
ILIM
(MAX1960/MAX1961)
FSET/SYNC
CLKOUT
COMP
(MAX1960/MAX1962)
OUT
(MAX1961/MAX1962)
FEEDBACK
SELECT
VSEL
(MAX1961/MAX1962)
VDD
VCC
REF
AVDD
PGND
GND
BST
SHUTDOWN
AND VOLTAGE
MARGINING
CTL1
(MAX1960/MAX1961)
CTL2
(MAX1960/MAX1961)
(MAX1962)
PGND
(MAX1962)
OSC
OUT
MAX1960/
MAX1961/
MAX1962
COMP
ERROR
AMP
Figure 1. Functional Diagram
MAX1960/MAX1961/MAX1962
Operating Frequency and SynchronizationThe MAX1960/MAX1961/MAX1962 operating frequency
is set externally to either 500kHz or 1MHz. For 500kHz
operation, connect FSET/SYNC to GND, or for 1MHz
operation, connect FSET/SYNC to VDD. Alternately, an
external clock from 450kHz to 1.2MHz can be applied
to SYNC.
A clock output (CLKOUT) that is 180°out-of-phase with
the internal clock is also provided. This allows a second
converter to be synchronized, and operate 180°out-of-
phase with the first. To do this, simply connect CLKOUT
of the first converter to FSET/SYNC of the second con-
verter. The first converter can be set internally to 500kHz
or 1MHz for this mode of operation. When the first con-
verter is synchronized to an external clock, CLKOUT is
the inverse of external clock. See the SYNC Timing
Waveform in the Typical Operating Characteristics.
Lossless Current Limit
(MAX1960/MAX1961)To prevent damage in the case of excessive load cur-
rent or a short circuit, the MAX1960/MAX1961 use the
low-side MOSFET’s on-resistance (RDS(ON)) for current
sensing. The current is monitored during the on-time of
the low-side MOSFET. If the current-sense voltage
(VPGND- VLX) rises above the current-limit threshold for
more than 128 clock cycles, the controller turns off. The
controller remains off until the input voltage is removed
or the device is re-enabled with CTL1 and CTL2 (see
the Setting the Current Limitsection).
Current-Sense Resistor (MAX1962)The MAX1962 uses a standard current-sense resistor in
series with the inductor for a 10% accurate current-limit
measurement. The current-sense threshold is 50mV. This
provides accurate current sensing at all duty cycles with-
out relying on MOSFET on-resistance. CS connects to
the high-side (inductor side) of the current-sense resistor
and OUT connects to the low-side (output side) of the
current-sense resistor.
The current-sense resistor for the MAX1962 may also be
replaced with a series RC network across the inductor.
This method uses the parasitic resistance of the inductor
for current sensing. This method is less accurate than
using a current-sense resistor, but is lower cost and pro-
vides slightly higher efficiency. See the Design
Proceduresection for instructions on using this method.
Dropout PerformanceThe MAX1960/MAX1961/MAX1962 enter dropout when
the input voltage is not sufficiently high to maintain output
regulation. As input voltage is lowered, the duty cycle
increases until it reaches its maximum value, where the
part enters dropout. With a switching frequency of
1MHz, the maximum duty cycle is about 83%. At
500kHz, the duty cycle can increase to about 92%,
resulting in a lower dropout voltage. The duty cycle is
dependent on the input voltage (VIN), the output volt-
age (VOUT), and the parasitic voltage drops in the
MOSFETs and the inductor (VDROP(N1), VDROP(N2),
VDROP(L)). Note that VDROP(L)includes the voltage
drop due to the inductor’s resistance, the drop across
the current-sense resistor (if used), and any other resis-
tive voltage drop from the LX switching node to the
point where the output voltage is sensed. The duty
cycle is found from:
Adaptive Dead TimeThe MAX1960/MAX1961/MAX1962 DL and DH MOSFET
drivers have an adaptive dead-time circuit to prevent
shoot-through current caused by high- and low-side
MOSFET overlap. This allows a wide variety of MOSFETs
to be used without matching FET dynamic characteris-
tics. The DL driver will not go high until DH drives the
high-side MOSFET gate to within 1V of its source (LX).
The DH output will not go high until DL drives the low-side
MOSFET gate to within 1V of ground.
Design ProcedureComponent selection is primarily dictated by the following
criteria:
Input voltage range. The maximum value
(VIN(MAX)) must accommodate the worst-case high
input voltage. The minimum value (VIN(MIN)) must
account for the lowest input voltage after drops due
to connectors, fuses, and selector switches are con-
sidered.
Maximum load current. There are two values to con-sider: The peak load current(ILOAD(MAX)) determines
the instantaneous component stresses and filtering
requirements and is key in determining output capac-
itor requirements. ILOAD(MAX)also determines the
inductor saturation rating and the design of the cur-
rent-limit circuit. The continuous load current(ILOAD)
determines the thermal stresses and is key in deter-
mining input capacitor requirements, MOSFET
requirements, as well as those of other critical heat-
contributing components.VVV
OUTDROPLDROPNDROPN=+()()--12
2.35V to 5.5V, 0.5% Accurate, 1MHz PWM
Step-Down Controllers with Voltage Margining
Inductor operating point. This choice provides
tradeoffs between size, transient response, and effi-
ciency. Choosing higher inductance values results
in lower inductor ripple current, lower peak current,
lower switching losses, and, therefore, higher effi-
ciency at the cost of slower transient response and
larger size. Choosing lower inductance values
results in large ripple currents, smaller size, and
poorer efficiency, but have faster transient response.
Setting the Output VoltageThe MAX1961 has four output voltage presets selected
by SEL. Table 2 shows how each of the preset voltages
are selected. The MAX1962 also has four preset output
voltages, but also is adjustable down to 0.8V. To use the
preset voltages on the MAX1962, FB must be connected
to VDD. SEL then selects the output voltage as shown in
Table 2.
Both the MAX1960/MAX1962 feature an adjustable out-
put that can be set down to 0.8V. To set voltages greater
than 0.8V, Connect FB to a resistor-divider from the out-
put (Figures 9 and 11). Use a resistor up to 10kΩfor R2
and select R1 according to the following equation:
where the feedback threshold, VFB= 0.8V, and VOUTis
the output voltage.
Input Voltage RangeThe MAX1960/MAX1961/MAX1962 have an input volt-
age range of 2.35V to 5.5V but cannot operate at both
extremes with one application circuit. The standard
charge-pump doubler application circuit operates with
an input range of 2.7V to 5.5V (Figures 9, 10, and 11).
In order to operate down to 2.35V, the charge pump
must be configured as a tripler. This circuit, however,
limits the maximum input voltage to 3.6V. The schematic
for the tripler charge pump is shown in Figure2. Note
that the flying capacitor between C+ and C- has been
removed and C+ is not connected.
Inductor SelectionDetermine an appropriate inductor value with the fol-
lowing equation:
The inductor current ripple, LIR, is the ratio of peak-to-
peak inductor ripple current to the average continuous
inductor current. An LIR between 20% and 40% pro-
vides a good compromise between efficiency and
economy. Choose a low-loss inductor having the lowest
possible DC resistance. Ferrite core type inductors are
often the best choice for performance. The inductor
saturation current rating must exceed IPEAK:
Setting the Current Limit
Lossless Current Limit (MAX1960/MAX1961)The MAX1960/MAX1961 use the low-side MOSFET’s on-
resistance (RDS(ON)) for current sensing. This method of
current limit sets the maximum value of the inductor’s
“valley” current (Figure 3). If the inductor current is higher
than the valley current-limit setting at the end of the
clock period, the controller skips the DH pulse. When
the first current-limit event is detected, the controller initi-LIRIPEAKLOADMAXLOADMAX ()()=+⎛⎜⎞⎟×2VVfLIRIOUTINOUTOSCLOADMAX=×××× ()V
OUT1=×⎛⎜⎞⎟ -
MAX1960/MAX1961/MAX1962
2.35V to 5.5V, 0.5% Accurate, 1MHz PWM
Step-Down Controllers with Voltage Margining
PRESET OUTPUT VOLTAGESEL1.5VGND
1.8VREF
2.5VNo connection
3.3VVDD
Table 2. Preset Voltages—
MAX1961/MAX1962MAX1960/
MAX1961/
MAX1962
C10
C11
C12D3D4D5
10Ω
1μF
VCC
VDD
AVDD
C10, C11, C12
500kHz
1μF
4.7μF
1MHz
0.47μF
2.2μF
Figure 2. Tripler Charge-Pump Configuration.
MAX1960/MAX1961/MAX1962ates a 128 clock cycle counter. If the current limit is pre-
sent at the end of this count, the controller remains off
until the input voltage is removed and re-applied, or the
device is re-enabled with CTL1 and CTL2. The 128-cycle
counter is reset when four successive DH pulses are
observed, without activating the current limit.
At maximum load, the low excursion of inductor current,
IVALLEY(MAX), is:
The current-limit threshold (VCLT) is set by connecting a
resistor (RILIM) from ILIM to GND. The range for this
resistor is 100kΩto 400kΩ. Set current-limit threshold as
follows:
VCLT= RILIM ×0.714µA
Connecting ILIM to VDDsets the threshold to a default
value of 75mV.
To prevent the current limit from falsely triggering, VCLT
divided by the low-side MOSFET RDS(ON)must exceed
the maximum value of IVALLEY. The maximum value of
low-side MOSFET RDS(ON)should be used:
VCLT> RDS(ON)MAX x IVALLEY(MAX)
A limitation of sensing current across MOSFET on-resis-
tance is that the MOSFET on-resistance varies signifi-
cantly from MOSFET to MOSFET and over temperature.
Consequently, this current-sensing method may not be
suitable if a precise current limit is required. If better
accuracy is needed, use the MAX1962 with a current-
sense resistor.
Current-Sense Resistor (MAX1962)The MAX1962 uses a current-sense resistor connected
from the inductor to the output with Kelvin sense connec-
tions. The current-sense voltage is measured from CS to
OUT, and has a fixed threshold of 50mV. The MAX1962
current limit is triggered when the peak voltage across
the current-sense resistor, IPEAK ×RSENSE, exceeds
50mV. Once current sense is triggered, the controller
does not turn off, but continues to operate at the current
limit. This method of current sensing is more precise due
to the accuracy of the current-sense resistor. The cost of
this precision is that it requires an extra component and
is slightly less efficient due to the loss in the current-
sense resistance.
Inductor Resistance Current Sense (MAX1962)Alternately, the inductor resistance can be used to
sense current in place of a current-sense resistor. To
do this, connect a series RC network in parallel with the
inductor (Figure 4). Choose a resistor value less than
40Ωto avoid offsets due to CS input current. Calculate
the capacitor value from the formula C = 2L / (RL ×R).
The effective current-sense resistance (RSENSE) equals
RL. Current-sense accuracy then depends on the accu-
racy of the inductor resistance. Note that the current-
sense signal is delayed due to the RC filter time
constant. Consequently, inductor current may over-
shoot (by as much as 2x) when a fast short occurs.LIRIVALLEYMAXLOADMAXLOADMAX()()() =⎛⎜⎞⎟×-2
2.35V to 5.5V, 0.5% Accurate, 1MHz PWM
Step-Down Controllers with Voltage MarginingIPEAK
ILOAD
IVALLEY
INDUCTOR CURRENT
TIME
Figure 3. Inductor Current WaveformRL
R = 33Ω
0.22μH, 2.8mW,
ILIMIT = 18A
C = 4.7μF
OUT
MAX1962
Figure 4. Using the Inductor Resistance as a Current-Sense
Resistor with the MAX1962
Output Capacitor SelectionThe output filter capacitor must have low enough effective
series resistance (ESR) to meet output ripple and load
transient requirements. In addition, the capacitance value
must be high enough to absorb the inductor energy
during load steps.
In applications where the output is subject to large load
transients, low ESR is needed to prevent the output
from dipping too low (VDIP) during a load step:
In applications with less severe load steps, maximum
ESR may be governed by what is needed to maintain
acceptable output voltage ripple:
To satisfy both load step and ripple requirements,
select the lowest value from the above two equations.
The capacitor is usually selected by physical size, ESR,
and voltage rating, rather than by capacitance value.
With current tantalum, electrolytic, and polymer capaci-
tor technology, the bulk capacitance will also be suffi-
cient once the ESR requirement is satisfied.
When using low-capacity filter capacitors such as
ceramic, capacitor size is usually determined by the
capacitance needed to prevent voltage undershoot
and overshoot during load transients. The overshoot
voltage (VSOAR) is given by:
Generally, once enough capacitance is in place to meet
the overshoot requirement, undershoot at the rising load
edge is no longer a problem.
Input Capacitor SelectionThe input capacitor (CIN) reduces the current peaks
drawn from the input supply and reduces noise injec-
tion. The source impedance to the input supply largely
determines the value of CIN. High source impedance
requires high input capacitance. The input capacitor
must meet the ripple current requirement (IRMS)
imposed by the switching currents.
The RMS input ripple current is given by:
For optimal circuit reliability, choose a capacitor that
has less than 10°C temperature rise at the peak ripple
current.
Compensation and Stability
Compensation with Ceramic Output CapacitorsThe high switching frequency range of the
MAX1960/MAX1961/MAX1962 allows the use of ceramic
output capacitors. Since the ESR of ceramic capacitors
is very low typically, the frequency of the associated
transfer function zero is higher than the unity-gain
crossover frequency and the zero cannot be used to
compensate for the double pole created by the output
inductor and capacitor. The solution is Type 3 compen-
sation (Figure 5), which takes advantage of local feed-
back to create two zeros and three poles (Figure 6). The
frequency of the poles and zeros are described below:
Unity-gain crossover frequency:CVCMAX
RAMP0001=××××× RCZESRESR=××0π RRCZ2133=×+×π () fRCZ111=××π LC=×00π CC112××π RCP213=××π fP10=VVVRMSLOAD
OUTINOUT=××()-LISOARPEAK
OUTOUT=×()× V
LIRIESR
RIPPLEPP
LOADMAX≤×()()VESRDIP
LOADSTEPMAX≤
MAX1960/MAX1961/MAX1962
2.35V to 5.5V, 0.5% Accurate, 1MHz PWM
Step-Down Controllers with Voltage Margining
