MAX1951ESA ,PLASTIC ENCAPSULATED DEVICESTable of Contents I. ........Device Description V. ........Quality Assurance Information II ..
MAX1951ESA+ ,1MHz, All-Ceramic, 2.6V to 5.5V Input, 2A PWM Step-Down DC-to-DC Regulatorsapplications. The MAX1951total output error is less than 1% over load, line, and ♦ 1% Output Accura ..
MAX1951ESA+T ,1MHz, All-Ceramic, 2.6V to 5.5V Input, 2A PWM Step-Down DC-to-DC RegulatorsApplicationsSelector GuideASIC/DSP/µP/FPGA Core and I/O VoltagesSet-Top Boxes PIN-PART TEMP RANGE O ..
MAX1952ESA+ ,1MHz, All-Ceramic, 2.6V to 5.5V Input, 2A PWM Step-Down DC-to-DC RegulatorsELECTRICAL CHARACTERISTICS(V = V = 3.3V, PGND = GND, FB in regulation, C = 0.1µF, T = 0°C to +85°C, ..
MAX1952ESA+T ,1MHz, All-Ceramic, 2.6V to 5.5V Input, 2A PWM Step-Down DC-to-DC RegulatorsELECTRICAL CHARACTERISTICS (continued)(V = V = 3.3V, PGND = GND, FB in regulation, C = 0.1µF, T = 0 ..
MAX19538ETL+T ,12-Bit, 95Msps, 3.3V ADCfeatures a 63µW power-down mode to con-♦ Common-Mode Referenceserve power during idle periods.♦ CMO ..
MAX490EEPA ,15kV ESD-Protected / Slew-Rate-Limited / Low-Power / RS-485/RS-422 TransceiversMAX481E/MAX483E/MAX485E/MAX487E–MAX491E/MAX1487E19-0410; Rev 3; 7/96±15kV ESD-Protected, Slew-Rate- ..
MAX490EEPA+ ,±15kV ESD-Protected, Slew-Rate-Limited, Low-Power, RS-485/RS-422 TransceiversELECTRICAL CHARACTERISTICS(V = 5V ±5%, T = T to T , unless otherwise noted.) (Notes 1, 2)CC A MIN M ..
MAX490EESA ,15kV ESD-Protected / Slew-Rate-Limited / Low-Power / RS-485/RS-422 TransceiversELECTRICAL CHARACTERISTICS(V = 5V ±5%, T = T to T , unless otherwise noted.) (Notes 1, 2)CC A MIN M ..
MAX490EESA ,15kV ESD-Protected / Slew-Rate-Limited / Low-Power / RS-485/RS-422 TransceiversApplicationsMAX481EESA -40°C to +85°C 8 SOLow-Power RS-485 TransceiversOrdering Information continu ..
MAX490EESA+ ,±15kV ESD-Protected, Slew-Rate-Limited, Low-Power, RS-485/RS-422 TransceiversApplications:MAX491E, and MAX1487E are low-power transceivers forMAX3430: ±80V Fault-Protected, Fai ..
MAX490EESA+T ,±15kV ESD-Protected, Slew-Rate-Limited, Low-Power, RS-485/RS-422 TransceiversApplications:state. The receiver input has a fail-safe feature that guar-MAX3440E–MAX3444E: ±15kV E ..
MAX1951ESA
PLASTIC ENCAPSULATED DEVICES
MAX1951ESA Rev. A RELIABILITY REPORT
FOR
MAX1951ESA PLASTIC ENCAPSULATED DEVICES
May 14, 2003
MAXIM INTEGRATED PRODUCTS 120 SAN GABRIEL DR.
SUNNYVALE, CA 94086
Written by Reviewed by
Jim Pedicord Bryan J. Preeshl
Quality Assurance Quality Assurance
Reliability Lab Manager Executive Director
Conclusion The MAX1951 successfully meets the quality and reliability standards required of all Maxim products. In addition,
Maxim’s continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim’s quality
and reliability standards.
Table of Contents
I. ........Device Description V. ........Quality Assurance Information
II. ........Manufacturing Information VI. .......Reliability Evaluation
III. .......Packaging Information IV. .......Die Information .....Attachments
I. Device Description A. General
The MAX1951 high-efficiency, DC-to-DC step-down switching regulator delivers up to 1.5A of output current. The
device operates from an input voltage range of 2.6V to 5.5V and provides an output voltage from 0.8V to VIN, making
the MAX1951 ideal for on-board postregulation applications. The MAX1951 total output error is less than 1% over
load, line, and temperature.
The MAX1951 operates at a fixed frequency of 1MHz with an efficiency of up to 94%. The high operating frequency
minimizes the size of external components. Internal soft-start control circuitry reduces inrush current. Short-circuit
and thermal-overload protection improve design reliability.
The MAX1951 provides an adjustable output from 0.8V to VIN. The device ia available in a space-saving 8-pin SO
package. B. Absolute Maximum Ratings Item Rating IN, VCC to GND -0.3V to +6V
COMP, FB, REF to GND -0.3V to (VCC + 0.3V)
LX to Current (Note 1) ±4.5A
PGND to GND Internally Connected
Operating Temperature Range -40°C to +85°C
Junction Temperature Range -40°C to +150°C
Storage Temperature Range -65°C to +150°C
Lead Temperature (soldering, 10s) +300°C
Continuous Power Dissipation (TA = +70°C)
8-Pin SO 976mW
Derates above +70°C
8-Pin SO 12.12mW/°C
II. Manufacturing Information A. Description/Function: 1MHz, All-Ceramic, 2.6V to 5.5V Input,1.5A PWM Step-Down DC-to-DC Regulators B. Process: S8 (Standard 0.8 micron silicon gate CMOS) C. Number of Device Transistors: 2500
D. Fabrication Location: California, USA
E. Assembly Location: Philippines or Thailand F. Date of Initial Production: September, 2002
III. Packaging Information A. Package Type:
8-Pin SO
B. Lead Frame: Copper C. Lead Finish: Solder Plate D. Die Attach: Silver-filled Epoxy E. Bondwire: Gold (2 mil dia.) F. Mold Material: Epoxy with silica filler
G. Assembly Diagram: # 05-3501-0029
H. Flammability Rating: Class UL94-V0
I. Classification of Moisture Sensitivity
per JEDEC standard JESD22-112: Level 1
IV. Die Information A. Dimensions: 80 x 90 mils B. Passivation: Si3N4/SiO2 (Silicon nitride/ Silicon dioxide) C. Interconnect: Aluminum/Si (Si = 1%) D. Backside Metallization: None E. Minimum Metal Width: 0.8 microns (as drawn) F. Minimum Metal Spacing: 0.8 microns (as drawn) G. Bondpad Dimensions: 5 mil. Sq. H. Isolation Dielectric: SiO2 I. Die Separation Method: Wafer Saw
V. Quality Assurance Information A. Quality Assurance Contacts: Jim Pedicord (Reliability Lab Manager) Bryan Preeshl (Executive Director) Kenneth Huening (Vice President) B. Outgoing Inspection Level: 0.1% for all electrical parameters guaranteed by the Datasheet. 0.1% For all Visual Defects. C. Observed Outgoing Defect Rate: < 50 ppm D. Sampling Plan: Mil-Std-105D
VI. Reliability Evaluation A. Accelerated Life Test
The results of the 135°C biased (static) life test are shown in
Table 1. Using these results, the Failure Rate (l) is calculated as follows:
l = 1 = 1.83 (Chi square value for MTTF upper limit)
MTTF 192 x 4389 x 45 x 2 Temperature Acceleration factor assuming an activation energy of 0.8eV l = 24.13 x 10-9 l = 24.13 F.I.T. (60% confidence level @ 25°C)
This low failure rate represents data collected from Maxim’s reliability monitor program. In addition to
routine production Burn-In, Maxim pulls a sample from every fabrication process three times per week and subjects
it to an extended Burn-In prior to shipment to ensure its reliability. The reliability control level for each lot to be
shipped as standard product is 59 F.I.T. at a 60% confidence level, which equates to 3 failures in an 80 piece
sample. Maxim performs failure analysis on any lot that exceeds this reliability control level. Attached Burn-In
Schematic (Spec. # 06-5972) shows the static Burn-In circuit. Maxim also performs quarterly 1000 hour life test
monitors. This data is published in the Product Reliability Report (RR-1M). B. Moisture Resistance Tests
Maxim pulls pressure pot samples from every assembly process three times per week. Each lot sample
must meet an LTPD = 20 or less before shipment as standard product. Additionally, the industry standard
85°C/85%RH testing is done per generic device/package family once a quarter.
C. E.S.D. and Latch-Up Testing The PM43 die type has been found to have all pins able to withstand a transient pulse of ±2000V per Mil-
Std-883 Method 3015 (reference attached ESD Test Circuit). Latch-Up testing has shown that this device
withstands a current of ±250mA.
Table 1 Reliability Evaluation Test Results
MAX1951ESA
TEST ITEM TEST CONDITION FAILURE SAMPLE NUMBER OF IDENTIFICATION PACKAGE SIZE FAILURES
Static Life Test (Note 1) Ta = 135°C DC Parameters 45 0 Biased & functionality Time = 192 hrs.
Moisture Testing (Note 2) Pressure Pot Ta = 121°C DC Parameters SO 77 0 P = 15 psi. & functionality 77 0 RH= 100% Time = 168hrs. 85/85 Ta = 85°C DC Parameters 77 0 RH = 85% & functionality Biased Time = 1000hrs.
Mechanical Stress (Note 2) Temperature -65°C/150°C DC Parameters 77 0 Cycle 1000 Cycles Method 1010
Note 1: Life Test Data may represent plastic DIP qualification lots.
Note 2: Generic Package/Process data
Attachment #1 TABLE II. Pin combination to be tested. 1/ 2/ 1/ Table II is restated in narrative form in 3.4 below. 2/ No connects are not to be tested. 3/ Repeat pin combination I for each named Power supply and for ground (e.g., where VPS1 is VDD, VCC, VSS, VBB, GND, +VS, -VS, VREF, etc). 3.4 Pin combinations to be tested. a. Each pin individually connected to terminal A with respect to the device ground pin(s) connected to terminal B. All pins except the one being tested and the ground pin(s) shall be open. b. Each pin individually connected to terminal A with respect to each different set of a combination of all named power supply pins (e.g., VSS1, or VSS2 or VSS3 or VCC1, or VCC2) connected to terminal B. All pins except the one being tested and the power supply pin or set of pins shall be open. c. Each input and each output individually connected to terminal A with respect to a combination of all the other input and output pins connected to terminal B. All pins except the input or output pin being tested and the combination of all the other input and output pins shall be open.
TERMINAL B
TERMINAL A
CURRENT
PROBE
(NOTE 6)
R = 1.5kW
C = 100pf
SHORT
R2
S2 R1
