MAX1772EEI+-MAX1772EEI+T Fast Delivery |IC PHOENIX CO.,LIMITED

MAX1773AEUP ,Power Source Selector for Dual-Battery SystemsELECTRICAL CHARACTERISTICS(V = V = 16.8V, C = 3.3µF, V = 0.93V, V = V = 28V, V = 3V, V = V = 1.65V, ..
MAX1773AEUP ,Power Source Selector for Dual-Battery SystemsApplications MAX1773AEUP -40°C to +85°C 20 TSSOPNotebook and Subnotebook Computers PDAs and Handy-T ..
MAX1773AEUP ,Power Source Selector for Dual-Battery SystemsMAX1773/MAX1773A19-1796; Rev 1; 1/03Power Source Selector for Dual-Battery Systems
MAX1773AEUP+ ,Power Source Selector for Dual-Battery SystemsApplications MAX1773AEUP -40°C to +85°C 20 TSSOPNotebook and Subnotebook Computers PDAs and Handy-T ..
MAX1773EUP ,Power Source Selector for Dual-Battery SystemsFeatures† The MAX1773/MAX1773A highly integrated ICs serve Patented 7-MOSFET Topology Offers Low-C ..
MAX1774EEI ,Dual, High-Efficiency, Step-Down Converter with Backup Battery SwitchoverApplications

MAX1772EEI+-MAX1772EEI+T
Low-Cost, Multichemistry Battery-Charger Building Block
General Description
The MAX1772 is a highly-integrated, multichemistry
battery-charger control IC that simplifies the construc-
tion of accurate and efficient chargers. The MAX1772
uses analog inputs to control charge current and volt-
age and can be programmed by the host or hardwired.
High efficiency is achieved by a buck topology with
synchronous rectification.
Maximum current drawn from the AC adapter is pro-
grammable to avoid overloading the AC adapter when
supplying the load and the battery charger simultane-
ously. This enables the user to reduce the cost of the
AC adapter. The MAX1772 provides outputs that can
be used to monitor the current drawn from the AC
adapter, battery-charging current, and the presence of
an AC adapter.
The MAX1772 can charge two to four lithium-ion (Li+)
series cells, easily providing 4A. When charging, the
MAX1772 automatically transitions from regulating cur-
rent to regulating voltage. It is available in a space-sav-
ing 28-pin QSOP package.
Applications
Notebook and Subnotebook Computers
Personal Digital Assistants
Handheld Terminals
FeaturesInput Current Limiting±0.5% Output Voltage Accuracy Using Internal
Reference (0°C to +85°C)Programmable Battery Charge Current >4AAnalog Inputs Control Charge Current and
Charge VoltageMonitor Outputs for:
Current Drawn from AC Input Source
Charging Current
AC Adapter PresentUp to 18.2V (max) Battery Voltage8V to 28V Input Voltage> 95% Efficiency99.99% (max) Duty Cycle for Low-Dropout
OperationCharges Any Battery Chemistry: Li+, NiCd, NiMH,
Lead Acid, etc.
MAX1772
Low-Cost, Multichemistry Battery-
Charger Building Block
IINP
CSSP
CSSN
BST
DHI
VCTL
DLOV
DLO
PGND
CSIP
CSIN
BATT
CELLS
ICTL
REFIN
ACOK
ACIN
ICHG
GND
GND
CCV
CCI
CCS
REF
CLS
LDO
DCIN
QSOP
TOP VIEW
MAX1772
Pin Configuration
19-1772; Rev 4; 2/09
Ordering InformationPART TEMP RANGE PIN-PACKAGE MAX1772EEI -40°C to +85°C 28 QSOP MAX1772EEI+ -40°C to +85°C 28 QSOP
+Denotes lead(Pb)-free/RoHS-compliant package.
MAX1772
Low-Cost, Multichemistry Battery-
Charger Building Block
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDCIN= VCSSP= VCSSN= 18V, VBATT= VCSIP= VCSIN= 12V, VREFIN= 3.0V, VVCTL= VICTL= 0.75 ✕VREFIN, VCELLS= 2.0V,
VACIN= 0V, CLS = REF, VBST- VLX= 4.5V, VGND= VPGND= 0V, CLDO= 1µF, LDO = DLOV, CREF= 1µF; pins CCI, CCS, and CCV
are compensated per Figure 1a; TA= 0°C to +85°C,unless otherwise noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DCIN, CSSP, CSSN to GND...................................-0.3V to +30V
BST to GND............................................................-0.3V to +36V
BST to LX..................................................................-0.3V to +6V
DHI to LX...................................................-0.3V to (VBST+ 0.3V)
LX to GND.................................................................-6V to +30V
BATT, CSIP, CSIN to GND........................................-0.3V to 20V
CSIP to CSIN or CSSP to CSSN or
PGND to GND...........……….……………..…….-0.3V to +0.3V
CCI, CCS, CCV, DLO, ICHG, IINP,
ACIN, REF to GND...............................-0.3V to (VLDO+ 0.3V)
DLOV, VCTL, ICTL, REFIN, CELLS,
CLS, LDO, ACOK to GND....................................-0.3V to +6V
DLOV to LDO.........................................................-0.3V to +0.3V
DLO to PGND.........................................-0.3V to (VDLOV+ 0.3V)
LDO Short-Circuit Current ..................................................50mA
Continuous Power Dissipation (TA= +70°C)
28-Pin QSOP (derate 12.6mW/°C above +70°C).......1008mW
Junction-to-Ambient Thermal Resistance (θJA)
(Note 1).....................................................................79.3°C/W
Junction-to-Case Thermal Resistance (θJC)
(Note 1)........................................................................27°C/W
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature........................................................150°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering, 10s).................................+300°CPARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITSSUPPLY AND LDO REGULATORDCIN Input Voltage Range VDCIN 8 28 VVDCIN falling 7.0 7.4 DCIN Undervoltage Lockout
Trip Point VDCIN rising 7.5 7.85 VDCIN Quiescent Current IDCIN 8.0V < VDCIN < 28V 2.7 6.0 mALDO Output Voltage 8.0V < VDCIN < 28V, no load 5.25 5.40 5.55 VLDO Load Regulation 0 < ILDO < 10mA 34 100 mVLDO Undervoltage Lockout
Trip Point VDCIN = 8.0V 3.20 4.00 5.15 VREF Output Voltage 0 < IREF < 500µA 4.072 4.096 4.120 VREF Undervoltage Lockout
Trip Point VREF falling 3.1 3.9 VTRIP POINTSBATT POWER_FAIL Threshold VCSSP falling 50 100 150 mVBATT POWER_FAIL Threshold
Hysteresis 100 200 300 mVACIN Threshold VACIN rising 2.007 2.048 2.089 VACIN Threshold Hysteresis 0.5% of VREF 10 20 30 mVACIN Input Bias Current VACIN = 2.048V -1 +1 µACLS Input Range 1.6 REF VCLS Input Bias Current VCLS = 2.0V -1 +1 µASWITCHING REGULATOR
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to /thermal-tutorial.
MAX1772
Low-Cost, Multichemistry Battery-
Charger Building Block
ELECTRICAL CHARACTERISTICS (continued)
(VDCIN= VCSSP= VCSSN= 18V, VBATT= VCSIP= VCSIN= 12V, VREFIN= 3.0V, VVCTL= VICTL= 0.75 ✕VREFIN, VCELLS= 2.0V,
VACIN= 0V, CLS = REF, VBST- VLX= 4.5V, VGND= VPGND= 0V, CLDO= 1µF, LDO = DLOV, CREF= 1µF; pins CCI, CCS, and CCV
are compensated per Figure 1a; TA= 0°C to +85°C,unless otherwise noted. Typical values are at TA= +25°C.)PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITSMaximum On-Time 5 10 15 msOscillator Frequency fOSC (Note 2) 400 kHzDLOV Supply Current IDLOV DLO low 5 10 µABST Supply Current IBST DHI high 6 15 µALX Input Bias Current VDCIN = 28V, VBATT = VLX = 20V 150 500 µALX Input Quiescent Current VDCIN = 0V, VBATT = VLX = 20V 0.3 1.0 µADHI Maximum Duty Cycle 99.0 99.9 %DHI On-Resistance High VBST - VLX = 4.5V, IDHI = +100mA 4 7 ΩDHI On-Resistance Low VBST - VLX = 4.5V, IDHI = -100mA 1 2 ΩDLO On-Resistance High VDLOV = 4.5V, IDLO = +100mA 4 7 ΩDLO On-Resistance Low VDLOV = 4.5V, IDLO = -100mA 1 2 ΩVBATT = 19V, VDCIN = 0V 5 BATT Input Current IBATT VBATT = 2V to 19V, VDCIN > VBATT + 0.3V 200 500 µAVDCIN = 0V 1 5 CSIP/CSIN Input Current VCSIP = VCSIN = 12V 800 µAVDCIN = 0V 0.1 0.3 CSSP/CSSN Input Current VCSSP = VCSSN = VDCIN > 8.0V 800 µABATT/CSIP/CSIN Input Voltage
Range 0 19 VCSIP to CSIN Full-Scale
Current-Sense Voltage VBATT = 12V 189 204 219 mVCSSP to CSSN Full-Scale
Current-Sense Voltage 189 204 219 mVERROR AMPLIFIERSGMV Amplifier
Transconductance V C TL = RE FIN , V BAT T = 16.8V , C E LLS = LD O 0.0625 0.1250 0.250 µSGMI Amplifier
Transconductance ICTL = REFIN, VCSIP - VCSIN = 150.4mV 0.5 1 2 µSGMS Amplifier
Transconductance VCLS = 2.048V, VCSSP - VCSSN = 102.4mV 0.5 1 2 µSCCI/CCS/CCV Clamp Voltage 0.25V < VCCI, VCCS, VCCV < 2.0V 150 300 600 mVCURRENT AND VOLTAGE SETTINGICTL = REFIN (see Equation 2) -8 +8 Charging-Current Accuracy ICTL = REFIN/32 (see Equation 2) -55 +55 %VVCTL = VICTL = VREFIN = 3V -1 +1 ICTL, VCTL, REFIN Input Bias
Current VDCIN = 0, VVCTL = VICTL = VREFIN = 5V -1 +1 µAICTL Power-Down Mode
Threshold Voltage REFIN
/100 REFIN
/55 REFIN
/33 V
MAX1772
Low-Cost, Multichemistry Battery-
Charger Building Block
ELECTRICAL CHARACTERISTICS (continued)
(VDCIN= VCSSP= VCSSN= 18V, VBATT= VCSIP= VCSIN= 12V, VREFIN= 3.0V, VVCTL= VICTL= 0.75 ✕VREFIN, VCELLS= 2.0V,
VACIN= 0V, CLS = REF, VBST- VLX= 4.5V, VGND= VPGND= 0V, CLDO= 1µF, LDO = DLOV, CREF= 1µF; pins CCI, CCS, and CCV
are compensated per Figure 1a; TA= 0°C to +85°C,unless otherwise noted. Typical values are at TA= +25°C.)PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITSVVCTL = VREFIN (2, 3, or 4 cells)
(see Equation 1) -0.5 +0.5 Battery-Regulation Voltage
Accuracy VVCTL = VREFIN/20 (2, 3, or 4 cells)
(see Equation 1) -0.5 +0.5%REFIN Range 2.0 3.6 VREFIN Undervoltage Lockout 1.20 1.92 VICHG Transconductance VICHG to (VCSIP - VCSIN); VCSIP -
VCSIN = 0.185V; VICHG = 0V, 3.0V 0.95 1.00 1.05 µSVCSIP - VCSIN = 0.185V -5 +5 ICHG Accuracy VCSIP - VCSIN = 0.05V -10 +10 %IINP Transconductance VIINP to (VCSSP - VCSSN); VCSSP -
VCSSN = 0.185V; VIINP = 0V, 3.0V (Note 3) 0.85 1.00 1.15 µSVCSSP - VCSSN = 0.185V -15 +15 IINP Current Accuracy VCSSP - VCSSN = 0.05V (Note 3) -20 +20 %VCSSP - VCSSN = 0.08V, VCLS = 1.6V -10 +10 CSSP - CSSN Accuracy VCSSP - VCSSN = 0.2V, CLS = REF -10 +10 %CSSP + CSSN Input Voltage
Range 8.0 28 VLOGIC LEVELSCELLS Input Low Voltage 0.2 VCELLS Input Middle Voltage 0.4 V LDO 0.5 VCELLS Input High Voltage V LDO
- 0.25 V LDO VCELLS Input Bias Current VCELLS = 0V or VLDO -10 +10 µAACOK Sink Current VACOK = 0.4V 1 mAACOK Leakage Current VACOK = 5.5V -1 +1 µA
MAX1772
Low-Cost, Multichemistry Battery-
Charger Building Block
ELECTRICAL CHARACTERISTICS
(VDCIN= VCSSP= VCSSN= 18V, VBATT= VCSIP= VCSIN= 12V, VREFIN= 3.0V, VVCTL= VICTL= 0.75 ✕VREFIN, VCELLS= 2.0V,
VACIN= 0V, CLS = REF, VBST- VLX= 4.5V, VGND= VPGND= 0V, CLDO= 1µF, LDO = DLOV, CREF= 1µF; pins CCI, CCS, and CCV
are compensated per Figure 1a; TA= -40°C to +85°C,unless otherwise noted.) (Note 1)PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITSSUPPLY AND LDO REGULATORDCIN Input Voltage Range VDCIN 8.0 28.0 VVDCIN falling 7 DCIN Undervoltage Lockout
Trip Point VDCIN rising 7.85 VDCIN Quiescent Current IDCIN 8.0V < VDCIN < 28V 6 mALDO Output Voltage 8.0V < VDCIN < 28V, no load 5.25 5.65 VTRIP POINTSBATT POWER_FAIL Threshold VCSSP falling 50 150 mVBATT POWER_FAIL Threshold
Hysteresis 100 300 mVACIN Threshold VACIN rising 2.007 2.089 VACIN Threshold Hysteresis 0.5% of REF 10 30 mVACIN Input Bias Current VACIN = 2.048V -1 +1 µACLS Input Range 1.6 REF VCLS Input Bias Current VCLS = 2.0V -1 +1 µASWITCHING REGULATORMinimum Off-Time VBATT = 16.8V 1 1.5 µsMaximum On-Time 5 15 msOscillator Frequency fOSC (Note 1) 400 kHzDHI Maximum Duty Cycle 99 %VBATT = 19V, VDCIN = 0V 5 BATT Input Current IBATT VBATT = 2V to 19V, VDCIN > VBATT + 0.3V 500 µAVDCIN = 0V 5 CSIP/CSIN Input Current VCSIP = VCSIN = 12V 800 µAVDCIN = 0V 0.3 CSSP/CSSN Input Current VCSSP = VCSSN = VDCIN > 8.0V 800 µABATT/CSIP/CSIN Input Voltage
Range 0 19 VCSIP to CSIN Full-Scale
Current-Sense Voltage VBATT = 12V 189 219 mVCSSP to CSSN Full-Scale
Current-Sense Voltage 189 219 mVCURRENT AND VOLTAGE SETTINGICTL = REFIN (see Equation 2) -8 +8 Charging Current Accuracy ICTL = REFIN/32 (see Equation 2) -55 +55 %VVCTL = VICTL = VREFIN = 3V -1 +1 ICTL, VCTL, REFIN Input Bias
Current VDCIN = 0V, VVCTL = VICTL = VREFIN = 5V -1 +1 µA
MAX1772
Low-Cost, Multichemistry Battery-
Charger Building Block
ELECTRICAL CHARACTERISTICS (continued)
(VDCIN= VCSSP= VCSSN= 18V, VBATT= VCSIP= VCSIN= 12V, VREFIN= 3.0V, VVCTL= VICTL= 0.75 ✕VREFIN, VCELLS= 2.0V,
VACIN= 0V, CLS = REF, VBST- VLX= 4.5V, VGND= VPGND= 0V, CLDO= 1µF, LDO = DLOV, CREF= 1µF; pins CCI, CCS, and CCV
are compensated per Figure 1a; TA= -40°C to +85°C,unless otherwise noted.) (Note 1)PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITSICTL Power-Down Mode
Threshold Voltage REFIN
/100 REFIN
/33 VVVCTL = VREFIN (2, 3, or 4 cells)
(see Equation 1) -1 +1 Battery Regulation Voltage
Accuracy VVCTL = VREFIN/20 (2, 3, or 4 cells)
(see Equation 1) -1 +1%REFIN Range 2.0 3.6 VREFIN Undervoltage Lockout 1.92 VVCSIP - VCSIN = 0.185V -5 +5 ICHG Accuracy VCSIP - VCSIN = 0.05V -10 +10 %VCSSP - VCSSN = 0.185V -15 +15 IINP Current Accuracy VCSSP - VCSSN = 0.05V (Note 3) -20 +20 %VCSSP - VCSSN = 0.08V, VCLS = 1.6V -10 +10 CSSP - CSSN Accuracy VCSSP - VCSSN = 0.2V, CLS = REF -10 +10 %CSSP + CSSN Input Voltage
Range 8 28 VLOGIC LEVELSCELLS Input Low Voltage 0.2 VCELLS Input Middle Voltage 0.4 V LDO 0.5 VCELLS Input High Voltage V LDO
- 0.25 V LDO VCELLS Input Bias Current VCELLS = 0V or VLDO -10 +10 µAACOK Sink Current VACOK = 0.4V 1 mAACOK Leakage Current VACOK = 5.5V -1 +1 µA
Note 2:Guaranteed by design. Not production tested.
Note 3:Tested under DC conditions. See text for more detail.
MAX1772
Low-Cost, Multichemistry Battery-
Charger Building Block
Typical Operating Characteristics
(Circuit of Figure 1a, VDCIN= 20V, TA = +25°C, unless otherwise noted.)
VBATT
20V/div
IBATT
2A/div
VCCI
500mV/div
VCCV
500mV/div
LOAD-TRANSIENT RESPONSE
(BATTERY REMOVAL AND REINSERTION)
MAX1772 toc01
1ms/div
VICTL = 0.957V
VCTL = 3.3V
BATTERY PRESENT
CCI
CCVVBATT
20V/div
ILOAD
2A/div
VCCS
500mV/div
VCCI
500mV/div
LOAD-TRANSIENT RESPONSE
(STEP-IN LOAD CURRENT)
MAX1772 toc02
1ms/div
VICTL = 3.30V
CHARGING CURRENT = 2.0A
VBATT = 16V
LOAD STEP = 0 TO 3A
ISOURCE LIMIT = 5A
CCI
CCS
VBATT
(AC-COUPLED)
100mV/div
VDCIN
10V/div
LINE-TRANSIENT RESPONSE
MAX1772 toc03
2ms/div
VBATT = 16V
VDCIN = 18.5V TO 27.5V
ILOAD = 150mA
LDO LOAD REGULATION
MAX1772 toc04
LDO CURRENT (mA)
LDO ERROR (%)
VVCTL = 0V
VICTL = 3.3V
VDCIN = 20.0V
VLDO = 5.40V
MAX1772
Low-Cost, Multichemistry Battery-
Charger Building Block
REF VOLTAGE ERROR vs. TEMPERATURE
MAX1772 toc07
TEMPERATURE (°C)
REF VOLTAGE ERROR (%)
VICTL = 0V
VVCTL = 0V
NO LOAD
VREF = 4.096V
0.1110100100010,000
EFFICIENCY vs. BATTERY CURRENT
(VOLTAGE CONTROL LOOP)
MAX1772 toc08
BATT CURRENT (mA)
EFFICIENCY (%)40VVCTL = 0V
VICTL = 3.3V
VREFIN = 3.3V
CELL = 3
CELL = 2
CELL = 4
100100010,000
EFFICIENCY vs. BATTERY CURRENT
(CURRENT CONTROL LOOP)
MAX1772 toc09
EFFICIENCY (%)40
VVCTL = 0V
VICTL = 3.3V
VREFIN = 3.3V
CELL = 2CELL = 3
CELL = 4
BATT CURRENT (mA)
Typical Operating Characteristics (continued)
(Circuit of Figure 1a, VDCIN= 20V, TA = +25°C, unless otherwise noted.)
LDO LINE REGULATION
MAX1772 toc05
DCIN (V)
LDO ERROR (%)
VLDO = 5.40V
REF VOLTAGE LOAD REGULATION
MAX1772 toc06
REF CURRENT (μA)
REF ERROR (%)
VVCTL = 0V
VICTL = 3.3V
CELL = 4
VREF = 4.096V
MAX1772
Low-Cost, Multichemistry Battery-
Charger Building Block
Typical Operating Characteristics (continued)
(Circuit of Figure 1a, VDCIN= 20V, TA = +25°C, unless otherwise noted.)
OUTPUT V/I CHARACTERISTICS
MAX1772 toc10
BATT CURRENT (mA)
BATT VOLTAGE ERROR (%)
VVCTL = 0V
VICTL = 3.3VCELL = 4
CELL = 3
CELL = 2
BATT VOLTAGE ERROR vs. VCTL
MAX1772 toc11
VCTL/REFIN (%)
BATT VOLTAGE ERROR (%)
CELL = 4
VREFIN = 3.3V
NO LOAD
CURRENT SETTING ERROR vs. ICTL
MAX1772 toc12
ICTL/REFIN (%)
CURRENT SETTING ERROR (%)
VBATT > 2V
VREFIN = 3.3V
ICHG ERROR vs. BATT LOAD CURRENT
MAX1772 toc13
BATT LOAD CURRENT (mA)
ICHG ERROR (%)
VVCTL = 0V
VICTL = 3.3V
CELL = 4
MAX1772
Low-Cost, Multichemistry Battery-
Charger Building Block
PINNAMEFUNCTION1 DCIN Charging Voltage Input2 LDO D evi ce P ow er S up p l y. Outp ut of the 5.4V l i near r eg ul ator sup p l i ed fr om D C IN . Byp ass LD O w i th a 1µF
cap aci tor to G N D .3 CLS Source Current-Limit Input. Voltage input for setting the current limit of the input source.4 REF 4.096V Voltage Reference. Bypass REF with a 1µF capacitor to GND.5 CCS Input Current Regulation Loop Compensation Point. Connect a 0.01µF capacitor from CCS to GND.6 CCI Output Current Regulation Loop Compensation Point. Connect a 0.01µF capacitor from CCI to GND.7 CCV Voltage Regulation Loop Compensation Point. Connect 1kΩ resistor in series with a 0.1µF capacitor
to GND.8, 9 GND Analog Ground10 ICHG ICHG is a scaled-down replica of the battery output current being sensed. It is used to monitor the
charging current and indicates when the chip changes from voltage mode to current mode. The
transconductance of (CSIP - CSIN) to ICHG is 1µS. Connect ICHG pin to GND if it is unused.11 ACIN AC Detect Input. Detects when the AC adapter voltage is available for charging.12 ACOK AC Detect Output. Open-drain output is high when ACIN is less than REF/2.13 REFIN Reference Input. Allows the ICTL and VCTL pins to have ratiometric ranges for increased DAC
accuracy.14 ICTL Input for Setting Maximum Output Current. Range is REFIN/32 to REFIN. The device shuts down if
this pin is forced below REFIN/55 (typ).15 VCTL Input for Setting Maximum Output Voltage. Range is 0 to REFIN.16 CELLS Trilevel Input for Setting Number of Cells. GND = 2 cells, LDO/2 = 3 cells, LDO = 4 cells.17 BATT Battery Voltage Input18 CSIN Output Current-Sense Negative Input19 CSIP Output Current-Sense Positive Input. Connect a current-sense resistor from CSIP to CSIN.20 PGND Power Ground21 DLO Low-Side Power MOSFET Driver Output. Connect DLO to a low-side nMOS gate.22 DLOV Low-Side Driver Supply23 LX P ow er C onnecti on for the H i g h- S i d e P ow er M O S FE T D r i ver . C onnect LX to a sour ce of hi g h- si d e nM O S .24 DHI High-Side Power MOSFET Driver Output. Connect DHI to a high-side nMOS gate.25 BST Power Connection for the High-Side Power MOSFET Driver. Connect a 0.1µF capacitor from LX to
BST.26 CSSN Input Current-Sense for Charger (negative input)27 CSSP Input Current-Sense for Charger (positive input). Connect a current-sense resistor from CSSP to
CSSN.28 IINP IIN P i s a scal ed - d ow n r ep l i ca of the i np ut cur r ent b ei ng sensed . It i s used to m oni tor the total system
cur r ent. The tr anscond uctance of ( C S S P - C S S N ) to IIN P i s 1m S . C onnect IIN P p i n to GN D i f i t i s unused .
Pin Description

Partno	Mfg	Dc	Qty	Available	Descript
MAX1772EEI+ \|MAX1772EEI	MAXIM	N/a	54	avai	Low-Cost, Multichemistry Battery-Charger Building Block
MAX1772EEI+T	MAXIM ?	N/a	1071	avai	Low-Cost, Multichemistry Battery-Charger Building Block