MAX17122ETL+ ,Step-Up, Step-Down Regulator, Gate-On Charge Pump, and Boost-Buck Regulator for TV TFT LCD DisplayApplicationsS 40-Pin, 6mm x 6mm Thin QFN PackageLCD TV Panels Ordering Informatio ..
MAX17126AETM+T ,Multi-Output Power Supplies with VCOM Amplifier and High-Voltage Gamma Reference for LCD TVsApplicationsLCD TV PanelsPin Configuration appears at end of data sheet. ___ Maxim Integrated Produ ..
MAX17126BETM+T ,Multi-Output Power Supplies with VCOM Amplifier and High-Voltage Gamma Reference for LCD TVsFeaturesThe MAX17126B generates all the supply rails for thin- S 8.0V to 16.5V IN Supply Voltage Ra ..
MAX17126ETM+ ,Multi-Output Power Supplies with VCOM Amplifier and High-Voltage Gamma Reference for LCD TVsFeaturesThe MAX17126/MAX17126A generate all the supply rails S 8.0V to 16.5V IN Supply-Voltage Rang ..
MAX17126ETM+T ,Multi-Output Power Supplies with VCOM Amplifier and High-Voltage Gamma Reference for LCD TVsELECTRICAL CHARACTERISTICS(Circuit of Figure 1, V = V = 12V, V = V = 15V, T = 0°C to +85°C. Typical ..
MAX17126ETM+TC49 ,Multi-Output Power Supplies with VCOM Amplifier and High-Voltage Gamma Reference for LCD TVsfeatures high output cur-S 48-Pin, 7mm x 7mm, Thin QFN Packagerent (Q200mA), fast slew rate (45V/Fs ..
MAX4541CUA ,Low-Voltage, Single-Supply Dual SPST/SPDT Analog SwitchesApplicationsMAX4541CUA 0°C to +70°C 8 µMAX —Battery-Operated Systems Test EquipmentMAX4541CSA 0 ..
MAX4541CUA ,Low-Voltage, Single-Supply Dual SPST/SPDT Analog SwitchesELECTRICAL CHARACTERISTICS—Single +5V Supply(V+ = +5V ±10%, GND = 0, V = 2.4V, V = 0.8V, T = T to T ..
MAX4541CUA+ ,Low-Voltage, Single-Supply Dual SPST/SPDT Analog SwitchesMAX4541–MAX454419-1202; Rev 4; 6/07Low-Voltage, Single-Supply Dual SPST/SPDT Analog Switches
MAX4541EKA+T ,Low-Voltage, Single-Supply Dual SPST/SPDT Analog SwitchesApplicationsMAX4541CSA 0°C to +70°C 8 SO —Battery-Operated Systems Test EquipmentMAX4541CPA 0°C ..
MAX4541EKA-T ,Low-Voltage, Single-Supply Dual SPST/SPDT Analog SwitchesMAX4541–MAX454419-1202; Rev 3; 8/02Low-Voltage, Single-Supply Dual SPST/SPDT Analog Switches
MAX4541ESA ,Low-Voltage, Single-Supply Dual SPST/SPDT Analog SwitchesMAX4541–MAX454419-1202; Rev 3; 8/02Low-Voltage, Single-Supply Dual SPST/SPDT Analog Switches
MAX17122ETL+
Step-Up, Step-Down Regulator, Gate-On Charge Pump, and Boost-Buck Regulator for TV TFT LCD Display
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
19-4951; Rev 1; 11/09
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Pin Configuration appears at end of data sheet.
Ordering Information
General Description
The MAX17122 multiple-output power-supply IC gener-
ates all the supply rails for thin-film transistor (TFT) liquid-
crystal display (LCD) TV panels. It can operate from 8V
to 16.5V input voltages and is optimized for LCD TV
panel applications running directly from 12V regulated
supplies. It includes a 22V internal-switch step-down
regulator for digital logic, a 22V internal switch step-
up regulator to power the TFT source drivers, and a
temperature-compensated 36V internal-switch boost-
buck regulator that produces a negative output that can
vary according to the temperature sensed by an exter-
nal NTC thermistor. All three of these regulators feature
high-efficiency and fixed-frequency operation. High-
frequency operation allows the use of small inductors
and capacitors, resulting in a compact solution.
The MAX17122 includes a positive charge-pump linear
regulator controller that uses an external pnp bipolar
junction transistor (BJT) to typically form a regulated
charge-pump doubler to supply the LCD positive gate-
driver supply voltage. A negative gate-driver supply is
derived linearly between the boost-buck regulator’s out-
put and ground, using an external npn BJT connected to
ground and a small bypass capacitor.
Other features include an external-capacitor-timed,
open-drain, power-good output that monitors the step-
down regulator’s feedback and a simple untimed output
that monitors the positive charge-pump linear regulator’s
feedback. A high-voltage stress function is available for
the step-up regulator output. The GATE output directly
drives an external p-channel MOSFET to provide True
ShutdownK of the step-up output.
The MAX17122 is available in a 6mm x 6mm, 40-pin thin
QFN lead-free package and operates over the -40NC to
+85NC temperature range.
Applications
LCD TV Panels
Features
S 8V to 16.5V Operating Range
S 750kHz Switching Frequency
S 22V Internal-Switch High-Performance Step-Up
Regulator Fast Load-Transient Response Current-Mode PWM Operation 100mI, 3.9A nMOS SwitchCapacitor-Adjustable Soft-Start High-Voltage Stress Function Drives External pMOS Shutdown Switch
S 22V Internal-Switch Step-Down RegulatorPreset 1% Accurate 3.3V Output Voltage or Adjustable Output (Dual Mode™) Current-Mode PWM Operation 200mI, 2.5A nMOS SwitchCapacitor-Adjustable Power-Good Output
S 36V Internal-Switch Boost-Buck RegulatorTemperature-Compensated Output Programmable Fixed Levels with Temperature- Controlled Transition Current-Mode PWM Operation 200mI, 1.8A pMOS Switch
S Positive Charge-Pump Linear Regulator ControllerAdjustable 1% Accurate Output Voltage Uses External pnp Transistor Regulates Switching-Node-Driven Charge- Pump Doubler Power-Good Output
S Negative Linear Regulator ControllerAdjustable 1.5% Accurate Output Voltage Uses External npn Transistor
S Soft-Start for All Outputs
S Adjustable Power-Up Sequence
S Timed-Output Fault Protection with Restart for All
Outputs
S Latched Thermal-Shutdown Protection
S 40-Pin, 6mm x 6mm Thin QFN Package
True Shutdown and Dual Mode are trademarks of Maxim
EVALUATION KITAVAILABLE
PARTTEMP RANGEPIN-PACKAGE
MAX17122ETL+-40NC to +85NC40 TQFN-EP*
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
IN, IN2, IN3, EN1, EN2, LX1, GATE,
DRVP, RHVS to AGND ......................................-0.3V to +22V
GATE to IN ...........................................................-6.5V to +0.3V
GND1 to AGND .................................................................Q0.3V
DLY1, DLY2, DEL, VL, RESET, GPGD,
HVS to AGND ......................................................-0.3V to +6V
FBP, FBN, FB1, FB2, FB3, COMP1, COMP3, OUTB
SET, NTC, SS to AGND .........................-0.3V to (VVL + 0.3V)
DRVN to VL ...........................................................-36V to +0.3V
LX2 to GND1 ............................................-0.3V to (VIN2 + 0.3V)
LX3 to IN3 ..............................................................-36V to +0.3V
BST2 to VL .............................................................-0.3V to +22V
BST2 to LX2 .............................................................-0.3V to +6V
RMS LX1, GND1, IN2, IN3, LX3 Current (each pin) ............1.6A
RMS LX2 (total for both pins) ...............................................2.4A
RMS VL, DRVN, DRVP Current ..........................................50mA
Continuous Power Dissipation (TA = +70NC)
40-Pin Thin QFN
(derate 35.7mW/NC above +70NC) .........................2857.1mW
Operating Temperature Range ..........................-40NC to +85NC
Junction Temperature .....................................................+160NC
Storage Temperature Range ............................-65NC to +165NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VIN = VIN2 = VIN3 = 12V, TA = 0°C to +85°C. Typical values are at TA = +25NC, unless otherwise noted.)
ABSOLUTE MAXIMUM RATINGS
PARAMETERCONDITIONSMINTYPMAXUNITS
GENERAL
IN, IN2, IN3
Input-Voltage Range816.5V
IN + IN2 + IN3
Quiescent Current
Only LX2 and LX3 switching (VFB1 = VFBP = 1.5V, VFB2 =
1.1V, VFB3 = 1.8V, VFBN = 1.5V); VEN1 = VEN2 = 5V1015LX2 and LX3 not switching (VFB1 = VFB2 = VFBP = 1.5V,
VFBN = 1.5V, VFB3 = 0); VEN1 = VEN2 = 5V24
IN + IN2 + IN3
Shutdown CurrentEN1 = EN2 = AGND (shutdown)0.551mA
SMPS Operating Frequency638750862kHz
Phase Difference Between
Regulators
Step-down and boost-buck180DegreesStep-down and step-up180
IN Undervoltage-Lockout
ThresholdVIN rising, 2.5% hysteresis678V
VL REGULATOR
VL Output Voltage IVL = 10mA, VFB1 = VFB2 = VFBP = 1.1V, VFBN = 0.75V,
VFB3 = 1.8V (all regulators switching) 4.95.05.1V
VL Undervoltage-Lockout
ThresholdVL rising, 2.5% hysteresis3.64.04.4V
STEP-DOWN REGULATOR
OUTB Voltage in Fixed Mode FB2 = AGND, no load (Note 1)TA = +25NC3.2673.3003.333V0NC < TA < +85NC3.253.35
FB2 Voltage in Adjustable Mode VOUTB = 3.3V, no load (Note 1)TA = +25NC1.23751.2501.2625V0NC < TA < +85NC1.231.27
FB2 Adjustable-Mode
Threshold VoltageDual-mode comparator0.100.150.20V
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = VIN2 = VIN3 = 12V, TA = 0°C to +85°C. Typical values are at TA = +25NC, unless otherwise noted.)
PARAMETERCONDITIONSMINTYPMAXUNITS
Output Voltage Adjust RangeStep-down output1.53.6V
FB2 Fault-Trip LevelFalling edge 0.961.01.04V
FB2 Input-Bias CurrentVFB2 = 1.5V 50125200nA
DC Load Regulation0.4A < ILOAD < 2A0.5%
DC Line RegulationNo load, 10.8V < VIN2 < 13.2V0.1%/V
LX2-to-IN2 nMOS Switch
On-Resistance 200400mI
LX2-to-GND1 nMOS Switch
On-Resistance 61024I
BST2-to-VL pMOS Switch
On-Resistance 61224I
Low-Frequency Operation
OUTB Threshold LX2 only0.8V
Low-Frequency Operation
Switching Frequency188kHz
LX2 Positive Current Limit2.53.03.5A
Soft-Start Ramp TimeZero to full limit3ms
Maximum Duty Factor687582%
BOOST-BUCK REGULATOR
FB3 Regulation VoltageNo load, VNTC = 2VTA = +25NC1.631.651.67V0NC < TA < +85NC1.621.651.68
FB3 Input-Bias CurrentVFB3 = 0.5V-50-125-210nA
FB3 Pulldown ResistanceEN1 = AGND3001200I
FB3 Fault-Trip LevelRising edge1.92.02.1V
DC Load Regulation0A < ILOAD < 400mA0.3%
DC Line RegulationNo load, 10.8V < VIN2 < 13.2V0.1%/V
LX3-to-IN3 pMOS Switch
On-Resistance 200400mI
LX3 Positive Current LimitDuty cycle = 60%1.82.12.4A
Soft-Start Ramp TimeZero to full limit3ms
Maximum Duty Factor858994%
NTC, SET Current0NC < TA < +25NC98100102FA+25NC < TA < +85NC100
NTC, SET Effective Voltage
Range
0NC < TA < +25NC0.11.65V+25NC < TA < +85NC0.31.65
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = VIN2 = VIN3 = 12V, TA = 0°C to +85°C. Typical values are at TA = +25NC, unless otherwise noted.)
PARAMETERCONDITIONSMINTYPMAXUNITS
STEP-UP REGULATOR
Output-Voltage RangeVIN20V
Oscillator Maximum Duty Cycle707683%
FB1 Regulation VoltageVFB1 = COMP, CCOMP = 1nFTA = +25NC1.23751.2501.2625V0NC < TA < +85NC1.231.27
FB1 Output Undervoltage
Fault Trip LevelFalling edge 0.961.01.04V
FB1 Output Short Trip LevelFalling edge 0.350.3750.4V
FB1 Load Regulation0 < ILOAD < full, transient only-1%
FB1 Line Regulation 10.8V < VIN < 13.2V0.080.15%/V
FB1 Input-Bias Current VFB1 = 2V 10125200nA
FB1 TransconductanceDI = Q2.5FA at COMP, FB1 = COMP150320560FS
FB1 Voltage GainFB1 to COMP3500V/V
LX1 Bias CurrentVFB1 = 1.5V, VLX1 = 20V1040FA
LX1 Current LimitVFB1 = 1.1V, duty cycle = 25%3.94.55.1A
Current-Sense Transresistance0.160.230.3V/A
LX1 On-Resistance100200mI
SS Full Output Level1.25V
SS Charge Current6912FA
POSITIVE CHARGE-PUMP LINEAR REGULATOR (DRVP)
FBP Regulation VoltageIDRVP = 1.35mATA = +25NC 1.23751.2501.2625V0NC < TA < +85NC1.231.27
FBP Input-Bias CurrentVFBP = 1.25V-50+50nA
FBP Effective Load-Regulation
Error (Transconductance)VDRVP = 15V, IDRVP = 0.6mA to 6mA1530mV
DRVP Sink CurrentVDRVP = 15V, VFBP = 1.1V1030mA
DRVP Off-Leakage CurrentVDRVP = 15V, VFBP = 1.5V0.110FA
FBP Fault-Trip LevelFalling edge 0.961.01.04V
Positive Regulator Soft-Start
Period
7-bit voltage ramp with filtering to prevent high peak
currents3ms
NEGATIVE LINEAR-REGULATOR CONTROLLER (DRVN)
FBN Regulation VoltageIDRVN = 1.35mATA = +25NC0.98511.015V0NC < TA < +85NC0.9811.02
FBN Input-Bias Current-50+50nA
FBN Pulldown ResistanceEN1 = AGND2501000I
FBN Fault-Trip LevelFalling edge0.450.50.55V
FBN Effective Load-Regulation
Error (Transconductance)VDRVN = -7.5V, IDRVN = 0.6mA to 6mA2346mV
DRVN Source CurrentVDRVN = -7.5V, VFBN = 0.85V10mA
DRVN Off-Leakage CurrentVDRVN = -7.5V, VFBN = 1.15V40FA
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = VIN2 = VIN3 = 12V, TA = 0°C to +85°C. Typical values are at TA = +25NC, unless otherwise noted.)
PARAMETERCONDITIONSMINTYPMAXUNITS
POWER-GOOD BLOCKS
FB2 Power-Good Threshold FB2 rising0.9751.001.025V
FB2 Threshold Hysteresis12mV
RESET Output Low VoltageIRESET = 1mA0.4V
RESET Leakage CurrentVRESET = 3V1FA
FBP Power-Good Threshold FBP rising1.11.151.2V
FBP Threshold Hysteresis125mV
GPGD Output Low VoltageIGPGD = 1mA0.4V
GPGD Leakage CurrentVGPGD = 3V1FA
GATE FUNCTION
GATE Pulldown CurrentGATE charging current0.15mAGate done current0.62
GATE Drive VoltageVIN2 - VGATE, GATE enabled5.05.355.65V
GATE Pullup ResistanceGATE off, to IN225I
HVS BLOCK
HVS Input Low Voltage0.6V
HVS Input High Voltage1.85V
HVS Input Pulldown Resistance 1MI
RHVS Output ResistanceIRHVS = 4mA25I
SEQUENCE CONTROL
EN1, EN2, DLY1, DLY2, DEL
Charge CurrentMeasured at 1V68.511FA
EN1, EN2, DLY1, DLY2, DEL
Turn-On Threshold1.251.30V
EN1, EN2 Discharge Switch
On-ResistanceVL < UVLO or fault tripped50I
DLY1, DLY2, DLP Discharge
Switch On-ResistanceEN1 = low or fault tripped10I
FAULT DETECTION
Duration to Trigger Fault50ms
Duration to Restart After Fault160ms
Thermal-Shutdown ThresholdTypical hysteresis = 15NC+160NC
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VIN = VIN2 = VIN3 = 12V, TA = -40°C to +85°C.) (Note 2)
PARAMETERCONDITIONSMINTYPMAXUNITS
GENERAL
IN, IN2, IN3
Input-Voltage Range816.5V
IN + IN2 + IN3
Quiescent Current
Only LX2 and LX3 switching (VFB1 = VFBP = 1.5V, VFB2 =
1.1V, VFB3 = 1.8V, VFBN = 1.5V); VEN1 = VEN2 = 5V15mA
IN + IN2 + IN3
Quiescent Current
LX2 and LX3 not switching (VFB1 = VFB2 = VFBP = 1.5V,
VFBN = 1.5V, VFB3 = 0); VEN1 = VEN2 = 5V4mA
IN + IN2 + IN3
Shutdown CurrentEN1 = EN2 = AGND (shutdown)1mA
SMPS Operating Frequency638862kHz
IN Undervoltage-Lockout
ThresholdVIN rising, 2.5% hysteresis68V
VL REGULATOR
VL Output Voltage IVL = 10mA, VFB1 = VFB2 = VFBP = 1.1V, VFBN = 0.75V,
VFB3 = 1.8V (all regulators switching) 4.95.1V
VL Undervoltage-Lockout
ThresholdVL rising, 2.5% hysteresis3.64.4V
STEP-DOWN REGULATOR
OUTB Voltage in Fixed Mode FB2 = AGND, no load (Note 1)-40NC < TA < +85NC3.253.35V
FB2 Voltage in Adjustable Mode VOUTB = 3.3V, no load (Note 1)-40NC < TA < +85NC1.231.27V
FB2 Adjustable-Mode
Threshold VoltageDual-mode comparator0.100.20V
Output Voltage Adjust RangeStep-down output1.53.6V
FB2 Fault-Trip LevelFalling edge 0.961.04V
FB2 Input-Bias CurrentVFB2 = 1.5V 50200nA
LX2-to-IN2 nMOS Switch
On-Resistance 400mI
LX2-to-GND1 nMOS Switch
On-Resistance 624I
BST2-to-VL pMOS Switch
On-Resistance 624I
LX2 Positive Current Limit2.53.5A
Maximum Duty Factor6882%
BUCK-BOOST REGULATOR
FB3 Regulation VoltageNo load, VNTC = 2V-40NC < TA < +85NC1.621.68V
FB3 Input-Bias CurrentVFB3 = 0.5V-50-210nA
FB3 Pulldown ResistanceEN1 = AGND3001200I
FB3 Fault-Trip LevelRising edge1.92.1V
LX3-to-IN3 pMOS Switch
On-Resistance 400mI
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = VIN2 = VIN3 = 12V, TA = -40°C to +85°C.) (Note 2)
PARAMETERCONDITIONSMINTYPMAXUNITS
LX3 Positive Current LimitDuty cycle = 60%1.82.4A
Maximum Duty Factor8594%
NTC, SET Current-40NC < TA < +25NC97104FA
NTC, SET Effective Voltage
Range
0NC < TA < +25NC0.11.65V+25NC < TA < +85NC0.31.65
STEP-UP REGULATOR
Output-Voltage RangeVIN20V
Oscillator Maximum Duty Cycle7083%
FB1 Regulation VoltageFB1 = COMP, CCOMP = 1nF-40NC < TA < +85NC1.231.27V
FB1 Output Undervoltage
Fault-Trip LevelFalling edge 0.961.04V
FB1 Output Short-Trip LevelFalling edge 0.350.4V
FB1 Line Regulation 10.8V < VIN < 13.2V0.15%/V
FB1 Input-Bias Current VFB1 = 2V 10200nA
FB1 TransconductanceDI = Q2.5FA at COMP, FB1 = COMP150560FS
LX1 Bias CurrentVFB1 = 1.5V, VLX1 = 20V40FA
LX1 Current LimitVFB1 = 1.1V, duty cycle = 25%3.95.1A
Current-Sense Transresistance0.160.3V/A
LX1 On-Resistance200mI
SS Charge Current612FA
POSITIVE CHARGE-PUMP LINEAR REGULATOR (DRVP)
FBP Regulation VoltageIDRVP = 1.35mA-40NC < TA < +85NC1.231.27V
FBP Input-Bias CurrentVFBP = 1.25V-50+50nA
FBP Effective Load-Regulation
Error (Transconductance)VDRVP = 15V, IDRVP = 0.6mA to 6mA30mV
DRVP Sink CurrentVDRVP = 15V, VFBP = 1.1V1030mA
DRVP Off-Leakage CurrentVDRVP = 15V, VFBP = 1.5V10FA
FBP Fault-Trip LevelFalling edge 0.961.04V
NEGATIVE LINEAR-REGULATOR CONTROLLER (DRVN)
FBN Regulation VoltageIDRVN = 1.35mA-40NC < TA < +85NC0.981.02V
FBN Input-Bias Current-50+50nA
FBN Pulldown ResistanceEN1 = AGND2501000I
FBN Fault-Trip LevelFalling edge0.450.55V
FBN Effective Load-Regulation
Error (Transconductance)VDRVN = -7.5V, IDRVN = 0.6mA to 6mA46mV
DRVN Source CurrentVDRVN = -7.5V, VFBN = 0.85V10mA
DRVN Off-Leakage CurrentVDRVN = -7.5V, VFBN = 1.15V40FA
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = VIN2 = VIN3 = 12V, TA = -40°C to +85°C.) (Note 2)
Note 1: When the inductor is in continuous conduction (EN2 = VL or heavy load), the output voltage has a DC regulation level
lower than the error-comparator threshold by 50% of the output-voltage ripple. In discontinuous conduction (light load),
the step-down regulator’s output voltage has a DC regulation level higher than the error-comparator threshold by up to
50% of the output-voltage ripple.
Note 2: Specifications to -40NC are guaranteed by design, not production tested.
PARAMETERCONDITIONSMINTYPMAXUNITS
POWER-GOOD BLOCKS
FB2 Power-Good Threshold FB2 rising0.9751.025V
RESET Output Low VoltageIRESET = 1mA0.4V
RESET Leakage CurrentVRESET = 3V1FA
FBP Power-Good Threshold FBP rising1.11.2V
GPGD Output Low VoltageIGPGD = 1mA0.4V
GPGD Leakage CurrentVGPGD = 3V1FA
GATE FUNCTION
GATE-Drive VoltageVIN2 - VGATE, GATE enabled5.05.65V
HVS BLOCK
HVS Input Low Voltage0.6V
HVS Input High Voltage1.85V
SEQUENCE CONTROL
EN1, EN2, DLY1, DLY2, DEL
Charge CurrentMeasured at 1V611FA
EN1, EN2, DLY1, DLY2, DEL
Turn-On Threshold1.30V
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
STEP-DOWN REGULATOR EFFICIENCY
vs. LOAD CURRENT
MAX17122 toc01
LOAD CURRENT (A)
EFFICIENCY (%)
VIN = 10V
VIN = 12V
STEP-DOWN REGULATOR NORMALIZED
OUTPUT VOLTAGE vs. LOAD CURRENT
MAX17122 toc02
LOAD CURRENT (A)
OUTPUT-VOLTAGE ERROR (%)
VIN = 12V
VIN = 10V
STEP-DOWN REGULATOR LOAD-TRANSIENT
RESPONSE (0.2A TO 1.7A)
MAX17122 toc03
VOUTB
(AC-COUPLED)
200mV/div
ILOAD
1A/div
IL2
1A/div0A
L = 4.7µH
20µs/div
STEP-UP REGULATOR EFFICIENCY
vs. LOAD CURRENT
MAX17122 toc04
LOAD CURRENT (A)
EFFICIENCY (%)0.10
VIN = 12V
VIN = 10V
STEP-UP REGULATOR NORMALIZED
OUTPUT VOLTAGE vs. LOAD CURRENT
MAX17122 toc05
LOAD CURRENT (A)
OUTPUT-VOLTAGE ERROR (%)
VIN = 10V
VIN = 12V
STEP-UP REGULATOR LOAD-TRANSIENT
RESPONSE (0.2A TO 1.2A)
MAX17122 toc06
VAVDD
(AC-COUPLED)
200mV/div
ILOAD
1A/div
IL1
1A/div
L1 = 4.7µH
CCOMP1 = 330pF
40µs/div
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
STEP-UP REGULATOR PULSED
LOAD-TRANSIENT
RESPONSE (0.2A TO 2.2A)
MAX17122 toc07
VAVDD
(AC-COUPLED)
200mV/div
ILOAD
1A/div
IL1
1A/div
L1 = 4.7µH
CCOMP1 = 330pF
RCOMP1 = 39.2kI
CCOMP1P = 10pF
10µs/div
STEP-UP REGULATOR
STARTUP SEQUENCE
MAX17122 toc08
VAVDD
10V/div
VGATE
10V/div
VLX1
10V/div
VEN2
5V/div
4ms/div
STEP-UP REGULATOR PEAK
INDUCTOR CURRENT AT CURRENT
LIMIT vs. INPUT VOLTAGE
MAX17122 toc09
INPUT VOLTAGE (V)
PEAK INDUCTOR CURRENT (A)11109
BOOST-BUCK REGULATOR
EFFICIENCY vs. LOAD CURRENT
MAX17122 toc10
LOAD CURRENT (A)
EFFICIENCY (%)
VIN = 10V
VIN = 12V
BOOST-BUCK REGULATOR NORMALIZED
OUTPUT VOLTAGE vs. LOAD CURRENT
MAX17122 toc11
LOAD CURRENT (A)
OUTPUT-VOLTAGE ERROR (%)
VIN = 12V
VIN = 10V
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
BOOST-BUCK REGULATOR OUTPUT
TEMPERATURE COMPENSATION
MAX17122 toc14
TEMPERATURE (°C)
OUTPUT VOLTAGE (V)40200-20
BOOST-BUCK REGULATOR
LOAD-TRANSIENT
RESPONSE (40mA TO 380mA)
MAX17122 toc12
VGOFF2
(AC-COUPLED)
200mV/div
ILOAD
200mA/div0A
L3 = 22µH
CCOMP3 = 470pF
RCOMP3 = 47.5kI
CCOMP3P = 10pF
100µs/div
POSITIVE CHARGE-PUMP
REGULATOR LOAD-TRANSIENT
RESPONSE (0A TO 100mA)
MAX17122 toc16
VGON
(AC-COUPLED)
1V/div
ILOAD
50mA/div
VAVDD = 16.5V
IAVDD = 350mA
40µs/div
BOOST-BUCK REGULATOR PEAK
INDUCTOR CURRENT AT CURRENT
LIMIT vs. INPUT VOLTAGE
MAX17122 toc13
INPUT VOLTAGE (V)
PEAK INDUCTOR CURRENT (A)1291011
POSITIVE CHARGE-PUMP REGULATOR
NORMALIZED LOAD REGULATION
MAX17122 toc15
LOAD CURRENT (mA)
OUTPUT-VOLTAGE ERROR (%)
VIN = 10V
VIN = 12V
VAVDD = 16.5V
IAVDD = 350mA
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
NEGATIVE LINEAR REGULATOR
LOAD-TRANSIENT
RESPONSE (0A TO 100mA)
MAX17122 toc18
VGOFF1
(AC-COUPLED)
100mV/div
ILOAD
50mA/div0A
20µs/div
POWER-UP SEQUENCE OF
ALL SUPPLY OUTPUTS
MAX17122 toc19
VGOFF2
VGOFF1
VAVDD
VGON
VEN2
VOUTB
VEN1
VIN
0V, 0V
10ms/divVIN = 10V/div
VEN1 = 5V/div
VOUTB = 5V/div
VEN2 = 5V/div
VGON = 10V/div
VAVDD = 10V/div
VGOFF1 = 5V/div
VGOFF2 = 10V/div
RESET FUNCTION
MAX17122 toc20
VRESET
2V/div
VDEL
1V/div
VOUTB
2V/div
4ms/div
NEGATIVE LINEAR REGULATOR
NORMALIZED LOAD REGULATION
MAX17122 toc17
LOAD CURRENT (mA)
OUTPUT-VOLTAGE ERROR (%)
-0.5500
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
Pin Description
PINNAMEFUNCTIONGATE
External p-Channel MOSFET Control Output. When the step-up regulator is enabled, GATE
pulls down to control the step-up output during its soft-start. Once GATE is fully on, the step-up
regulator begins switching to regulate the final portion of its soft-start. INInput of the Internal 5V Linear Regulator and the Startup Circuitry. Bypass IN to AGND with 0.22FF
close to the IC.
3, 4IN2Step-Down Regulator Power Input. Drain of the internal n-channel MOSFET connected between
IN2 and LX2.
5, 24AGNDAnalog Ground
6, 7LX2
Step-Down Regulator Switching Node. LX2 is the source of the internal n-channel MOSFET
connected between IN2 and LX2. Connect the inductor and Schottky catch diode to LX2 and mini-
mize the trace area for low EMI.BST2Step-Down Regulator Bootstrap Capacitor Connection for High-Side Gate Driver. Connect a 0.1FF
ceramic capacitor from BST2 to LX2.OUTBStep-Down Regulator Output-Voltage Sense Input. Connect OUTB to the step-down regulator
output.FB2
Step-Down Regulator Feedback Input. Connect FB2 to AGND to select the step-down converter’s
3.3V fixed mode. For adjustable mode, connect FB2 to the center of a resistive voltage-divider
between the step-down regulator output and AGND to set the step-down regulator output voltage.
Place the resistive voltage-divider within 5mm of FB2.GPGD
GON Power-Good Signal Open-Drain Output. GPGD is connected to AGND whenever VFBP is less
than the VFBP power-good threshold. GPGD is high impedance whenever VFBP is greater than the
threshold.DLY1
Step-Up Regulator Delay Input. Connect a capacitor from DLY1 and AGND to set the delay time
between EN2’s rise and the step-up regulator’s soft-start. An 8FA current source charges CDLY1.
DLY1 is internally pulled to AGND whenever either EN1 or EN2 is low or VL is below its UVLO
threshold.EN1Step-Down Enable Input. An 8FA current source charges the capacitor at EN1. When EN1 is high,
the step-down regulator begins operating. EN2
Step-Up and Positive Charge-Pump Linear Regulator Enable Input. Negative linear regulator and
boost-buck regulator enable input. An 8FA current source charges the capacitor at EN2. When
EN2 is high, DLY1 and DLY2 begin charging. DLY1 starts GATE, which turns on the external
p-channel MOSFET and the step-up regulator. DLY2 starts the positive charge-pump linear regula-
tor. EN2 is inactive until after the step-down regulator soft-start is finished.HVSHigh-Voltage Stress Mode Control Input. When HVS is high, the RHVS open-drain output connects
to AGND. RHVS is high impedance when HVS is low.FBN
Negative Linear-Regulator Controller Feedback Input. Connect FBN to the center of a resistive
voltage-divider between the negative output and a 3.3V reference to set the negative charge-
pump regulator output voltage. Place the resistive voltage-divider within 5mm of FBN.
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
Pin Description (continued)
PINNAMEFUNCTIONSS
Step-Up Regulator Soft-Start Input. Connect a capacitor at SS to control the step-up regulator soft-
start ramp time. The capacitor charge current is 10FA and the SS voltage ramps from 0 to 1.25V
for a zero-to-full-scale regulated output.DRVN
GOFF1 Negative Linear-Regulator Controller Base-Drive Output. Open drain of an internal
p-channel MOSFET. Connect DRVN to the base of the external npn output transistor as shown
in the typical operating circuit (Figure 1). The buffer can source current from ground to GOFF2
to maintain a regulated voltage on GOFF1 as measured at FBN.DLY2
Positive Charge-Pump Linear-Regulator Delay Input. Connect a capacitor from DLY2 to AGND to
set the delay time between the step-up regulator and the startup of the positive charge pump. An
8FA current source charges CDLY2. DLY2 is internally pulled to AGND until the step-down soft-
start is finished or when either EN1 or EN2 is low or VL is below its UVLO threshold.FBP
Positive Charge-Pump Linear-Regulator Feedback Input. Connect FBP to the center of a resistive
voltage-divider between the positive charge-pump output and AGND to set the positive charge-
pump output voltage. Place the resistive voltage-divider within 5mm of FBP.DRVP
Positive Charge-Pump Linear-Regulator Controller Base-Drive Output. Open drain of an internal
n-channel MOSFET. Connect DRVP to the base of the external pnp transistor as shown in the
typical operating circuit (Figure 1). The buffer can source current from AVDD to the charge-pump
diodes to maintain a regulated voltage on GON as measured at FBP.RESET
Open-Drain Power-Good Output. Monitors the step-down output voltage. RESET is connected to
AGND whenever the internal feedback voltage is less than its power-good threshold and DEL is
less than 1.25V. RESET is high impedance whenever the internal feedback voltage is greater than
the threshold and DEL is greater than 1.25V.DELPower-Good Reset Timing Pin. Connect a capacitor from DEL to AGND to set the step-down
output-rising RESET delay. An 8FA current source charges CDEL.SET
GOFF2 Cold-Temperature Reference-Voltage Input. Connect a resistor from SET to AGND to set
the cold-temperature GOFF2 reference level. The SET output current is 100FA (typ). Leave SET
unconnected or connect to 3.3V if GOFF2 temperature compensation is not used.NTC
Thermistor Network Connection Input. Connect a network including a thermistor from NTC to
AGND to control the temperature behavior of the GOFF2 output voltage. If thermal compensation
is not used, NTC may be left unconnected or connected to AGND.FB3
GOFF2 Regulator Feedback Input. FB3 regulates at 1.65V nominal and can vary from 0.1V to
1.65V with temperature according to the voltages on SET and NTC. Connect FB3 to the center of
a resistive voltage-divider between the regulator output and a 3.3V reference to set the GOFF2
regulator output voltage. COMP3Compensation Pin for the Boost-Buck Error Amplifier. Connect a series resistor and capacitor from
COMP3 to AGND. Typical values are 5kI and 4.7nF.
29, 36N.C.No Connection. Not internally connected.LX3
GOFF2 Boost-Buck Regulator Switching Node. LX3 is the source of the internal n-channel
MOSFET connected between IN3 and LX3. Connect the inductor and Schottky catch diode to LX3
and minimize the trace area for low EMI.
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
Pin Description (continued)
PINNAMEFUNCTIONIN3Boost-Buck Regulator Power Input. Drain of the internal p-channel MOSFET connected between
IN3 and LX3. RHVSHigh-Voltage Stress Mode Output. When HVS is high, the RHVS open-drain output connects to
AGND. RHVS is high impedance when HVS is low.FB1
Boost Regulator Feedback Input. Connect FB1 to the center of a resistive voltage-divider between
the step-up regulator output and AGND to set the step-up regulator output voltage. Place the
resistive voltage-divider within 5mm of FB1.COMP1Compensation Pin for the Step-Up Error Amplifier. Connect a series resistor and capacitor from
COMP1 to AGND. Typical values are 40kI and 330pF.VL
5V Internal Linear-Regulator Output. Bypass VL to AGND with 1FF minimum. Provides power for
the internal MOSFET driving circuits, the PWM controllers, charge-pump regulators, logic and
references, and other analog circuitry. Provides 25mA load current when all switching regulators
are enabled. VL is active whenever IN is above its UVLO threshold.
37, 38LX1
Step-Up Regulator Switching Node. LX1 is the drain of the internal n-channel MOSFET connected
between LX1 and PGND. Connect the inductor and Schottky catch diode to both LX1 pins and
minimize the trace area for low EMI.
39, 40GND1Step-Up Regulator Power Ground. Source of the internal power n-channel MOSFET.EPExposed Pad. Connect EP to the ground plane to maximize thermal dissipation.
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
Typical Operating Circuit
The typical operating circuit (Figure 1) of the MAX17122
is a complete power-supply system for TFT LCD TV
panels. The circuit generates a +3.3V logic supply, a
+15V source driver supply, a +28V positive gate-driver
supply, and a negative gate-driver supply that is derived
linearly between -7.5V and -12V. Table 1 lists some
selected components and Table 2 lists the contact infor-
mation of component suppliers.
MAX17122
IN2
BST2
OUTB
GOFF1
-7.5V
100mA
0.1µF
16V
22µF
16V22µF6.3V
0.22µF
25V
1µF
10V2.2µF16V22µF25V22µF x 225V
30V1µF50V
1µF
25V
22µH
1.6A
FROM SYSTEM
50V
INCP
(AVDD)
GON
28V
100mA
GOFF2
-12V ~ -20V
450mA
AVDD
FROM
SYSTEM
3.3V
POWER_GOODVGON
POWER_GOODCDEL
CSS
3.3V
3.3V
22.1kI
181kI
RHVS
324kI
33kI
365kI
4.7µH
3.5A
20V
100mIC8
22nF
15V
2.2A
NTC
10kI
RSET
7.5kI
CCOMP3P
10pF
CCOMP3
470pF
CCOMP1
330pF
CCOMP1P
10pF
RCOMP3
5kI
RCOMP1
40kI
8.2kI
47kIP1
81.7kIR5
226kI
510ILX1
10.5kI
10kI
22.1kI
VGOFF2
510I
3.3V
30V
10I
(OPTIONAL)
4.7µH
3.5A
GATE
IN2
LX2
LX2
OUTB
FB2
AGND
AGND
EN1
EN2
DLY1
DLY2
RESET
DEL
DRVN
DRVP
GPGD
NTC
SET
COMP3
FB3
LX3
HVS
IN3
RHVS
COMP1
FB1
GND1
GND1
LX1
LX1
FBNSSFBP
12V
22µF
16V
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
Detailed Description
The MAX17122 is a multiple-output power supply
designed primarily for TFT LCD TV panels. It contains
a step-down switching regulator to generate the supply
for system logic, a step-up switching regulator to gener-
ate the supply for source-driver ICs, a linear-controlled
positive charge-pump regulator to generate the supply
for TFT positive gate drivers, a boost-buck regulator, and
a negative linear regulator to generate the supply for TFT
negative gate drivers.
Each switching regulator features adjustable output volt-
They all use fixed-frequency (750kHz) current-mode
control architectures. The step-up regulator switches
in-phase with a boost-buck regulator while 180N out-of-
phase with a step-down regulator to minimize the input
ripple and noise coupling.
The boost-buck regulator also features a temperature-com-
pensated output so it can vary according to the tempera-
ture sensed by an external NTC thermistor. The step-down
regulator also features an adjustable-delay, open-drain,
power-good output. A simple untimed output monitors the
positive charge-pump linear regulator’s feedback.
Table 1. Component List
Table 2. Component Suppliers
DESIGNATIONDESCRIPTION
C1, C7
22FF Q20%, 16V X5R ceramic capaci-
tors (1206)
Murata GRM31CR61C226M
Taiyo Yuden EMK316BJ226M
C2, C3
22FF Q20%, 25V X5R ceramic capaci-
tors (1210)
Murata GRM32ER61E226K
Murata GRM32ER61E226M
1FF Q10%, 50V X7R ceramic capacitor
(1206)
Murata GRM31MR71H105KA
TDK C3216X7R1H105K
22FF Q20%, 6.3V X5R ceramic capacitor
(0805)
Murata GRM21BR60J226M
TDK C2012X5R0J226K
2.2FF Q10%, 16V X5R ceramic capacitor
(0603)
Murata GRM188R61C225K
TDK C1608Y5V1C225ZT
D1, D2Schottky diodes 30V, 3A (M Flat)
Toshiba CMS02
DESIGNATIONDESCRIPTION
Schottky diode 50V, 1A (SMA)
Fairchild SS15
Diodes Inc. B150
Small-signal diode (SOT23)
Fairchild BAT54S
Diodes Inc. BAT54S
L1, L2
Inductors, 4.7FH, 3.5A
TOKO FDV0620-4R7M
Sumida CDRH6D26HPNP-4R7P
NEC MPLC0730L4R7Inductor, 22FH, 1.6A
Sumida CDRH8D28NP-220N
High-gain, 25V npn transistor (DPAK)
Fairchild KSH200
ON Semi MJD200
High gain, -25V pnp transistor (DPAK)
Fairchild KSH210
ON Semi MJD210
-30V, 0.056I p-channel MOSFET (6-pin
SC70 PowerPAK)
Vishay SiA421DJ
SUPPLIERPHONEFAXWEBSITE
Diodes Incorporated805-446-4800805-446-4850www.diodes.com
Fairchild Semiconductor408-822-2000408-822-2102www.fairchildsemi.com
Murata Electronics North America, Inc.770-436-1300770-436-3030www.murata-northamerica.com
ON Semiconductor888-743-7826—www.onsemi.com
Sumida Corp.847-545-6700847-545-6720www.sumida.com
TDK Corp.847-803-6100847-390-4405www.component.tdk.com
Toshiba America Electronic Components, Inc.949-455-2000949-859-3963www.toshiba.com/taec
Step-Up, Step-Down Regulator, Gate-On Charge Pump,
and Boost-Buck Regulator for TV TFT LCD Display
MAX17122
In addition, the MAX17122 features an internal 5V lin-
ear regulator, well-defined power-up and power-down
sequences, and fault and thermal-overload protection.
Figure 2 shows the MAX17122’s functional diagram.
AVDD
GOFF2
GON
LX1
INCP
(AVDD)
VGON
POWER_
GOOD
3.3V
3.3V
FROM
SYSTEM
STEP-DOWN
GATEBST2
OSCSTEP-DOWN
HVS CONTROL
BOOST-BUCK
VGON PGOOD
POWER_
GOOD
FROM
SYSTEM
FBP
POSITIVE REG
DRVP
GPGD
NTC
SET
COMP3
FB3
LX3
IN3
RHVS
HVS
COMP1
FB1
GND1
LX1
STEP-
DOWN FB
150mV
SEQUENCE
STEP-DOWN
3.3V PGOOD
NEGATIVE REG
FBNFBP
IN2
LX2
OUTB
FB2
AGND
EN1
EN2
DLY1
DLY2
RESET
DEL
3.3V
DRVN
3.3V
VGOFF2
OUTB
GOFF1
MAX17122
