MAX17017GTM+T ,Quad-Output Controller for Low-Power ArchitectureELECTRICAL CHARACTERISTICS(Circuit of Figure 1 (step-down), V = 12V, V = V = V = V = V = V = V = 5V ..
MAX1701EEE ,1-Cell to 3-Cell / High-Power 1A / Low-Noise / Step-Up DC-DC ConvertersFeaturesThe MAX1700/MAX1701 are high-efficiency, low-noise,' Up to 96% Efficiencystep-up DC-DC conv ..
MAX1701EEE ,1-Cell to 3-Cell / High-Power 1A / Low-Noise / Step-Up DC-DC ConvertersELECTRICAL CHARACTERISTICS(CLK/SEL = ONA = ONB = FB = PGND = GND, OUT = POUT, V = 3.6V (Note 6); MA ..
MAX1701EEE ,1-Cell to 3-Cell / High-Power 1A / Low-Noise / Step-Up DC-DC ConvertersApplicationsDigital Cordless Phones Personal CommunicatorsINPUTPCS Phones Palmtop Computers0.7V TO ..
MAX1701EEE+ ,1 Cell to 3 Cell, High-Power 1A, Low-Noise, Step-Up DC-DC ConvertersApplicationsDigital Cordless Phones Personal CommunicatorsINPUTPCS Phones Palmtop Computers0.7V TO ..
MAX17020ETJ+ ,Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC RegulatorApplications28 13 PGOOD1PGOOD2Notebook ComputersMAX1702029 12SKIP ILIM1Main System Supply (5V and 3 ..
MAX4518CPD+ ,Precision, 4-Channel/Dual 2-Channel, Low-Voltage, CMOS Analog MultiplexersApplicationsPART TEMP. RANGE PIN-PACKAGE MAX4518CPD 0°C to +70°C 14 Plastic DIPSample-and-Hold Circ ..
MAX4518CSD ,Precision, 4-Channel/Dual 2-Channel, Low-Voltage, CMOS Analog MultiplexersGeneral Description ________
MAX4518EEE ,Precision, 4-Channel/Dual 2-Channel, Low-Voltage, CMOS Analog MultiplexersFeaturesThe MAX4518/MAX4519 precision, monolithic, CMOS' Guaranteed On-Resistance Match analog mult ..
MAX4518EEE+ ,Precision, 4-Channel/Dual 2-Channel, Low-Voltage, CMOS Analog MultiplexersFeaturesThe MAX4518/MAX4519 precision, monolithic, CMOS♦ Guaranteed On-Resistance Match analog mult ..
MAX4518EEE+T ,Precision, 4-Channel/Dual 2-Channel, Low-Voltage, CMOS Analog MultiplexersELECTRICAL CHARACTERISTICS—Dual Supplies(V+ = +4.5V to +5.5V, V- = -4.5V to -5.5V, GND = 0V, V = V ..
MAX4518EEE+T ,Precision, 4-Channel/Dual 2-Channel, Low-Voltage, CMOS Analog MultiplexersELECTRICAL CHARACTERISTICS—Dual Supplies(V+ = +4.5V to +5.5V, V- = -4.5V to -5.5V, GND = 0V, V = V ..
MAX17017GTM+-MAX17017GTM+T
Quad-Output Controller for Low-Power Architecture
General DescriptionThe MAX17017 is a quad-output controller for ultra-
mobile portable computers (UMPCs) that rely on a low-
power architecture. The MAX17017 provides a compact,
low-cost controller capable of providing four indepen-
dent regulators—a main stage, a 3AP-P internal step-
down, a 5AP-Pinternal step-down, and a 2A source/sink
linear regulator.
The main regulator can be configured as either a step-
down converter (for 2 to 4 Li+ cell applications) or as a
step-up converter (for 1 Li+ cell applications). The inter-
nal switching regulators include 5V synchronous
MOSFETs that can be powered directly from a single Li+
cell or from the main 3.3V/5V power stages. Finally, the
linear regulator is capable of sourcing and sinking 2A to
support DDR termination requirements or to generate a
fixed output voltage.
The step-down converters use a peak current-mode,
fixed-frequency control scheme—an easy to implement
architecture that does not sacrifice fast-transient
response. This architecture also supports peak current-
limit protection and pulse-skipping operation to maintain
high efficiency under light-load conditions.
Separate enable inputs and independent open-drain
power-good outputs allow flexible power sequencing. A
soft-start function gradually ramps up the output volt-
age to reduce the inrush current. Disabled regulators
enter high-impedance states to avoid negative output
voltage created by rapidly discharging the output
through the low-side MOSFET. The MAX17017 also
includes output undervoltage, output overvoltage, and
thermal-fault protection.
The MAX17017 is available in a 48-pin, 6mm x 6mm
thin QFN package.
Applications1-to-4 Li+ Cell Battery-Powered Devices
Low-Power Architecture
Ultra-Mobile PC (UMPC)
Portable Gaming
Notebook and Subnotebook Computers
PDAs and Mobile Communicators
FeaturesFixed-Frequency, Current-Mode Controllers5.5V to 28V Input Range (Step-Down) or 3V to 5V
Input Range (Step-Up)1x Step-Up or Step-Down Controller1x Internal 5AP-PStep-Down Regulator 1x Internal 3AP-PStep-Down Regulator1x 2A Source/Sink Linear Regulator with Dynamic
REFINInternal BST DiodesInternal 5V, 50mA Linear RegulatorFault Protection—Undervoltage, Overvoltage,
Thermal, Peak Current LimitIndependent Enable Inputs and Power-Good
OutputsVoltage-Controlled Soft-StartHigh-Impedance Shutdown10µA (typ) Shutdown Current
MAX17017
Quad-Output Controller for
Low-Power ArchitectureMAX170173534333231302928272625
CSPA
CSNA
AGND
REF
FREQ
UP/DN
INA
VCC
BYP
LDO5
INLDO
SHDN
ONB
SYNC
ONA
INBC
INBC
INBC
INBC
VDD
POKD
OND
ONC
FBC
POKC
BSTC
LXCLXCLXCLXC
OUTDOUTD
IND
FBD
VTTR
REFIND
FBBPOKBBSTBLXBLXBLXBDLABSTALXADHAPOKAFBA
23456789101112
EXPOSED PAD = GND
TOP VIEW
Pin Configuration
Ordering Information19-4121; Rev 2; 6/09
EVALUATION KIT
AVAILABLE+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
PARTTEMP RANGEPIN-PACKAGEMAX17017GTM+ -40°C to +105°C 48 TQFN-EP*
MAX17017
Quad-Output Controller for
Low-Power Architecture
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(Circuit of Figure 1 (step-down), VINLDO= 12V, VINA = VINBC= VDD= VCC= VBYP= VCSPA= VCSNA= 5V, VIND= 1.8V, VSHDN=
VONA= VONB= VONC= VOND= 5V, IREF= ILDO5 = IOUTD= no load, FREQ = GND, UP/DN = VCC, TA
= 0°C to +85°C, unless other-wise noted. Typical values are at TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
INLDO, SHDNto GND............................................-0.3V to +28V
LDO5, INA, VDD, VCCto GND..................................-0.3V to +6V
DHA to LXA.............................................-0.3V to (VBSTA+ 0.3V)
ONA, ONB, ONC, OND to GND...............................-0.3V to +6V
POKA, POKB, POKC, POKD to GND.........-0.3V to (VCC+ 0.3V)
REF, REFIND, FREQ, UP/DN,
SYNC to GND........................................-0.3V to (VCC+ 0.3V)
FBA, FBB, FBC, FBD to GND.....................-0.3V to (VCC+ 0.3V)
BYP to GND............................................-0.3V to (VLDO5+ 0.3V)
CSPA, CSNA to GND.................................-0.3V to (VCC+ 0.3V)
DLA to GND................................................-0.3V to (VDD+ 0.3V)
INBC, IND to GND....................................................-0.3V to +6V
OUTD to GND............................................-0.3V to (VIND+ 0.3V)
VTTR to GND.............................................-0.3V to (VBYP+ 0.3V)
LXB, LXC to GND....................................-1.0V to (VINBC+ 0.3V)
BSTB to GND....................................(VDD- 0.3V) to (VLXB+ 6V)
BSTC to GND....................................(VDD- 0.3V) to (VLXC+ 6V)
BSTA to GND....................................(VDD- 0.3V) to (VLXA+ 6V)
REF Short-Circuit Current......................................................1mA
Continuous Power Dissipation (TA = +70°C)
Multilayer PCB: 48-Pin 6mm x 6mm2TQFN
(T4866-2 derated 37mW/°C above +70°C) ....................2.9W
Operating Temperature Range.........................-40°C to +105°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s) ................................+300°C
TA = 0°C to +85°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSUP/DN = GND (step-up), INA3.05.0
Input Voltage RangeUP/DN = LDO5 (step-down), INLDO,
INA = LDO55.524V
UP/DN = GND (step-up), INA = INLDO,
rising edge hysteresis = 100mV2.52.72.9
INA Undervoltage ThresholdVINA(UVLO)
UP/DN = LDO5 (step-down), INA = VCC,
rising edge, hysteresis = 160mV4.04.24.4
INBC Input Voltage Range2.35.5V
Minimum Step-Up Startup
VoltageUP/DN = GND (step-up)2.93.0V
SUPPLY CURRENTSVINLDO Shutdown Supply CurrentIIN(SHDN)VIN = 5.5V to 26V, SHDN = GND1015μA
VINLDO Suspend Supply CurrentIIN(SUS)VINLDO = 5.5V to 26V, ON_ = GND,
SHDN = INLDO5080μA
VCC Shutdown Supply CurrentSHDN = ONA = ONB = ONC = OND =
GND, TA = +25°C0.11μA
VDD Shutdown Supply CurrentSHDN = ONA = ONB = ONC = OND =
GND, TA = +25°C0.11μA
INA Shutdown CurrentIINASHDN = ONA = ONB = ONC = OND =
GND, UP/DN = VCC710μA
VCC Supply Current
Main Step-Down Only
ONA = VCC, ONB = ONC = OND = GND;
does not include switching losses,
measured from VCC
210300μA
MAX17017
Quad-Output Controller for
Low-Power Architecture
TA = 0°C to +85°CPARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSC C S up p l y C ur r entai n S tep - D ow n and Reg ul ator B
ONA = ONB = VCC, ONC = OND = GND;
does not include switching losses,
measured from VCC
280350μAC C S up p l y C ur r entai n S tep - D ow n and Reg ul ator C
ONA = ONC = VCC, ONB = OND = GND;
does not include switching losses,
measured from VCC
280350μAC C S up p l y C ur r entai n S tep - D ow n and Reg ul ator D
ONA = OND = VCC, ONB = ONC = GND;
does not include switching losses;
measured from VCC
2.23mA
INA Supply Current (Step-Down)IINAONA = VCC, UP/DN = VCC (step-down)4060μA
IN A + V C C S tep - U p S up p l y C ur r entIINAONA = VCC, UP/DN = GND (step-up)320410μA
5V LINEAR REGULATOR (LDO5)LDO5 Output VoltageVLDO5VINLDO = 5.5V to 26V, ILDO5 = 0 to 50mA,
BYP = GND4.85.05.2V
LDO5 Short-Circuit Current LimitLDO5 = BYP = GND70160250mA
BYP Switchover ThresholdVBYPRising edge4.65V
LDO5-to-BYP Switch ResistanceRBYPLDO5 to BYP, VBYP = 5V, ILDO5 = 50mA1.54_
1.25V REFERENCEReference Output VoltageVREFNo load1.2371.251.263V
Reference Load Regulation_VREFIREF = -1μA to +50μA310mV
Reference Undervoltage LockoutVREF(UVLO)1.0V
OSCILLATORFREQ = VCC500
FREQ = REF750kHzOscillator FrequencyfOSC
FREQ = GND0.91.01.1MHz
fSWAMain step-up/step-down (regulator A)1/2 fOSC
fSWBRegulator BfOSCSwitching Frequency
fSWCRegulator C1/2 fOSC
MHz
Maximum Duty Cycle
(All Switching Regulators)DMAX9093.5%
FREQ = VCC or GND90Minimum On-Time
(All Switching Regulators)tON(MIN)FREQ = REF75ns
REGULATOR A (Main Step-Up/Step-Down)Step-up configuration (UP/DN = GND)3.0VCC +
Output-Voltage Adjust Range
Step-down configuration (UP/DN = VCC)1.0VCC +
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1 (step-down), VINLDO= 12V, VINA = VINBC= VDD= VCC= VBYP= VCSPA= VCSNA= 5V, VIND= 1.8V, VSHDN=
VONA= VONB= VONC= VOND= 5V, IREF= ILDO5 = IOUTD= no load, FREQ = GND, UP/DN = VCC, TA
= 0°C to +85°C, unless other-wise noted. Typical values are at TA= +25°C.) (Note 1)
MAX17017
Quad-Output Controller for
Low-Power Architecture
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1 (step-down), VINLDO= 12V, VINA = VINBC= VDD= VCC= VBYP= VCSPA= VCSNA= 5V, VIND= 1.8V, VSHDN=
VONA= VONB= VONC= VOND= 5V, IREF= ILDO5 = IOUTD= no load, FREQ = GND, UP/DN = VCC, TA
= 0°C to +85°C, unless other-wise noted. Typical values are at TA= +25°C.) (Note 1)
TA = 0°C to +85°CPARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSStep-up configuration (UP/DN = GND),
VCSPA - VCSNA = 0 to 20mV, 90% duty
cycle
FBA Regulation VoltageVFBA
Step-down configuration (UP/DN = VCC),
VCSPA - VCSNA = 0mV, 90% duty cycle0.9680.971.003
Step-up configuration (UP/DN = GND),
VCSPA - VCSNA = 0mV, 90% duty cycle0.9591.013
FBA Regulation Voltage
(Overload)VFBAStep-down configuration (UP/DN = VCC),
VCSPA - VCSNA = 0 to 20mV, 90% duty
cycle
Step-up configuration (UP/DN = GND),
VCSPA - VCSNA = 0 to 20mV-20
FBA Load RegulationΔVFBAStep-down configuration (UP/DN = VCC),
VCSPA - VCSNA = 0 to 20mV-40
Step-up (UP/DN =
GND)51016
FBA Line Regulation
UP/DN = GND
or VCC,
0 to 100% duty
cycle
Step-down (UP/DN
= VCC)101622
FBA Input CurrentIFBAUP/DN = GND or VCC,
TA = +25°C-100-5+100nA
Current-Sense Input Common-
Mode RangeVCSA0VCC +
0.3VV
Current-Sense Input Bias CurrentICSATA = +25°C4060μA
Current-Limit Threshold (Positive)VILIMA182022mV
Idle Mode™ ThresholdVIDLEA4mV
Zero-Crossing ThresholdVIZX1mV
DHA Gate Driver On-ResistanceRDHDHA forced high and low2.55Ω
DLA forced high2.55DLA Gate Driver On-ResistanceRDLDLA forced low1.53Ω
DHA Gate Driver Source/Sink
CurrentIDHDHA forced to 2.5V0.7A
IDL(SRC)DLA forced to 2.5V0.7DLA Gate Driver Source/Sink
CurrentIDL(SNK)DLA forced to 2.5V1.5A
BSTA Switch On-ResistanceRBSTA5Ω
Idle Mode is a trademark of Maxim Integrated Products, Inc.
MAX17017
Quad-Output Controller for
Low-Power Architecture
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1 (step-down), VINLDO= 12V, VINA = VINBC= VDD= VCC= VBYP= VCSPA= VCSNA= 5V, VIND= 1.8V, VSHDN=
VONA= VONB= VONC= VOND= 5V, IREF= ILDO5 = IOUTD= no load, FREQ = GND, UP/DN = VCC, TA
= 0°C to +85°C, unless other-wise noted. Typical values are at TA= +25°C.) (Note 1)
TA = 0°C to +85°CPARAMETERSYMBOLCONDITIONS
MINTYPMAX
UNITS
REGULATOR B (Internal 3A Step-Down Converter)FBB Regulation VoltageILXB = 0% duty cycle (Note 2)0.7470.7550.762V
FBB Reg ul ati on V ol tag e ( Over l oad ) VFBBILXB = 0 to 2.5A, 0% duty cycle (Note 2)0.7200.762V
FBB Load RegulationΔVFBB/ΔILXBILXB = 0 to 2.5A-5mV/A
FBB Line Regulation0 to 100% duty cycle7810mV
FBB Input CurrentIFBBTA = +25°C-100-5+100nA
High-side n-channel75150Internal MOSFET On-ResistanceLow-side n-channel4080mΩ
LXB Peak Current LimitIPKB3.03.454.0A
LXB Idle-Mode Trip LevelIIDLEB0.8A
LXB Zero-Crossing Trip LevelIZXB100mA
LXB Leakage CurrentILXBONB = GND, VLXB = GND or 5V;
VINBC = 5V at TA = +25°C-20+20μA
REGULATOR C (Internal 5A Step-Down Converter)FBC Regulation VoltageILXC = 0A, 0% duty cycle (Note 2)0.7470.7550.762V
FBC Reg ul ati on V ol tag e ( Over l oad ) VFBCILXC = 0 to 4A, 0% duty cycle (Note 2)0.7100.762V
FBC Load RegulationΔVFBC/ΔILXCILXC = 0 to 4A-7mV/A
FBC Line Regulation0 to 100% duty cycle121416mV
FBC Input CurrentIFBCTA = +25°C-100-5+100nA
High-side n-channel50100Internal MOSFET On-ResistanceLow-side n-channel2540mΩ
LXC Peak Current LimitIPKC5.05.756.5A
LXC Idle-Mode Trip LevelIIDLEC1.2A
LXC Zero-Crossing Trip LevelIZXC100mA
LXC Leakage CurrentILXCONC = GND, VLXC = GND or 5V;
VINBC = 5V at TA = +25°C-20+20μA
REGULATOR D (Source/Sink Linear Regulator and VTTR Buffer)IND Input Voltage RangeVIND12.8V
IND Supply CurrentOND = VCC1050μA
IND Shutdown CurrentOND = GND, TA = +25°C10μA
REFIND Input Range0.51.5V
REFIND Input Bias CurrentVREFIND = 0 to 1.5V, TA = +25°C-100+100nA
OUTD Output Voltage RangeVOUTD0.51.5V
VFBD with respect to VREFIND, OUTD =
FBD, IOUTD = +50μA (source load)-100
FBD Output AccuracyVFBDVFBD with respect to VREFIND,
OUTD = FBD, IOUTD = -50μA (sink load)0+10
FBD Load RegulationIOUTD = ±1A-17-13mV/A
MAX17017
Quad-Output Controller for
Low-Power Architecture
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1 (step-down), VINLDO= 12V, VINA = VINBC= VDD= VCC= VBYP= VCSPA= VCSNA= 5V, VIND= 1.8V, VSHDN=
VONA= VONB= VONC= VOND= 5V, IREF= ILDO5 = IOUTD= no load, FREQ = GND, UP/DN = VCC, TA
= 0°C to +85°C, unless other-wise noted. Typical values are at TA= +25°C.) (Note 1)
TA = 0°C to +85°CPARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSFBD Line RegulationVIND = 1.0V to 2.8V, IOUTD = ±200mA1mV
FBD Input CurrentVFBD = 0 to 1.5V, TA = +25°C0.10.5μA
Source load+2+4OUTD Linear Regulator Current
LimitSink load-2-4A
Current-Limit Soft-Start TimeWith respect to internal OND signal160μs
High-side on-resistance120250Internal MOSFET On-ResistanceLow-side on-resistance180450mΩ
IVTTR = ±0.5mA-10+10VTTR Output AccuracyREFIND to VTTRIVTTR = ±3mA-20+20mV
VTTR Maximum Current Rating±5mA
FAULT PROTECTIONUpper threshold
rising edge, hysteresis = 50mV91214
SMPS POK and Fault ThresholdsLower threshold
falling edge, hysteresis = 50mV-14-12-9
Upper threshold
rising edge, hysteresis = 50mV61216VTT LDO POKD and Fault
ThresholdLower threshold
falling edge, hysteresis = 50mV-16-12-6
POK Propagation DelaytPOKFB_ forced 50mV beyond POK_ trip
threshold5μs
Overvoltage Fault Latch DelaytOVPFB_ forced 50mV above POK_ upper trip
threshold5μs
SMPS Undervoltage Fault
Latch DelaytUVPFBA, FBB, or FBC forced 50mV below
POK_ lower trip threshold5μs
VTT LDO Undervoltage Fault
Latch DelaytUVPFBD forced 50mV below POKD lower trip
threshold5000μs
POK Output Low VoltageVPOKISINK = 3mA0.4V
POK Leakage CurrentsIPOKF B A = 1.05V , V F B B = V F B C = 0.8V , V F B D = R E FI N D + 50m V ( P O K hi g h i m p ed ance) ;
POK_ forced to 5V, TA = +25°C
1μA
Thermal-Shutdown ThresholdTSHDNHysteresis = 15°C160°C
GENERAL LOGIC LEVELSSHDN Input Logic ThresholdHysteresis = 20mV0.51.6V
SHDN Input Bias CurrentTA = +25°C-1+1μA
ON_ Input Logic ThresholdHysteresis = 170mV0.51.6V
ON_ Input Bias CurrentTA = +25°C-1+1μA
UP/DN Input Logic Threshold0.51.6V
UP/DN Input Bias CurrentTA = +25°C-1+1μA
MAX17017
Quad-Output Controller for
Low-Power Architecture
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1 (step-down), VINLDO= 12V, VINA = VINBC= VDD= VCC= VBYP= VCSPA= VCSNA= 5V, VIND= 1.8V, VSHDN=
VONA= VONB= VONC= VOND= 5V, IREF= ILDO5 = IOUTD= no load, FREQ = GND, UP/DN = VCC, TA
= 0°C to +85°C, unless other-wise noted. Typical values are at TA= +25°C.) (Note 1)
TA = 0°C to +85°CPARAMETERSYMBOLCONDITIONS
MINTYPMAX
UNITSHigh (VCC)VCC - 0.4V
Unconnected/REF1.653.8FREQ Input Voltage Levels
Low (GND)0.5
FREQ Input Bias CurrentTA = +25°C-2+2μA
SYNC Input Logic Threshold1.53.5V
SYNC Input Bias CurrentTA = +25°C-1+1μA
ELECTRICAL CHARACTERISTICS(Circuit of Figure 1 (step-down), VINLDO= 12V, VINA = VINBC= VDD= VCC= VBYP= VCSPA= VCSNA= 5V, VIND= 1.8V, VSHDN=
VONA= VONB= VONC= VOND= 5V, IREF= ILDO5 = IOUTD= no load, FREQ = GND, UP/DN = VCC, TA
= -40°C to +105°C.) (Note 1)
TA = -40°C to +105°CPARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSUP/DN = GND (step-up), INA3.05.0
Input Voltage RangeUP/DN = LDO5 (step-down), INLDO,
INA = LDO55.524V
UP/DN = GND (step-up), INA = INLDO,
rising edge, hysteresis = 100mV2.43.0
INA Undervoltage ThresholdVINA(UVLOUP/DN = LDO5 (step-down), INA = VCC,
rising edge, hysteresis = 160mV3.94.5
INBC Input Voltage Range2.35.5V
Minimum Step-Up Startup VoltageUP/DN = GND (step-up)3.0V
SUPPLY CURRENTSVINLDO Shutdown Supply CurrentIIN(SHDN)VIN = 5.5V to 26V, SHDN = GND15μA
VINLDO Suspend Supply CurrentIIN(SUS)VINLDO = 5.5V to 26V, ON_ = GND,
SHDN = INLDO80μA
INA Shutdown CurrentIINASHDN = ONA = ONB = ONC = OND =
GND, UP/DN = VCC10μA
VCC Supply Current
Main Step-Down Only
ONA = VCC, ONB = ONC = OND = GND;
does not include switching losses,
measured from VCC
350μAC C S up p l y C ur r entai n S tep - D ow n and Reg ul ator B
ONA = ONB = VCC, ONC = OND = GND;
does not include switching losses,
measured from VCC
400μAC C S up p l y C ur r entai n S tep - D ow n and Reg ul ator C
ONA = ONC = VCC, ONB = OND = GND,
does not include switching losses,
measured from VCC
400μA
MAX17017
Quad-Output Controller for
Low-Power Architecture
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1 (step-down), VINLDO= 12V, VINA = VINBC= VDD= VCC= VBYP= VCSPA= VCSNA= 5V, VIND= 1.8V, VSHDN=
VONA= VONB= VONC= VOND= 5V, IREF= ILDO5 = IOUTD= no load, FREQ = GND, UP/DN = VCC, TA
= -40°C to +105°C.) (Note 1)
TA = -40°C to +105°CPARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSC C S up p l y C ur r entai n S tep - D ow n and Reg ul ator D
ONA = OND = VCC, ONB = ONC = GND,
does not include switching losses,
measured from VCC
3.5mA
INA Supply Current (Step-Down)IINAONA = VCC, UP/DN = VCC (step-down)75
IN A + V C C S tep - U p S up p l y C ur r entIINAONA = VCC, UP/DN = GND (step-up)475μA
5V LINEAR REGULATOR (LDO5)LDO5 Output VoltageVLDO5VINLDO = 5.5V to 26V, ILDO5 = 0 to 50mA,
BYP = GND4.755.25V
LDO5 Short-Circuit Current LimitLDO5 = BYP = GND55mA
1.25V REFERENCEReference Output VoltageVREFNo load1.2371.263V
Reference Load RegulationΔVREFIREF = -1μA to +50μA12mV
OSCILLATOROscillator FrequencyfOSCFREQ = GND0.91.1MHz
Maximum Duty Cycle
(All Switching Regulators)DMAX89%
REGULATOR A (Main Step-Up/Step-Down)Step-up configuration (UP/DN = GND)3.0VCC +
0.3VOutput-Voltage Adjust Range
Step-down configuration (UP/DN = VCC)1.0VCC +
0.3V
Step-up configuration,
VCSPA - VCSNA = 0mV, 90% duty cycle0.9701.018
FBA Regulation Voltage
Step-down configuration,
VCSPA - VCSNA = 0mV, 90% duty cycle0.9631.008
Step-up configuration (UP/DN = GND),C S P A - V C S N A = 0 to 20m V , 90% d uty cycl e0.9541.018
FBA Regulation Voltage
(Overload)VFBA
Step-down configuration (UP/DN = VCC),C S P A - V C S N A = 0 to 20m V , 90% d uty cycl e0.9251.008
Step-up (UP/DN = GND)519FBA Line RegulationStep-down (UP/DN = VCC)1023mV
Current-Sense Input Common-
Mode RangeVCSA0VCC +
0.3VV
Current-Limit Threshold (Positive)VILIMA1723mV
MAX17017
Quad-Output Controller for
Low-Power Architecture
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1 (step-down), VINLDO= 12V, VINA = VINBC= VDD= VCC= VBYP= VCSPA= VCSNA= 5V, VIND= 1.8V, VSHDN=
VONA= VONB= VONC= VOND= 5V, IREF= ILDO5 = IOUTD= no load, FREQ = GND, UP/DN = VCC, TA
= -40°C to +105°C.) (Note 1)
TA = -40°C to +105°CPARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
REGULATOR B (Internal 3A Step-Down Converter)FBB Reg ul ati on V ol tag eILXB = 0A, 0% duty cycle (Note 2)0.7420.766V
FBB Reg ul ati on V ol tag e ( Over l oad ) VFBBILXB = 0 to 2.5A , 0% duty cycle (Note 2)0.7150.766V
FBB Line Regulation612mV
LXB Peak Current LimitIPKB2.74.2A
REGULATOR C (Internal 5A Step-Down Converter)FBC Reg ul ati on V ol tag eILXC = 0A, 0% duty cycle (Note 2)0.7420.766V
FBC Reg ul ati on V ol tag e ( Over l oad ) VFBCILXC = 0 to 4A, 0% duty cycle (Note 2)0.7050.766V
FBC Line Regulation1120mV
LXC Peak Current LimitIPKC5.06.5A
REGULATOR D (Source/Sink Linear Regulator and VTTR Buffer)IND Input Voltage RangeVIND12.8V
IND Supply CurrentOND = VCC70μA
REFIND Input Range0.51.5V
OUTD Output Voltage RangeVOUTD0.51.5VF BD w i th r esp ect to V R E F IN D ,U TD = FBD , IOU T D = + 50μA ( sour ce l oad ) -120
FBD Output AccuracyVFBDVFBD with respect to VREFIND,
OUTD = FBD, IOUTD = -50μA (sink load)0+12
FBD Load RegulationIOUTD = ±1A-20mV/A
Source load+2+4OUTD Linear Regulator Current
LimitSink load-2-4A
High-side on-resistance300Internal MOSFET On-ResistanceLow-side on-resistance475mΩ
VTTR Output AccuracyREFIND to VTTRIVTTR = ±3mA-20+20mV
MAX17017
Quad-Output Controller for
Low-Power Architecture
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1 (step-down), VINLDO= 12V, VINA = VINBC= VDD= VCC= VBYP= VCSPA= VCSNA= 5V, VIND= 1.8V, VSHDN=
VONA= VONB= VONC= VOND= 5V, IREF= ILDO5 = IOUTD= no load, FREQ = GND, UP/DN = VCC, TA
= -40°C to +105°C.) (Note 1)
TA = -40°C to +105°CPARAMETERSYMBOLCONDITIONS
MINTYPMAX
UNITS
FAULT PROTECTION Upper threshold rising edge,
hysteresis = 50mV 8 16
SMPS POK and Fault Thresholds
Lower threshold falling edge,
hysteresis = 50mV -16 -8
Upper threshold rising edge,
hysteresis = 50mV 6 16
VTT LDO POKD and Fault
Threshold Lower threshold falling edge,
hysteresis = 50mV -16 -6
POK Output Low Voltage VPOK ISINK = 3mA 0.4 V
GENERAL LOGIC LEVELS SHDN Input Logic Threshold Hysteresis = 20mV 0.5 1.6 V
ON_ Input Logic Threshold Hysteresis = 170mV 0.5 1.6 V
UP/DN Input Logic Threshold 0.5 1.6 V
High (VCC) VCC - 0.4V
Unconnected/REF 1.65 3.8 FREQ Input Voltage Levels
Low (GND) 0.5
SYNC Input Logic Threshold 1.5 3.5 V
Note 1:Limits are 100% production tested at TA= +25°C. Maximum and minimum limits are guaranteed by design and
characterization.
Note 2:Regulation voltage tested with slope compensation. The typical value is equivalent to 0% duty cycle. In real application, the
regulation voltage is higher due to the line regulation times the duty cycle.
MAX17017
Quad-Output Controller for
Low-Power Architecture
SMPS REGULATOR A EFFICIENCY
vs. LOAD CURRENTMAX17017 toc01
LOAD CURRENT (A)
EFFICIENCY (%)0.10.01
VIN = 20V
VIN = 12V
VIN = 8V
SMPS REGULATOR A OUTPUT VOLTAGE
vs. LOAD CURRENTMAX17017 toc02
LOAD CURRENT (A)
OUTPUT VOLTAGE (V)
VIN = 20V
VIN = 12V
VIN = 8V
SMPS REGULATOR B EFFICIENCY
vs. LOAD CURRENTMAX17017 toc03
LOAD CURRENT (A)
EFFICIENCY (%)0.10.01
VIN = 3.3V
VIN = 5V
VIN = 2.5V
SMPS REGULATOR B OUTPUT VOLTAGE
vs. LOAD CURRENTMAX17017 toc04
LOAD CURRENT (A)
OUTPUT VOLTAGE (V)
VIN = 3.3V
VIN = 5V
VIN = 2.5V
SMPS REGULATOR C EFFICIENCY
vs. LOAD CURRENTMAX17017 toc05
LOAD CURRENT (A)
EFFICIENCY (%)0.10.01
VIN = 3.3V
VIN = 5V
VIN = 2.5V
SMPS REGULATOR C OUTPUT VOLTAGE
vs. LOAD CURRENTMAX17017 toc06
LOAD CURRENT (A)
OUTPUT VOLTAGE (V)
VIN = 3.3V
VIN = 5V
VIN = 2.5V
REGULATOR D VOLTAGE
vs. SOURCE/SINK LOAD CURRENTMAX17017 toc07
LOAD CURRENT (A)
VTT VOLTAGE (V)
Typical Operating Characteristics
(Circuit of Figure 1, TA = +25°C, unless otherwise noted.)
MAX17017
Quad-Output Controller for
Low-Power Architecture
Typical Operating Characteristics (continued)(Circuit of Figure 1, TA = +25°C, unless otherwise noted.)
REG B STARTUP WAVEFORM
(HEAVY LOAD)MAX17017 toc10
400μs/div
ONB
OUTB
POKB
ILB
LXB
ONB: 5V/div
OUTB: 2V/div
POKB: 5V/div
ILB: 2A/div
LXB: 5V/div
RLOAD = 1.01Ω
REG B SHUTDOWN WAVEFORMMAX17017 toc11
400μs/div
ONB
OUTB
POKB
ILB
LXB
ONB: 5V/div
OUTB: 2V/div
POKB: 5V/div
ILB: 2A/div
LXB: 5V/div
RLOAD = 0.8Ω
REG C STARTUP WAVEFORM
(HEAVY LOAD)MAX17017 toc12
400μs/div
ONC
OUTC
POKC
ILC
LXC
ONC: 5V/div
OUTC: 1V/div
POKC: 5V/div
ILC: 5A/div
LXC: 5V/div
RLOAD = 0.25Ω
REG C SHUTDOWNMAX17017 toc13
100μs/div
ONC
OUTC
POKC
ILC
LXC
ONC: 5V/div
OUTC: 1V/div
POKC: 5V/div
ILC: 5A/div
LXC: 5V/div
RLOAD = 0.25Ω
REG A STARTUP WAVEFORM
(HEAVY LOAD)MAX17017 toc08
400μs/div
ONA
OUTA
POKA
ILA
LXA
ONA: 5V/div
OUTA: 5V/div
POKA: 5V/div
ILA: 5A/div
LXA: 10V/div
RLOAD = 1.6Ω
REG A SHUTDOWN WAVEFORMMAX17017 toc09
400μs/div
ONA
OUTA
POKA
ILA
LXA
ONA: 5V/div
OUTA: 5V/div
POKA: 5V/div
ILA: 5A/div
LXA: 10V/div
RLOAD = 2.5Ω
MAX17017
Quad-Output Controller for
Low-Power Architecture
REG A LOAD TRANSIENT (1A TO 3.2A)MAX17017 toc14
20μs/div
OUTA
IOUTA
ILA
LXA
OUTA: 100mV/div
LXA: 10V/div
ILA: 2A/div
IOUTA: 2A/div
VINA = 12V, LOAD TRANSIENT
IS FROM 1A TO 3.2A
REG B LOAD TRANSIENT (0.4A TO 2A)MAX17017 toc15
20μs/div
OUTB
IOUTB
ILB
LXB
OUTB: 50mV/div
LXB: 5V/div
ILB: 1A/div
IOUTB: 2A/div
VINBC = 5V, 0.4A TO 2.0A
LOAD TRANSIENT
REG C LOAD TRANSIENT (0.8A TO 3A)MAX17017 toc16
20μs/div
OUTC
IOUTC
ILC
LXC
OUTC: 50mV/div
LXC: 5V/div
ILC: 2A/div
IOUTC: 2A/div
VINBC = 5V, 0.8A TO 3.0A
LOAD TRANSIENT
REG D LOAD TRANSIENT (SOURCE/SINK)MAX17017 toc17
20μs/div
IOUTD
OUTD
OUTD: 20mV/div
IOUTD: 1A/div
IND = 1.8V, REFIND = 0.9V,
COUT = 2 x 10μF, LOAD TRANSIENT
IS FROM 1A SOURCING TO 1A SINKING
REG D LOAD TRANSIENT (SINK)MAX17017 toc18
20μs/div
IOUTD
OUTD
OUTD: 10mV/div
IOUTD: 1A/div
IND = 1.8V, REFIND = 0.9V,
COUT = 2 x 10μF, LOAD TRANSIENT
IS FROM 0 TO 1A SINKING
Typical Operating Characteristics (continued)(Circuit of Figure 1, TA = +25°C, unless otherwise noted.)
REG D LOAD TRANSIENT (SOURCE)MAX17017 toc19
20μs/div
IOUTD
OUTD
OUTD: 10mV/div
IOUTD: 1A/div
IND = 1.8V, REFIND = 0.9V,
COUT = 2 x 10μF, LOAD TRANSIENT
IS FROM 0 TO 1A SOURCING
MAX17017
Quad-Output Controller for
Low-Power Architecture
Pin Description
PINNAMEFUNCTION1POKC
Open-Drain Power-Good Output for the Internal 5A Step-Down Converter. POKC is low if FBC is more than
12% (typ) above or below the nominal 0.75V feedback regulation threshold. POKC is held low during
startup and in shutdown. POKC becomes high impedance when FBC is in regulation.BSTC
Boost Flying Capacitor Connection for the Internal 5A Step-Down Converter. The MAX17017 includes an
internal boost switch/diode connected between VDD and BSTC. Connect to an external capacitor as shown
in Figure 1.
3–6LXCInductor Connection for the Internal 5A Step-Down Converter. Connect LXC to the switched side of the
inductor.
7, 8OUTD
Source/Sink Linear Regulator Output. Bypass OUTD with 2x 10μF or greater ceramic capacitors to ground.
Dropout needs additional output capacitance (see the VTT LDO Output Capacitor Selection (COUTD)
section).
9INDS our ce/S i nk Li near Reg ul ator Inp ut. Byp ass IN D w i th a 10μF or g r eater cer am i c cap aci tor to g r ound .FBDFeedback Input for the Internal Source/Sink Linear Regulator. FBD tracks and regulates to the REFIND
voltage.VTTROuput of Reference Buffer. Bypass with 0.22μF for ±3mA of output current.REFINDDynamic Reference Input Voltage for the Source/Sink Linear Regulator and the Reference Buffer. The linear
regulator feedback threshold (FBD) tracks the REFIND voltage.SHDN
Shutdown Control Input. The device enters its 5μA supply current shutdown mode if VSHDN is less than the
SHDN input falling edge trip level and does not restart until VSHDN is greater than the SHDN input rising
edge trip level. Connect SHDN to VINLDO for automatic startup of LDO5.INLDO
Input of the Startup Circuitry and the LDO5 Internal 5V Linear Regulator. Bypass to GND with a 0.1μF or
greater ceramic capacitor close to the controller.
In the single-cell step-up applications, the 5V linear regulator is no longer necessary for the 5V bias supply.
Connect BYP and INLDO to the system’s 5V supply to effectively disable the linear regulator.LDO5
5V Internal Linear Regulator Output. Bypass with a 4.7μF or greater ceramic capacitor. The 5V linear
regulator provides the bias power for the gate drivers (VDD) and analog control circuitry (VCC). The linear
regulator sources up to 50mA (max guaranteed). When BYP exceeds 4.65V (typ), the MAX17017 bypasses
the linear regulator through a 1.5_ bypass switch. When the linear regulator is bypassed, LDO5 supports
loads up to 100mA.
In the single-cell step-up applications, the 5V linear regulator is no longer necessary for the 5V bias supply.
Bypass SHDN to ground and leave LDO5 unconnected. Connect BYP and INLDO to effectively disable the
linear regulator.BYP
Linear Regulator Bypass Input. When BYP exceeds 4.65V, the controller shorts LDO5 to BYP through a 1.5_
bypass switch and disables the linear regulator. When BYP is low, the linear regulator remains active.
The BYP input also serves as the VTTR buffer supply, allowing VTTR to remain active even when the
source/sink linear regulator (OUTD) has been disabled under system standby/suspend conditions.
In the single-cell step-up applications, the 5V linear regulator is no longer necessary for the 5V bias supply.
Bypass LDO5 to ground with a 1μF capacitor and leave this output unconnected. Connect BYP and INLDO
to the system’s 5V supply to effectively disable the linear regulator.
MAX17017
Quad-Output Controller for
Low-Power Architecture
Pin Description (continued)
PINNAMEFUNCTIONVCC
5V Analog Bias Supply. VCC powers all the analog control blocks (error amplifiers, current-sense amplifiers,
fault comparators, etc.) and control logic. Connect VCC to the 5V system supply with a series 10_ resistor,
and bypass to analog ground using a 1μF or greater ceramic capacitor.INAInput to the Circuit in Reg A in Boost Mode. Connect INA to the input in step-up mode (UP/DN = GND) and
connect INA to LDO5 in step-down mode (UP/DN = VCC).UP/DN
Converter Configuration Selection Input for Regulator A. When UP/DN is pulled high (UP/DN = VCC),
regulator A operates as a step-down converter (Figure 1). When UP/DN is pulled low (UP/DN = GND),
regulator A operates as a step-up converter.FREQ
Trilevel Oscillator Frequency Selection Input.
FREQ = VCC: RegA = 250kHz, RegB = 500kHz, RegC = 250kHz
FREQ = REF: RegA = 375kHz, RegB = 750kHz, RegC = 375kHz
FREQ = GND: RegA = 500kHz, RegB = 1MHz, RegC = 500kHzREF
1.25V Reference-Voltage Output. Bypass REF to analog ground with a 0.1μF ceramic capacitor. The
reference sources up to 50μA for external loads. Loading REF degrades output voltage accuracy according
to the REF load-regulation error. The reference shuts down when the system pulls SHDN low in buck mode
(UP/DN = GND) or when the system pulls ONA low in boost mode (UP/DN = VCC).AGNDAnalog GroundCSNAN eg ati ve C ur r ent- S ense Inp ut for the M ai n S w i tchi ng Reg ul ator . C onnect to the neg ati ve ter m i nal of the cur r ent-
sense r esi stor . D ue to the C S N A b i as cur r ent r eq ui r em ents, l i m i t the ser i es i m p ed ance to l ess than 10Ω.CSPAP osi ti ve C ur r ent- S ense Inp ut for the M ai n S w i tchi ng Reg ul ator . C onnect to the p osi ti ve ter m i nal of the cur r ent-
sense r esi stor . D ue to the C S P A b i as cur r ent r eq ui r em ents, l i m i t the ser i es i m p ed ance to l ess than 10Ω.FBAFeedback Input for the Main Switching Regulator. FBA regulates to 1.0V.POKA
Open-Drain Power-Good Output for the Main Switching Regulator. POKA is low if FBA is more than 12% (typ)
above or below the nominal 1.0V feedback regulation point. POKA is held low during soft-start and in
shutdown. POKA becomes high impedance when FBA is in regulation.DHAHigh-Side Gate-Driver Output for the Main Switching Regulator. DHA swings from LXA to BSTA.LXAInductor Connection of Converter A. Connect LXA to the switched side of the inductor.BSTABoost Fl yi ng C ap aci tor C onnecti on of C onver ter A. The M AX 17017 i ncl ud es an i nter nal b oost sw i tch/d i od e
connected b etw een V DD and BS TA. C onnect to an exter nal cap aci tor as show n i n Fi g ur e 1.DLALow-Side Gate-Driver Output for the Main Switching Regulator. DLA swings from GND to VDD.
31, 32,LXBInductor Connection for the Internal 3A Step-Down Converter. Connect LXB to the switched side of the
inductor.BSTB
Boost Flying Capacitor Connection for the Internal 3A Step-Down Converter. The MAX17017 includes an
internal boost switch/diode connected between VDD and BSTB. Connect to an external capacitor as shown
in Figure 1.POKB
Open-Drain Power-Good Output for the Internal 3A Step-Down Converter. POKB is low if FBB is more than
12% (typ) above or below the nominal 0.75V feedback-regulation threshold. POKB is held low during soft-
start and in shutdown. POKB becomes high impedance when FBB is in regulation.
MAX17017
Quad-Output Controller for
Low-Power Architecture
Pin Description (continued)
PINNAMEFUNCTIONFBBFeedback Input for the Internal 3A Step-Down Converter. FBB regulates to 0.75V.ONBSwitching Regulator B Enable Input. When ONB is pulled low, LXB is high impedance. When ONB is driven
high, the controller enables the 3A internal switching regulator.SYNCExternal Synchronization Input. Used to override the internal switching frequency.ONASwitching Regulator A Enable Input. When ONA is pulled low, DLA and DHA are pulled low. When ONA is
driven high, the controller enables the step-up/step-down converter.
40–43INBC
Input for Regulators B and C. Power INBC from a 2.5V to 5.5V supply. Internally connected to the drain of
the high-side MOSFETs for both regulator B and regulator C. Bypass to PGND with 2x 10μF or greater
ceramic capacitors to support the RMS current.VDD5V Bias Supply Input for the Internal Switching Regulator Drivers. Bypass with a 1μF or greater ceramic
capacitor. Provides power for the BSTB and BSTC driver supplies.POKD
Open-Drain Power-Good Output for the Internal Source/Sink Linear Regulator. POKD is low if FBD is more
than 10% (typ) above or below the REFIND regulation threshold. POKD is held low during soft-start and in
shutdown. POKD becomes high impedance when FBD is in regulation.ONDS our ce/S i nk Li near Reg ul ator ( Reg ul ator D ) and Refer ence Buffer E nab l e Inp ut. W hen O N D i s p ul l ed l ow , O U TD s hi g h i m p ed ance. W hen O N D i s d r i ven hi g h, the contr ol l er enab l es the sour ce/si nk l i near r eg ul ator .ONCSwitching Regulator C Enable Input. When ONC is pulled low, LXC is high impedance. When ONC is driven
high, the controller enables the 5A internal switching regulator.FBCFeedback Input for the Internal 5A Step-Down Converter. FBC regulates to 0.75V.PGND
Power Ground. The source of the low-side MOSFETs (REG B and REG C), the drivers for all switching
regulators, and the sink MOSFET of the VTT LDO are all internally connected to the exposed pad.
Connect the exposed backside pad to system power ground planes through multiple vias.
Detailed DescriptionThe MAX17017 standard application circuit (Figure 1)
provides a 5V/5AP-Pmain stage, a 1.8V/3AP-PVDDQ
and 0.9A/2A VTT outputs for DDR, and a 1.05V/5AP-P
chipset supply.
The MAX17017 supports four power outputs—one high-
voltage step-down controller, two internal MOSFET
step-down switching regulators, and one high-current
source/sink linear regulator. The step-down switching
regulators use a current-mode fixed-frequency architec-
ture compensated by the output capacitance. An inter-
nal 50mA 5V linear regulator provides the bias supply
and driver supplies, allowing the controller to power up
from input supplies greater than 5.5V.
Fixed 5V Linear Regulator (LDO5)An internal linear regulator produces a preset 5V low-
current output from INLDO. LDO5 powers the gate dri-
vers for the external MOSFETs, and provides the bias
supply required for the SMPS analog controller, refer-
ence, and logic blocks. LDO5 supplies at least 50mA
for external and internal loads, including the MOSFET
gate drive, which typically varies from 5mA to 15mA
per switching regulator, depending on the switching
frequency. Bypass LDO5 with a 4.7μF or greater
ceramic capacitor to guarantee stability under the full-
load conditions.
The MAX17017 switch-mode step-down switching reg-
ulators require a 5V bias supply in addition to the main-
power input supply. This 5V bias supply is generated
by the controller’s internal 5V linear regulator (LDO5).
This boot-strappable LDO allows the controller to
power up independently. The gate-driver VDDinput
supply is typically connected to the fixed 5V linear reg-
ulator output (LDO5). Therefore, the 5V LDO supply
must provide LDO5 (PWM controller) and the gate-
drive power during power-up.
