MAX1621EEE+ ,Digitally Adjustable LCD Bias SuppliesELECTRICAL CHARACTERISTICS(V = 3.3V, V = 10V, T = 0°C to +85°C, unless otherwise noted.)DD BATT APA ..
MAX1623EAP ,3A / Low-Voltage / Step-Down Regulator with Synchronous Rectification and Internal SwitchesELECTRICAL CHARACTERISTICS(V = V = +5V, FBSEL unconnected, R = 110kΩ, T = 0°C to +85°C, unless othe ..
MAX1623EAP ,3A / Low-Voltage / Step-Down Regulator with Synchronous Rectification and Internal SwitchesApplications♦ Idle Mode™ Operation at Light Loads5V to 3.3V Conversion♦ Thermal Shutdown Protection ..
MAX1623EAP ,3A / Low-Voltage / Step-Down Regulator with Synchronous Rectification and Internal Switchesfeatures constant-off-time, current-mode ♦ Minimal External Componentspulse-width-modulation (PWM) ..
MAX1623EAP/T ,3A, Low-Voltage, Step-Down Regulator with Synchronous Rectification and Internal SwitchesApplications♦ Idle Mode™ Operation at Light Loads5V to 3.3V Conversion♦ Thermal Shutdown Protection ..
MAX1623EAP+ ,3A, Low-Voltage, Step-Down Regulator with Synchronous Rectification and Internal SwitchesELECTRICAL CHARACTERISTICS(V = V = 5V, FBSEL unconnected, R = 110kΩ, T = 0°C to +85°C, unless other ..
MAX435CPD+ ,Wideband Trasconductance AmplifiersGeneral Description
The MAX435 and MAX436 are high-speed, wideband
transconductance amplifiers ..
MAX435EPD ,Wideband Trasconductance Amplifiers19-0042; Rev 1; 4/93
[VI lle/VI
Wideband 'rransetondluctamte Amplifiers
MAX435ESD ,Wideband Trasconductance Amplifiersapplications, sucn a5 lllgll'apku "F%Pbtbr0r's'''""'"''"' -
plitiers and wideband, high-gain bandp ..
MAX435ESD+T ,250MHz Wideband Transconductance Amplifier with Differential Output Not Recommended for New Designs This product was manufactured for Maxim by an outside wafer foun ..
MAX436 ,250MHz Wideband Transconductance Amplifier with Differential Output Not Recommended for New Designs This product was manufactured for Maxim by an outside wafer foun ..
MAX4360EAX ,Low-Cost 4x4 / 8x4 / 8x8 Video Crosspoint SwitchesApplicationsMAX4456EPL -40°C to +85°C 40 Plastic DIPHigh-Speed Signal Video Test EquipmentMAX4456EQ ..
MAX1620EEE+-MAX1620EEE-T-MAX1621EEE+
Digitally Adjustable LCD Bias Supplies
General DescriptionThe MAX1620/MAX1621 convert a 1.8V to 20V battery
voltage to a positive or negative LCD backplane bias
voltage. Backplane bias voltage can be automatically
disabled when the display logic voltage is removed,
protecting the display. These devices use very little PC
board area, come in ultra-small QSOP packages, and
require only small, low-profile external components.
Output voltage can be set to a desired positive or nega-
tive voltage range with external resistors, and adjusted
over that range with the on-board digital-to-analog con-
verter (DAC) or with a potentiometer. The MAX1620/
MAX1621 include a 5-bit DAC, allowing digital software
control of the bias voltage. The MAX1620 uses up/down
digital signaling to adjust the DAC, and the MAX1621
uses the System Management Bus (SMBus™) 2-wire
serial interface.
These devices use a low-cost, external, N-channel MOSFET
power switch or NPN transistor, and can be configured
for positive or negative output voltages. Operating cur-
rent is a low 150μA, typically provided from a display’s
logic supply of 3.0V to 5.5V. The MAX1620/MAX1621 are
available in a 16-pin QSOP package.
ApplicationsNotebook Computers
Palmtop Computers
Personal Digital Assistants
Portable Data-Collection Terminals
atures1.8V to 20V Battery Input VoltageAutomatic Disable when Display Logic
is Shut DownExtremely Small QSOP Package32-Level Internal DACSMBus Serial Interface (MAX1621)Positive or Negative Output Voltage
Digitally Adjustable LCD Bias Supplie
PART
MAX1620EEE
MAX1621EEE-40°C to +85°C
-40°C to +85°C
TEMP. RANGEPIN-PACKAGE16 QSOP
16 QSOP
EVALUATION KIT MANUAL
FOLLOWS DATA SHEET
Ordering Information19-1214; Rev 1; 1/98
DHI
DLO
PGND
DOUT
VDD
POL
SHDN
REF
AGND
MAX1620
12.5V
23.5V OUT
2V TO
12V
3V TO
5.5V
ON/OFF
DOWN
LCDONPOK
BATT
Typical Operating Circuit
Pin ConfigurationDHI
DLO
PGND
AGND
VDD
DOUT
DN (SDA)
UP (SCL)
BATT
SHDN (SUS)
POK
REF
POL
LCDON
TOP VIEW
MAX1620
MAX1621
QSOP( ) ARE FOR MAX1621 ONLY.
Digitally Adjustable LCD Bias Supplies
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VDD= 3.3V, VBATT= 10V, TA
= 0°C to +85°C, unless otherwise noted.)Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto AGND..............................................................-0.3V to 6V
PGND to AGND..................................................................±0.3V
BATT, LX, LCDONto AGND....................................-0.3V to 30V
DHI, DLO to PGND.....................................-0.3V to (VDD+ 0.3V)
DOUT, FB, POL, POK, REF to AGND.........-0.3V to (VDD+ 0.3V)
UP, DN, SHDNto AGND.............................................-0.3V to 6V
SCL, SDA, SUSto AGND............................................-0.3V to 6V
IDHI......................................................................................60mA
IDLO....................................................................................-30mA
ILCDON...............................................................................-10mA
Continuous Power Dissipation (TA= +70°C)
QSOP (derate 8.3mW/°C above +70°C) ......................667mW
Operating Temperature Range
MAX1620EEE/MAX1621EEE............................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10sec).............................+300°C
VLCDON= 28V, POK = 0.967V
VLCDON= 0.4V, POK = 1.017V
FB = -50mV
FB = REF + 100mV
POL = AGND, 3.0V ≤VDD ≤5.5V
Shutdown mode, VSHDN= VDD,VDD= 5.5V
POL = VDD, 3.0V ≤VDD ≤5.5V
Operating mode, output in regulation, VDD= 5.5V
VDD= 5V
VDD= 5V
VDD= 3.0V
LX = 12V, shutdown mode
VDD= 4.5V
LX = 12V, operating mode
BATT = 12V, shutdown mode
4V ≤BATT ≤12V, TA= 0°C to +85°C
BATT = 12V, operating mode
1.8V ≤BATT ≤20V, TA= +25°C1LCDONHigh, Leakage Current-2-6LCDONLow, Sinking Current-1085
-2010FB Input Current (Note 3)-8081.461.51.53FB Regulation Voltage-25DLO Output Current (Note 3)50DHI Output Current (Note 3)14On-Resistance (DLO, DHI)
16.523.5μs-V20Microsecond-Volt Time Constant (k-factor)27Positive Output Voltage20μA150250VDDSupply Current
1.820BATT Operating Range (Note 2)μA1320LX Input Current1BATT Input Current
-27Negative Output Voltage1.52.8Undervoltage Lockout Threshold (Note 1)203.05.5VDDOperating Range
Voltage on POKrisingV0.9670.9921.017POK Threshold Voltage12POK Hysteresis
CONDITIONSUNITSMINTYPMAXPARAMETERNo loadV1.471.51.53REF Voltage
0μA ≤IREF≤25mAmV310REF Load Regulation
SWITCHING REGULATOR
REFERENCE AND DAC OUTPUT
Digitally Adjustable LCD Bias Supplie
ELECTRICAL CHARACTERISTICS (continued)(VDD= 3.3V, VBATT= 10V, TA
= 0°C to +85°C, unless otherwise noted.)
TIMING CHARACTERISTICS (TA
= 0°C to +85°C, unless otherwise noted.)-20μA ≤IDOUT≤0μA
ISDA= -6mA
VIN= 0V or VIN= VDD
VDD= 5.5V
VDD= 5.5V
3.0V ≤VDD≤3.6V
3.0V ≤VDD≤3.6V
48.39mV step size
VIN= 0V or VIN= VDD
Guaranteed monotonic
0μA ≤IDOUT≤40μA0.4±1SCL, SDA, SUSInput Leakage Current0.6SCL, SDA, SUSInput Low Voltage2.3
1.4SCL, SDA, SUSInput High Voltage0.600.007DOUT Minimum Output Voltage (Note 3)
2.3V1.4UP, DN, SHDN, POL Input High Voltage
LSBDOUT Differential Nonlinearity
Bits5DOUT Resolution
REF -REF +
0.020.02 DOUT Maximum Output Voltage (Note 3)V
UP, DN, SHDN, POL Input Leakage CurrentμA
UP, DN, SHDN, POL Input Low Voltage
SDA Output Low Voltage
CONDITIONSUNITSMINTYPMAXPARAMETER
DIGITAL INPUTS AND OUTPUTS(Note 4)
(Note 4)
(Note 4)
CONDITIONSSCL Falling Edge to SDA Valid
Master Clocking in DataμstDV4tHD:STAStart Condition SDA to SCL
Hold Time4.7tSU:STAStart Condition SCL to SDA
Setup Time4tHIGHSCL High Time4.7tLOWSCL Low Time300tFSCL/SDA Fall Time1t1Pulse Width High (UP, DN) 1tRSCL/SDA Rise Time0tHD:DATSCL to SDA Data-Hold Time500tSU:DATSDA to SCL Data-Setup Time1t2Pulse Width Low (UP, DN)1t3Pulse Separation (UP, DN)1t4Counter Reset Time
UNITSMINTYPMAXSYMBOLPARAMETER4tSU:STOStop Condition SCL_ to SDA_
Setup Time
MAX1620 (Figure 1)
MAX1621 (Figures 2 and 3)
Digitally Adjustable LCD Bias SuppliesOperating mode, output in regulationμA150250
0μA ≤IREF≤25μA
No load
REF Load Regulation
Voltage on POK rising
POL = VDD, 3.0V ≤VDD ≤5.5V
FB = 0V - 50mV
3.0 5.5
4V ≤BATT ≤12V
VDDOperating Range
FB = REF + 100mV
POL = AGND, 3.0V ≤VDD ≤5.5V5101.441.51.56REF Voltage27Positive Output Voltage
Shutdown mode, VSHDN= VDD20
-10120FB Input Current (Note 3)
VDDSupply Current
-3010-100101.5 2.8Undervoltage Lockout Threshold (Note 1)
μs-VMicrosecond-Volt Time Constant (k-factor)16241.8 20BATT Operating Range (Note 2)
-27Negative Output Voltage
FB Regulation VoltageV
POK Threshold Voltage
DOUT Maximum Output Voltage (Note 3)VREF -REF +
0.020.020μA ≤IDOUT≤40μA
-20μA ≤IDOUT≤0μADOUT Minimum Output Voltage (Note 3)V00.01
Guaranteed monotonicDOUT Differential NonlinearityLSB±1
UP, DN, SHDN, POL Input High Voltage3.0V ≤VDD≤3.6V1.4
VDD= 5.5V2.3V
UP, DN, SHDN, POL Input Low Voltage0.6V
3.0V ≤VDD≤3.6V1.4
VDD= 5.5V2.3
SCL, SDA, SUSInput Low Voltage0.6V
SDA Output Low VoltageISDA= -6mA0.4V
CONDITIONSUNITSMINTYPMAXPARAMETER
ELECTRICAL CHARACTERISTICS(VDD= 3.3V, VBATT= 10V, TA
= -40°C to +85°C. Typical values are at TA= +25°C, unless otherwise noted. Limits over this
temperature range are guaranteed by design.)
SCL, SDA, SUSInput High VoltageV
SWITCHING REGULATOR
REFERENCE AND OUTPUT
DIGITAL INPUTS AND OUTPUTS
Digitally Adjustable LCD Bias Supplie
TIMING CHARACTERISTICS (VDD= 3.3V, VBATT= 10V, TA
= -40°C to +85°C. Typical values are at TA= +25°C, unless otherwise noted. Limits over this
temperature range are guaranteed by design.)
CONDITIONSStop Condition SCL_ to SDA_
Setup TimeμstSU:STO4tHD:STAStart Condition SDA_ to SCL_
Hold Time4.7tSU:STAStart Condition SCL_ to SDA_
Setup Time4tHIGHSCL High Time4.7tLOWSCL Low Time300tFSCL/SDA Fall Time1t1Pulse Width High (UP, DN) 1tRSCL/SDA Rise Time0tHD:DATSCL_ to SDA_ Data-Hold Time500tSU:DATSDA_ to SCL_ Data-Setup Time1t2Pulse Width Low (UP, DN)1t3Pulse Separation (UP, DN)1t4Counter Reset Time
UNITSMINTYPMAXSYMBOLPARAMETER
Note 1:The setting in the DAC is guaranteed to remain valid as long as VDDis greater than the UVLO threshold.
Note 2:BATT Operating Range is guaranteed by the Microsecond-Volt Time Constant specification.
Note 3:Current sourced from a pin is denoted as positive current. Current sunk into a pin is denoted as negative current.
Note 4:Guaranteed by design.
__________________________________________Typical Operating Characteristics(VDD= 5V, VBATT= 10V, L1 = 100μH, TA= +25°C, unless otherwise noted.)
EFFICIENCY vs. OUTPUT CURRENT
AX1620/21-01
OUTPUT CURRENT (mA)
(%
+25V
+15V
EFFICIENCY vs. OUTPUT CURRENT
X1620/21-02
OUTPUT CURRENT (mA)
(%
-25V
-15V
EFFICIENCY vs. OUTPUT VOLTAGE
X1620/21-03
OUTPUT VOLTAGE (V)
(%+10mA
+20mASCL Falling Time to SDA Valid
Master Clocking in DataμstDV
MAX1620 (Figure 1)
MAX1621 (Figures 2 and 3)
Digitally Adjustable LCD Bias Supplies
_____________________________Typical Operating Characteristics (continued)(VDD=5V, VBATT= 10V, L1 = 100μH, TA= +25°C, unless otherwise noted.)
EFFICIENCY vs. OUTPUT VOLTAGE
AX1620/21-04
OUTPUT VOLTAGE (V)
(%
-10mA
-20mA
EFFICIENCY vs. VBATT
AX1620/21-05
VBATT (V)
(%+20V, +10mA
-20V, -10mA
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
1620/21-06
SUPPLY VOLTAGE (V)
(m
SUPPLY CURRENT vs. TEMPERATURE
X1620/21-07
TEMPERATURE (°C)
(m
REFERENCE VOLTAGE
vs. TEMPERATURE
AX1620/21-10
TEMPERATURE (°C)
(V12345
SHUTDOWN SUPPLY CURRENT
vs. SUPPLY VOLTAGEAX1620/21-08
SUPPLY VOLTAGE (V)
(m
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE
AX1620/21-09
TEMPERATURE (°C)
(m
k-FACTOR vs. SUPPLY VOLTAGE
AX1620/21-11
SUPPLY VOLTAGE (V)
(m
k-FACTOR vs. TEMPERATURE
AX1620/21-12
TEMPERATURE (°C)
(m
Digitally Adjustable LCD Bias Supplie5101520
k-FACTOR vs. VBATTAX1620/21-13
VBATT (V)
(m
LINE-TRANSIENT RESPONSEVOUT
(AC COUPLED, 5mV/div)
VDD
(AC COUPLED, 1V/div)
ILOAD = 20mA
2ms/div
5.3V
3.3V
MAX1620/21-14
LOAD-TRANSIENT RESPONSEVOUT
(AC COUPLED, 20mV/div)
IOUT
(10mA/div)
20mA
ILOAD = 0mA TO 20mA
2ms/div
MAX1620/21-15
_____________________________Typical Operating Characteristics (continued)(VDD=5V, VBATT= 10V L1 = 100μH, VOUT= 22.3V, TA= +25°C, unless otherwise noted.)
Digitally Adjustable LCD Bias SuppliesExternal Transistor Drive, HighDHI1616
External Transistor Drive, LowDLO1515
Switching-Voltage Sense InputLX1414
Power GroundPGND1313
Analog GroundAGND1212
IC Input Supply, 3.0V to 5.5VVDD1111
DAC Output Voltage
Logic-Level Shutdown Input (active-low)
System Management Bus Suspend-Mode Input (active-low)
Power OK Voltage-Sense Input, 1V threshold
Reference Voltage Output. Bypass REF with 0.1μF to AGND.
Logic-Level Input. POL selects output voltage polarity: high = positive boost,
low = negative boost.
Logic-Level Input. A rising edge on UP increases VOUT.UP = DN = high resets
the counter to mid-scale.
DOUT
System Management Bus Serial-Clock Input
Battery Voltage-Sense Input
System Management Bus Serial-Data Input and Open-Drain Output
Logic-Level Input. A rising edge on DN decreases VOUT.UP = DN = high resets
the counter to mid-scale.
FUNCTIONSHDN—4
SUS4—
POK55
REF66
POL77—2
Feedback Voltage InputFB9
SCL2—
BATT33
SDA1—
Open-Drain Output. LCDONcontrols LCD with external PNP.LCDON8—1
MAX1621MAX1620
NAME
PIN
______________________________________________________________Pin Description
Digitally Adjustable LCD Bias Suppliet4
tSU:STAtSU:DATtSU:DATtHD:DATtHD:DAT
tHD:STA
SCL
START
CONDITION
A5 CLOCKED
INTO SLAVE
A4 CLOCKED
INTO SLAVE
A3 CLOCKED
INTO SLAVE
MOST SIGNIFICANT
ADDRESS BIT (A6)
CLOCKED INTO SLAVE
SDA
tLOWtHIGH
tSU:STO
tDVtDV
SCL
RW BIT
CLOCKED
INTO SLAVE
ACKNOWLEDGED
BIT CLOCK
INTO MASTER
MOST SIGNIFICANT
BIT CLOCKED
SLAVE PULLING
SDA LOW
SDA• • • • •
Figure 1. MAX1620 UP and DN Signal Timing
Figure 2. MAX1621 SMB Serial-Interface Timing—Address
Figure 3. MAX1621 SMB Serial-Interface Timing—Acknowledge
Digitally Adjustable LCD Bias Supplies360k
12V
BATT
POK
MBRS0540
MMFT3055VL
MMBT2907VDD
POL
SHDN (SUS)
DN (SDA)
UP (SCL)
REF
AGND
( ) ARE FOR MAX1621.
NOTE: CONNECTIONS TO DIGITAL INPUTS NOT SHOWN.R3
300k
300k
2.2M
100pF
DHI
DLO
PGND
DOUT
LCDON
5.5VC1
0.1mF
0.1mF
100k
10k
TO REF
D3 1N6263 (ANY SCHOTTKY)
22mF
22mF
12.5V
23.5V OUT
VOUTSW
OPTIONAL
56k
56k
100mH
MAX1620
MAX1621
_______________Detailed DescriptionThe MAX1620/MAX1621 are step-up power controllers
that drive an external N-channel FET or NPN transistor
to convert power from a 1.8V to 20V battery to a higher
positive or negative voltage. They are configured as
negative-output, inverting power controllers with one
additional diode and one additional capacitor. Either
configuration’s output voltage can be adjusted with
external resistors, or digitally adjusted with an internal
digital-to-analog converter (DAC). The MAX1620 uses
pin-defined controls for the DAC, while the MAX1621
communicates with the DAC via the SMBus™ interface.
Operating PrincipleThe MAX1620/MAX1621 operate in discontinuous-
conduction mode (where the inductor current ramps to
zero by the end of each switching cycle) and with a
constant peak current, without requiring a current-
sense resistor. Switch on-time is inversely proportional
to the input voltage VBATTby a microsecond-volt con-
stant, or k-factor, of 20μs-V (e.g., for VBATT= 10V,
on-time = 2μs).
For an ideal boost converter operating in discontinu-
ous-conduction mode (no power losses), output current
is proportional to input voltage and peak inductor current:
IPKis proportional to on-time (tON), which, for these
parts, is determined by the k-factor:
IPK= k-factor / L
Discontinuous conduction is detected by monitoring the
LX node voltage. When the inductor’s energy is com-
pletely delivered, the LX node voltage snaps back to
the BATT voltage. When this crossing is sensed, anoth-
er pulse is issued if the output is still out of regulation.
Positive Output VoltageTo select a positive output voltage, tie the polarity pin
(POL) to VDDand use the typical boost topology shown
in Figure 4. FB regulation voltage is 1.5V. For optimum
stability, VOUTshould be greater than 1.1 (VBATT).
Negative Output VoltageTo select a negative output voltage, tie POL to GND
(Figure 5). In this configuration, the internal error amplifi-
er’s output is inverted to provide the correct feedback
polarity. FB regulation voltage is 0V. D1, D2, C4, and C5
form an inverting charge pump to generate the negative
voltage. This allows application of the positive boost
switching topology to negative output voltages.
The negative output circuit has two possible connec-
tions. In the standard connection, D1’s cathode is con-
nected to BATT. This connection features the best
output ripple performance, but VOUTmust be limited
to no more than 27V - 1.1(VBATT). If a larger negative
voltage is needed, an alternative connection allows a
maximum negative output of -27V, but with the addition-
al constraint that VOUT> 1.1VBATT. To use the alter-
native circuit, connect D1’s cathode to ground rather
than BATT (Figure 6). Increase C4 to 2.2μF to improve
output ripple performance.
The negative charge pump limits the output current to
the charge transferred each cycle multiplied by the 1 I V / VOUTPK BATTOUT=··
Figure 4. Typical Operating Circuit—Positive Output
