MAX15023ETG+T ,Wide 4.5V to 28V Input, Dual-Output Synchronous Buck ControllerElectrical Characteristics(V = 12V, R = 33kΩ, C = 4.7µF, C = 1µF, T = -40°C to +85°C, unless otherw ..
MAX15024AATB+T ,Single/Dual, 16ns, High Sink/Source Current Gate DriversFeaturesThe MAX15024/MAX15025 single/dual, high-speed♦ 8A Peak Sink Current/4A Peak Source CurrentM ..
MAX15025AATB+ ,Single/Dual, 16ns, High Sink/Source Current Gate DriversELECTRICAL CHARACTERISTICS(V = V = V = 10V, FB/SET = GND, T = T = -40°C to +125°C, unless otherwise ..
MAX15025AATB+T ,Single/Dual, 16ns, High Sink/Source Current Gate DriversBlock Diagrams appear at end of data sheet.For pricing, delivery, and ordering information, please ..
MAX15026BETD+T ,Low-Cost, Small, 4.5V to 28V Wide Operating Range, DC-DC Synchronous Buck ControllerApplicationsV 2 13 LXCCSet-Top BoxesPGOOD312 BSTLCD TV Secondary SuppliesEN 4 11 DLMAX15026Switches ..
MAX15027ATB+T ,1.425V to 3.6V Input, 1A Low-Dropout Regulators with BIAS InputApplicationsPin ConfigurationsAutomotive (Dead-Man LDO)ServersTOP VIEWStorageNetworking +IN 1 10 OU ..
MAX412BCSA ,Single/Dual/Quad, 28MHz, Low-Noise, Low-Voltage, Precision Op AmpsFeatures
The MAX410/MAX412/MAX414 single/dual/quad op
amps set a new standard for noise perform ..
MAX412BESA ,Single/Dual/Quad, 28MHz, Low-Noise, Low-Voltage, Precision Op Ampsapplications, ¥he PART TEMP.RANGE P'N'PACKAGE
MAX410/MAX412/MAX414 are available in DIP and so MAX ..
MAX412CPA ,Single/Dual/Quad, 28MHz, Low-Noise, Low-Voltage, Precision Op AmpsELECTRICAL CHARACTERISTICS
(V+ = 5V, V- = -5V, TA = 0°C to +70°C, unless otherwise noted.)
PARA ..
MAX412CSA ,Single/Dual/Quad, 28MHz, Low-Noise, Low-Voltage, Precision Op AmpsELECTRICAL CHARACTERISTICS
(V+ = 5V, V- = -5V, TA = 0°C to +70°C, unless otherwise noted.)
PARA ..
MAX412CSA+T ,Single/Dual/Quad, 28MHz, Low-Noise, Low-Voltage, Precision Op AmpsELECTRICAL CHARACTERISTICS(V+ = 5V, V- = -5V, T = +25°C, unless otherwise noted.)APARAMETER SYMBOL ..
MAX412ESA ,Single/Dual/Quad, 28MHz, Low-Noise, Low-Voltage, Precision Op AmpsFeatures
The MAX410/MAX412/MAX414 single/dual/quad op
amps set a new standard for noise perform ..
MAX15023ETG+-MAX15023ETG+T
Wide 4.5V to 28V Input, Dual-Output Synchronous Buck Controller
●Point-of-Load Regulators●Set-Top Boxes●LCD TV Secondary
Supplies●Switches/Routers●Power Modules●DSP Power Supplies
General DescriptionThe MAX15023 dual, synchronous step-down controller
operates from a 5.5V to 28V or 5V ±10% input voltage
range and generates two independent output voltages.
Each output is adjustable from 85% of the input voltage
down to 0.6V and supports loads of 12A or higher. Input
voltage ripple and total RMS input ripple current are
reduced by interleaved 180° out-of-phase operation.
The MAX15023 offers the ability to adjust the switching
frequency from 200kHz to 1MHz with an external resis-
tor. The MAX15023’s adaptive synchronous rectification
eliminates the need for external freewheeling Schottky
diodes. The device also utilizes the external low-side
MOSFET’s on-resistance as a current-sense element,
eliminating the need for a current-sense resistor. This pro-
tects the DC-DC components from damage during output
overloaded conditions or output short-circuit faults without
requiring a current-sense resistor. Hiccup-mode current
limit reduces power dissipation during short-circuit con-
ditions. The MAX15023 includes two independent pow-
er-good outputs and two independent enable inputs with
precise turn-on/turn-off thresholds, which can be used for
supply monitoring and for power sequencing.
Additional protection features include cycle-by-cycle,
low-side, sink peak current limit, and thermal shutdown.
Cycle-by-cycle, low-side, sink peak current limit prevents
reverse inductor current from reaching dangerous levels
when the device is sinking current from the output. The
MAX15023 also allows prebiased startup without dis-
charging the output and features adaptive internal digital
soft-start. This new proprietary feature enables monotonic
charging of externally large output capacitors at startup,
and achieves good control of the peak inductor current
during hiccup-mode short-circuit protection.
The MAX15023 is available in a space-saving and ther-
mally enhanced 4mm x 4mm, 24-pin TQFN-EP package.
The device operates over the -40°C to +85°C extended
temperature range.
Applications
Features●5.5V to 28V or 5V ±10% Input Supply Range●0.6V to (0.85 x VIN) Adjustable Outputs●Adjustable 200kHz to 1MHz Switching Frequency●Guaranteed Monotonic Startup into a Prebiased Load●Lossless, Cycle-by-Cycle, Low-Side, Source
Peak Current Limit with Adjustable, Temperature-
Compensated Threshold●Cycle-by-Cycle, Low-Side, Sink Peak Current-Limit
Protection●Proprietary Adaptive Internal Digital Soft-Start●±1% Accurate Voltage Reference●Internal Boost Diodes●Adaptive Synchronous Rectification Eliminates
External Freewheeling Schottky Diodes●Hiccup-Mode Short-Circuit Protection and Thermal
Shutdown●Power-Good Outputs and Analog Enable Inputs for
Power Sequencing
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
/V denotes an automotive qualified package.
PARTTEMP RANGEPIN-PACKAGEMAX15023ETG+-40°C to +85°C24 TQFN-EP*
MAX15023ETG/V+-40°C to +85°C24 TQFN-EP*
*EP
*EXPOSED PAD (CONNECT TO GROUND).
EN1
PGOOD1
DL1
PGND1
FB1
FB2PGOOD2DL2COMP2PGND22
LIM25618161413
LIM1
COMP1
DH2
DH1
BST1
LX1
MAX15023EN2BST2SGND12LX2RT
TQFNTOP VIEW
MAX15023Wide 4.5V to 28V Input,
Dual-Output Synchronous Buck Controller
Pin Coniguration
Ordering Information
EVALUATION KIT AVAILABLE
24 TQFN-EP Junction-to-Ambient Thermal Resistance (θJA) ........+36°C/W Junction-to-Case Thermal Resistance (θJC) ...............+8°C/W
IN to SGND............................................................-0.3V to +30V
BST_ to VCC .........................................................-0.3V to +30V
LX_ to SGND............................................................-1V to +30V
EN_ to SGND ..........................................................-0.3V to +6V
PGOOD_ to SGND................................................-0.3V to +30V
BST_ to LX_ ............................................................-0.3V to +6V
DH_ to LX_ ........................................….-0.3V to (VBST_ + 0.3V)
DL_ to PGND_ ..........................................-0.3V to (VCC + 0.3V)
SGND to PGND_................................................. -0.3V to +0.3V
VCC to SGND .............-0.3V to the lower of +6V or (VIN + 0.3V)
All Other Pins to SGND ..............................-0.3V to (VCC + 0.3V
VCC Short Circuit to SGND .........................................Continuou
VCC Input Current (IN = VCC, internal LDO not used) .....600mA
PGOOD_ Sink Current .......................................................20mA
Continuous Power Dissipation (TA = +70°C)(Note 1)
24-Pin TQFN-EP (derate 27.8mW/°C above +70°C) ..2222.2mW
Operating Temperature Range ............................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) ..................................+300°CSoldering Temperature (relow) .......................................+260°C
(VIN = 12V, RT = 33kΩ, CVCC = 4.7µF, CIN = 1µF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
(Note 3)
Electrical CharacteristicsNote 1: These power limits are due to the thermal characteristics of the package, absolute maximum junction temperature (150°C),
and the JEDEC 51-7 defined setup. Maximum power dissipation could be lower, limited by the thermal shutdown protection
included in this IC.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
GENERALInput Voltage RangeVIN5.528VVIN = VCC4.55.5
Quiescent Supply CurrentIINVFB1 = VFB2 = 0.9V, no switching4.56mA
Standby Supply CurrentIIN_SBYVEN1 = VEN2 = VSGND0.210.35mA
VCC REGULATOROutput VoltageVCC6V < VIN < 28V, ILOAD = 5mA5.005.25.50VVIN = 6V, 1mA < ILOAD < 100mA
VCC Regulator DropoutILOAD = 100mA0.07V
VCC Short-Circuit Output CurrentVIN = 5V150250mA
VCC Undervoltage LockoutVCC_UVLOVCC falling3.63.84V
VCC Undervoltage Lockout
Hysteresis430mV
ERROR AMPLIFIER (FB_, COMP_)FB_ Input Voltage Set-PointVFB_594600606mV
FB_ Input Bias CurrentIFB_VFB_ = 0.6V-250+250nA
MAX15023Wide 4.5V to 28V Input,
Dual-Output Synchronous Buck Controller
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to http://www.maximintegrated.com/thermal-tutorial.
Package Thermal Characteristics (Note 2)
Absolute Maximum Ratings
(VIN = 12V, RT = 33kΩ, CVCC = 4.7µF, CIN = 1µF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
(Note 3)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSFB to COMP
TransconductancegmICOMP = ±40µA65012001900µS
Amplifier Open-Loop GainNo load80dB
Amplifier Unity-Gain Bandwidth10MHz
COMP_ Swing (High)2.4V
COMP_ Swing (Low)No load at COMP_0.6V
COMP_ Source/Sink CurrentICOMP_| ICOMP_ |, VCOMP_ = 1.5V4580120µA
ENABLE (EN_)
EN_ Input HighVEN_HEN_ rising1.151.201.25V
EN_ Input HysteresisVEN_HYS150mV
EN_ Input Leakage CurrentILEAK_EN_-250+250nA
OSCILLATORSwitching FrequencyfSWEach converter460500540kHz
Switching Frequency
Adjustment Range (Note 4)2001000kHz
PWM Ramp Peak-to-Peak
AmplitudeVRAMP1.42V
PWM Ramp ValleyVVALLEY0.72V
Phase Shift Between ChannelsFrom DH1 to DH2 rising edges180Degrees
Minimum Controllable On-Time60100ns
Maximum Duty Cycle8687.5%
OUTPUT DRIVERSDH_ On-ResistanceLow, sinking 100mA, VBST_ - VLX_ = 5V1ΩHigh, sourcing 100mA, VBST_ - VLX_ = 5V1.2
DL_ On-ResistanceLow, sinking 100mA, VCC = 5.2V0.75ΩHigh, sourcing 100mA, VCC = 5.2V1.4
DH_ Peak CurrentCLOAD = 10nFSinking3ASourcing2
DL_ Peak CurrentCLOAD = 10nF
Sinking3Sourcing2
DH_, DL_ Break-Before-Make
Time (Dead Time)15ns
SOFT-STARTSoft-Start Duration2048Switching
cycles
Reference Voltage Steps64Steps
MAX15023Wide 4.5V to 28V Input,
Dual-Output Synchronous Buck Controller
Electrical Characteristics (continued)
(VIN = 12V, RT = 33kΩ, CVCC = 4.7µF, CIN = 1µF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
(Note 3)
Electrical Characteristics (continued)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
CURRENT LIMIT/HICCUPCycle-by-Cycle, Low-Side, Source
Peak Current-Limit Threshold
Adjustment Range
Source peak limit = VLIM_/1030300mV
LIM_ Reference CurrentILIM_VLIM_ = 0.3V to 3V, TA = +25°C455055µA
LIM_ Reference Current TCVLIM_ = 0.3V2400ppm/°C
Number of Consecutive Current-
Limit Events to Hiccup 7Events
Hiccup TimeoutOut of soft-start7936Switching
cycles
Cycle-by-Cycle, Low-Side,
Sink Peak Current-Limit Sense
Voltage
VLIM_/ V
BOOSTBoost Switch ResistanceVIN = VCC = 5.2V, IBST_ = 10mA4.58Ω
POWER-GOOD OUTPUTSPGOOD_ Threshold
VFB_ rising88.592.596.5%
VFB(NOMINAL)VFB_ falling85.589.593.5
PGOOD_ Output LeakageILEAK_PGDVPGOOD_ = 28V, VEN_ = 5V, VFB_
= 0.8V1µA
PGOOD_ Output Low VoltageVPGOOD_LIPGOOD_ = 2mA, EN_ = SGND0.4V
THERMAL SHUTDOWNThermal Shutdown Threshold+150°C
Thermal Shutdown HysteresisTemperature falling20°C
MAX15023Wide 4.5V to 28V Input,
Dual-Output Synchronous Buck ControllerSW
248061R(k)(24806hasaunit).(f(kHz))1.0663faradΩ=
Note 3: All Electrical Characteristics limits over temperature are 100% tested at room tempture and guaranteed by design over the specified temperature range.
Note 4: Select RT as
EFFICIENCY
vs. LOAD CURRENTMAX15023 toc01
LOAD CURRENT (A)
EFFICIENCY (%)1
VIN = 12V
VOUT1 = 1.2V
VOUT1 = 3.3V
EFFICIENCY
vs. LOAD CURRENTMAX15023 toc02
LOAD CURRENT (A)
EFFICIENCY (%)1
VOUT1 = 1.2V
VOUT1 = 3.3V
VIN = VCC = 5V
LOAD CURRENT (A)
OUTPUT VOLTAGE CHANGE
vs. LOAD CURRENTAX15023 toc03
(%8642
OUT1
VCC VOLTAGE
vs. LOAD CURRENTMAX15023 toc04
LOAD CURRENT (mA)
SUPPLY VOLTAGE (V)
VCC VOLTAGE
vs. IN VOLTAGE
AX15023 toc05
IN VOLTAGE (V)
(V2016128
ILOAD = 5mA
ILOAD = 50mA
VCC VOLTAGE
vs. TEMPERATUREMAX15023 toc06
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)3510-15
ILOAD = 5mA
SWITCHING FREQUENCY
vs. RTMAX15023 toc07
RT (kΩ)
SWITCHING FREQUENCY (kHz)705060304020
SWITCHING FREQUENCY
vs. TEMPERATURE
MAX15023 toc08
TEMPERATURE (ºC)
SWITCHING FREQUENCY (kHz)3510-15
RT = 22.1kΩ
RT = 33.2kΩ
RT = 66.5kΩ
IIN CURRENT
vs. SWITCHING FREQUENCYMAX15023 toc09
SWITCHING FREQUENCY (kHz)
IIN
CURRENT (mA)
VIN = 12V
CDL = CDH = 10nF
CDL = CDH = 4.7nF
CDL = CDH = 1nF
CDL = CDH = 0nF
(Supply = IN = 12V, unless otherwise noted. See Typical Application Circuit of Figure 6.)
MAX15023Wide 4.5V to 28V Input,
Dual-Output Synchronous Buck Controller
Typical Operating Characteristics
(Supply = IN = 12V, unless otherwise noted. See Typical Application Circuit of Figure 6.)
LOAD TRANSIENT ON OUT2MAX15023 toc16
10µs/div
VOUT2 (AC-COUPLED)
200mV/div
VOUT1 (AC-COUPLED)
100mV/div
IOUT2
2A/div
LOAD TRANSIENT ON OUT1MAX15023 toc15
10µs/div
VOUT1 (AC-COUPLED)
100mV/div
VOUT2 (AC-COUPLED)
50mV/div
IOUT1
5A/div
MAX15023 toc14
RLIM (kΩ)
CURRENT-LIMIT THRESHOLD (mV)504045152025303510
SOURCE CURRENT LIMIT
SINK CURRENT LIMIT
CURRENT-LIMIT THRESHOLD
vs. RLIM
SHUTDOWN CURRENT
vs. TEMPERATUREMAX15023 toc13
TEMPERATURE (ºC)
SHUTDOWN CURRENT (3510-15
LIM_ CURRENT
vs. TEMPERATURE
MAX15023 toc12
TEMPERATURE (C)
LIM_ CURRENT (3510-15
ILIM2
ILIM1
EN_ TURN-ON AND TURN-OFF THRESHOLD
vs. TEMPERATUREMAX15023 toc11
TEMPERATURE (C)
EN_ TURN-ON AND TURN-OFF THRESHOLDS3510-15
EN_ RISING
EN_ FALLING
IIN + IVCC CURRENT
vs. SWITCHING FREQUENCYMAX15023 toc10
SWITCHING FREQUENCY (kHz)
IIN
+ I
VCC
CURRENT (mA)
VIN = VCC = 5V
CDL_ = CDH_ = 10nF
CDL_ = CDH_ = 4.7nF
CDL_ = CDH_ = 1nF
CDL = CDH = 0nF
MAX15023Wide 4.5V to 28V Input,
Dual-Output Synchronous Buck Controller
Typical Operating Characteristics (continued)
(Supply = IN = 12V, unless otherwise noted. See Typical Application Circuit of Figure 6.)
STARTUP INTO PREBIASED OUTPUT
(0.5V PREBIASED)MAX15023 toc22
2ms/div
VOUT1
500mV/div
STARTUP AND TURN-OFF FROM INMAX15023 toc21
4ms/div
VIN
10V/div
VOUT2
2V/div
VPGOOD2
5V/div
IOUT2 = 500mA
STARTUP AND TURN-OFF FROM INMAX15023 toc20
4ms/div
VIN
10V/div
VOUT1
1V/div
VPGOOD1
5V/div
EN1 = EN2 = VCC
IOUT1 = 1.2A
STARTUP AND DISABLE FROM ENMAX15023 toc19
2ms/div
VEN2
5V/div
VIN
10V/div
VOUT2
2V/div
VPGOOD2
5V/div
IOUT2 = 500mA
STARTUP AND DISABLE FROM ENMAX15023 toc18
2ms/div
VEN1
5V/div
VIN
10V/div
VOUT1
500mV/div
VPGOOD1
5V/div
IOUT1 = 1.2A
LINE-TRANSIENT RESPONSEMAX15023 toc17
2ms/div
VIN
5V/div
VOUT1 (AC-COUPLED)
50mV/div
VOUT2 (AC-COUPLED)
100mV/div
MAX15023Wide 4.5V to 28V Input,
Dual-Output Synchronous Buck Controller
Typical Operating Characteristics (continued)
(Supply = IN = 12V, unless otherwise noted. See Typical Application Circuit of Figure 6.)
STARTUP INTO PREBIASED OUTPUT
(1V PREBIASED)MAX15023 toc23
2ms/div
VOUT1
500mV/div
STARTUP INTO PREBIASED OUTPUT
(1.5V PREBIASED)MAX15023 toc24
2ms/div
VOUT1
500mV/div
DH_ AND DL_ DISOVERLAPMAX15023 toc25
20ns/div
VDH1
10V/div
VDL1
5V/div
VLX1
10V/div
IOUT1 = 5A
DH_ AND DL_ DISOVERLAPMAX15023 toc26
20ns/div
VDH1
10V/div
VDL1
5V/div
VLX1
10V/div
IOUT1 = 5A
OUT-OF-PHASE SWITCHING FORMSMAX15023 toc27
1µs/div
VLX1
10V/div
VLX2
10V/div
ILX1
5A/div
ILX2
2A/div
IOUT1 = 5A
IOUT2 = 2.5A
SINK CURRENT-LIMIT WAVEFORMSMAX15023 toc28
100µs/div
VOUT1
200mV/div
VLX1
20V/div
ILX1
2A/div
1.5V PREBIASED
MAX15023Wide 4.5V to 28V Input,
Dual-Output Synchronous Buck Controller
Typical Operating Characteristics (continued)
PINNAMEFUNCTIONFB1Feedback Input for Regulator 1. Connect FB1 to a resistive divider between Output 1 and SGND to adjust
the output voltage between 0.6V and (0.85 x input voltage (V)). See the Setting the Output Voltage section.EN1
Active-High Enable Input for Regulator 1. When the voltage at EN1 exceeds 1.2V (typ), the controller begins
regulating OUT1. When the voltage falls below 1.05V (typ), the regulator is turned off. The EN1 input can be
used for power sequencing and as a secondary UVLO. Connect EN1 to VCC for always-on applications.EN2
Active-High Enable Input for Regulator 2. When the voltage at EN2 exceeds 1.2V (typ), the controller begins
regulating OUT2. When the voltage falls below 1.05V (typ), the regulator is turned off. The EN2 input can be
used for power sequencing and as a secondary UVLO. Connect EN2 to VCC for always-on applications.PGOOD1Power-Good Output (Open Drain) for Channel 1. To obtain a logic signal, pull up PGOOD1 with an external
resistor connected to a positive voltage below 28V.DL1Low-Side Gate-Driver Output for Regulator 1. DL1 swings from VCC to PGND1. DL1 is low before VCC
reaches the UVLO rising threshold voltage.PGND1Low-Side Gate-Driver Supply Return (Regulator 1). Connect to the source of the low-side MOSFET of
Regulator 1.LX1
External Inductor Connection for Regulator 1. Connect LX1 to the switched side of the inductor. LX1
serves as the lower supply rail for the DH1 high-side gate driver and as sensing input of the synchronous
MOSFET’s VDS drop (drain terminal).BST1Boost Flying-Capacitor Connection for Regulator 1. Connect a ceramic capacitor with a minimum value of
100nF between BST1 and LX1.DH1High-Side Gate-Driver Output for Regulator 1. DH1 swings from LX1 to BST1. DH1 is low before VCC
reaches the UVLO rising threshold voltage.DH2High-Side Gate-Driver Output for Regulator 2. DH2 swings from LX2 to BST2. DH2 is low before VCC
reaches the UVLO rising threshold voltage.BST2Boost Flying-Capacitor Connection for Regulator 2. Connect a ceramic capacitor with a minimum value of
100nF between BST2 and LX2.LX2
External Inductor Connection for Regulator 2. Connect LX2 to the switched side of the inductor. LX2
serves as the lower supply rail for the DH2 high-side gate driver and as sensing input of the synchronous
MOSFET’s VDS drop (drain terminal).
MAX15023Wide 4.5V to 28V Input,
Dual-Output Synchronous Buck Controller
Pin Description
PINNAMEFUNCTIONPGND2Low-Side Gate-Driver Supply Return (Regulator 2). Connect to the source of the low-side MOSFET of
Regulator 2.DL2Low-Side Gate-Driver Output for Regulator 2. DL2 swings from VCC to PGND2. DL2 is low before VCC
reaches the UVLO rising threshold voltage. PGOOD2Power-Good Output (Open Drain) for Channel 2. To obtain a logic signal, pull up PGOOD2 with an external
resistor connected to a positive voltage below 28V.VCC
Internal 5.2V Linear Regulator Output and the Device’s Core Supply. When using the internal regulator,
bypass VCC to SGND with a 4.7µF minimum low-ESR ceramic capacitor. If VCC is connected to IN for 5V
operation, then a 2.2µF ceramic capacitor is adequate for decoupling (see the Typical Application Circuits).FB2Feedback Input for Regulator 2. Connect FB2 to a resistive divider between output 2 and SGND to adjust the
output voltage between 0.6V and (0.85 x input voltage (V)). See the Setting the Output Voltage section.COMP2Compensation Pin for Regulator 2. See the Compensation section.RTOscillator-Timing Resistor Input. Connect a resistor from RT to SGND to set the oscillator frequency from
200kHz to 1MHz (see the Setting the Switching Frequency section).SGNDSignal Ground. Connect SGND to the SGND plane. SGND also serves as sensing input of the synchronous
MOSFET’s VDS drop (source terminals) for both channels.INInternal VCC Regulator Input. Bypass IN to SGND with a 1µF minimum ceramic capacitor when the internal
linear regulator (VCC) is used. When operating in the 5V ±10% range, connect IN to VCC.LIM2
Current-Limit Adjustment for Regulator 2. Connect a resistor (RLIM2) from LIM2 to SGND to adjust the
current-limit threshold (VITH2) from 30mV (RLIM2 = 6kΩ) to 300mV (RLIM2 = 60kΩ). See the Setting the
Cycle-by-Cycle Low-Side Source Peak Current Limit section.LIM1
Current-Limit Adjustment for Regulator 1. Connect a resistor (RLIM1) from LIM1 to SGND to adjust the
current-limit threshold (VITH1) from 30mV (RLIM1 = 6kΩ) to 300mV (RLIM1 = 60kΩ). See the Setting the
Cycle-by-Cycle Low-Side Source Peak Current Limit section.COMP1Compensation Pin for Regulator 1. See the Compensation section.EPExposed Paddle. Connect EP to a large copper plane at SGND potential to improve thermal dissipation. Do
not use as the main IC’s SGND ground connection.
MAX15023Wide 4.5V to 28V Input,
Dual-Output Synchronous Buck Controller
Pin Description (continued)
OSCILLATOR
ENABLE
LOGIC
VREF
EN1
ENABLE1COMPARATOR
THERMAL
SHUTDOWN
BANDGAP
REFERENCE
STARTUP
BIAS
VREF
VREF = 0.6V
VREF
EN2
SGND
LIM2LIM1
ENABLE2COMPARATOR
UVLO
UVLO
INTERNALVOLTAGE
REGULATOR
LIM
CURRENT
GENERATOR
MAX15023 GEN
VREF
CK2CK1
ENABLE1
ENABLE2
VREF
CK2
LIM2
SGND
LIM1
CK1
ENABLE1
ENABLE1
REF
ENABLE2
DC-DC CONVERTER 2
DC-DC CONVERTER 1
SOFT-START/
STOP LOGIC
AND
HICCUP LOGIC
COMP2
BST2
DH2
PGND2
PGOOD2
FB2
DL2
LX2
MAX15023VREF
0.925 x V
REF
CK1
FB1
DAC_VREF
PWMCOMPARATOR
RAMP
GENERATOR
BOOST
DRIVER
LOW-SIDE DRIVER
SINK
CURRENT-LIMIT
COMPARATOR
PGOOD
COMPARATOR
SOURCE
CURRENT-LIMIT
COMPARATOR
HIGH-SIDEDRIVER
PWM
PWM
CONTROL
LOGIC
RAMP
GATEP
HICCUP TIMEOUT
HICCUP
HICCUP
LIM1/20LIM1/10
HICCUP
TIMEOUT
COMP1BST1DH1LX1DL1PGND1FB1PGOOD1
MAX15023Wide 4.5V to 28V Input,
Dual-Output Synchronous Buck Controller
Functional Diagram
Detailed DescriptionThe MAX15023 dual, synchronous, step-down controller
operates from a 5.5V to 28V or 5V ±10% input voltage
range and generates two independent output voltages.
As long as the controller’s input bias voltage is within the
specified range, the input power bus can also be lower
than 4.5V and step-down conversion from a 3.3V rail
is also possible. Both output voltages can be set from
0.6V to 85% of regulator’s input voltage. Each output can
support loads of 12A or higher. The switching sequence
of the regulators is interleaved with 180° out-of-phase
operation, so that input voltage ripple and total RMS input
ripple current are reduced.
Enable inputs with precise turn-on/off threshold (±4.2%)
allow accurate external UVLO settings. Power-good
(PGOOD) open-drain outputs can be used for supply
sequencing.
The MAX15023’s capability to provide low output voltag-
es (down to 0.6V) and high output current (in excess of
12A) makes it ideal for applications where a 5V or 12V
bus is postregulated to deliver low voltages and high cur-
rents, such as in set-top boxes.
The switching frequency is adjustable from 200kHz to
1MHz using an external resistor. The MAX15023’s adap-
tive synchronous rectification eliminates the need for
external freewheeling Schottky diodes.
The MAX15023 utilizes voltage-mode control and exter-
nal compensation. The device also utilizes cycle-by-cycle
low-side source peak current limit for overcurrent pro-
tection, where the external low-side MOSFET’s on-re-
sistance is used as a current-sense element during the
inductor freewheeling time, eliminating the need for a
current-sense resistor. The current-limit threshold voltage
is resistor adjustable independently on each regulator
from 30mV to 300mV and is temperature compensated,
so that the effects of the MOSFET’s RDS(ON) variation
over temperature are reduced. Hiccup-mode current limit
reduces average current and power dissipation during a
prolonged short-circuit condition.
The MAX15023 also features a proprietary adaptive inter-
nal digital soft-start and allows prebias startup without
discharging the output. Adaptive digital soft-start, by act-
ing on the loop voltage reference, automatically prolongs
the soft-start time, if the current-limit threshold is reached
during the soft-start sequence. This increases the ability
to smoothly bring up a large, unknown amount of out-
put capacitance. Also, since soft-start is invoked during
hiccup-mode short-circuit protection, the same voltage
reference rollback algorithm achieves good control of the
peak inductor current during steady short-circuit or over-
load conditions.
An additional protection feature (cycle-by-cycle low-side
sink peak current limit) prevents the regulators from sink-
ing excessive amount of current if the prebias voltage
exceeds the programmed steady-state regulation level,
or if another voltage source is trying to force the output
above that. This way, the synchronous rectifier MOSFET
and the body diode of the high-side MOSFET do not
experience dangerous levels of current stress while the
regulator is sinking current from the output.
Thermal shutdown protects the MAX15023 from exces-
sive power dissipation.
DC-DC PWM ControllerThe MAX15023 step-down controller uses a PWM volt-
age-mode control scheme (see the Functional Diagram)
for each channel. Control loop compensation is external
for providing maximum flexibility in choosing the oper-
ating frequency and output LC filter components. An
internal transconductance error amplifier produces an
integrated error voltage at COMP_ that helps provide
higher DC accuracy. The voltage at COMP_ sets the duty
cycle using a PWM comparator and a ramp generator. On
the rising edge of its internal clock, the high-side n-chan-
nel MOSFET of each regulator turns on and remains on
until either the appropriate duty cycle or the maximum
duty cycle is reached. During the high-side MOSFET’s
on-time, the inductor current ramps up. During the sec-
ond-half of the switching cycle, the high-side MOSFET
turns off and the low-side n-channel MOSFET turns on.
Now the inductor releases the stored energy as its cur-
rent ramps down, providing current to the output. Under
overload conditions, when the inductor current exceeds
the selected cycle-by-cycle low-side source peak cur-
rent-limit threshold (see the Current-Limit Circuit (LIM_)
section), the high-side MOSFET does not turn on at the
subsequent clock rising edge and the low-side MOSFET
remains on to let the inductor current ramp down.
Interleaved Out-of-Phase OperationThe two independent regulators in the MAX15023 oper-
ate 180° out-of-phase to reduce input filtering require-
ments, reduce electromagnetic interference (EMI), and
improve efficiency. This effectively lowers component
cost and saves board space, making the MAX15023 ideal
for cost-sensitive applications.
MAX15023Wide 4.5V to 28V Input,
Dual-Output Synchronous Buck Controller
The internal oscillator frequency is divided down to obtain
separated clock signals for each regulator. The phase dif-
ference of the two clock signals is 180°, so that the high-
side MOSFETs turn on out-of-phase. The instantaneous
input current peaks of both regulators no longer overlap,
resulting in reduced RMS ripple current and input voltage
ripple. As a result, this allows an input capacitor with a
lower ripple-current rating to be used or allows the use
of fewer or less expensive capacitors, as well as reduces
EMI filtering and shielding requirements.
Internal 5.2V Linear RegulatorThe MAX15023’s internal functions and MOSFET drivers
are designed to operate from a 5V ±10% supply voltage.
If the available supply voltage exceeds 5.5V, a 5.2V inter-
nal low-dropout linear regulator is used to power internal
functions and the MOSFET drivers at VCC. If an external
5V ±10% supply voltage is available, then IN and VCC can
be tied to the 5V supply. The maximum regulator input
voltage (VIN) is 28V. The regulator’s input (IN) must be
bypassed to SGND with a 1µF ceramic capacitor when
the regulator is used. Bypass the regulator’s output (VCC)
with a 4.7µF ceramic capacitor to SGND. The VCC drop-
out voltage is typically 70mV, so when VIN is greater than
5.5V, VCC is typically 5.2V. The MAX15023 also employs UVLO circuit that disables both regulators when VCC
falls below 3.8V (typ). The 430mV UVLO hysteresis pre-
vents chattering on power-up/power-down.
The internal VCC linear regulator can source up to 100mA
to supply the IC, power the low-side gate drivers, recharge
the external boost capacitors, and supply small external
loads. The current available for external loads depends
on the current consumed for the MOSFET gate drive.
For example, when switched at 600kHz, a single MOSFET
with 18nC total gate charge (at VGS = 5V) requires 18nC
x 600kHz ≅ 11mA. Since four MOSFETs are driven and
6mA (max) is used by the internal control functions, the
current available for external loads is:
(100 – (4 x 11) – 6)mA ≅ 50mA
MOSFET Gate Drivers (DH_, DL_)The DH_ and DL_ drivers are optimized for driving large
size n-channel power MOSFETs. Under normal operating
conditions and after startup, the DL_ low-side drive wave-
form is always the complement of the DH_ high-side drive
waveform (with controlled dead time to prevent cross-con-
duction or shoot-through). On each channel, an adaptive
dead-time circuit monitors the DH and DL outputs and
prevents the opposite-side MOSFET from turning on until
high-side driver to turn on only when the DL_ gate driver has
been turned off. Similarly, it prevents the low-side (DL_) from
turning on until the DH_ gate driver has been turned off.
The adaptive driver dead time allows operation without
shoot-through with a wide range of MOSFETs, minimiz-
ing delays, and maintaining efficiency. There must be a
low-resistance, low-inductance path from the DL_ and
DH_ drivers to the MOSFET gates for the adaptive dead-
time circuits to work properly. Otherwise, because of the
stray impedance in the gate discharge path, the sense
circuitry could interpret the MOSFET gates as off while
the VGS of the MOSFET is still high. To minimize stray
impedance, use very short, wide traces (50 mils to 100
mils wide if the MOSFET is 1in from the driver).
Synchronous rectification reduces conduction losses in the
rectifier by replacing the normal low-side Schottky catch
diode with a low-resistance MOSFET switch. The internal
pulldown transistor that drives DL_ low is robust, with a 0.75Ω (typ) on-resistance. This low on-resistance helps
prevent DL_ from being pulled up during the fast rise time
of the LX_ node, due to capacitive coupling from the drain
to the gate of the low-side synchronous rectifier MOSFET.
High-Side Gate-Drive Supply (BST_)
and Internal Boost SwitchesThe high-side MOSFET is turned on by closing an inter-
nal switch between BST_ and DH_. This provides the
necessary gate-to-source voltage to turn on the high-side
MOSFET, an action that boosts the gate drive signal
above VIN. The boost capacitor connected between
BST_ and LX_ holds up the voltage across the gate driver
during the high-side MOSFET on-time.
The charge lost by the boost capacitor for delivering the
gate charge is refreshed when the high-side MOSFET is
turned off and LX_ node swings down to ground. When
the corresponding LX_ node is low, an internal high-volt-
age switch connected between VCC and BST_ recharges
the boost capacitor to the VCC voltage. The need for
external boost diodes is negated. See the Boost Flying-
Capacitor Selection section in the Design Procedure sec-
tion to choose the right size of the boost capacitor.
Enable Inputs (EN_), Adaptive Soft-Start and Soft-StopThe MAX15023 can be used regulate two independent
outputs. Each of the two outputs can be turned on and
off independently of one another by controlling the enable
input of each phase (EN1 and EN2).
A logic-high on each enable pin turns on the correspond-
ing channel. Then, the soft-start sequence is initiated by
MAX15023Wide 4.5V to 28V Input,
Dual-Output Synchronous Buck Controller
the inductor current around its limit value, rather than the
output voltage. The soft-start time can be prolonged up to
4096 clock cycles (twice the normal soft-start duration).
This implementation allows the soft-start time to be auto-
matically adapted to the time necessary to keep the LX
current below the limit while charging the output capacitor.
Since soft-start is invoked by the hiccup-mode short-cir-
cuit protection, also see the Hiccup Mode Overcurrent
Protection section for additional details.
Power-Good Outputs (PGOOD_)The MAX15023 includes two power-good comparators
to monitor the regulators’ output voltages and detect the
power-good threshold, fixed at 92.5% of the nominal FB
voltage. The PGOOD_ outputs are open-drain and should
be pulled up with an external resistor to the supply volt-
age of the logic input they drive. This voltage should not
exceed 28V. They can sink up to 2mA of current while low.
amplifier. The duration of the soft-start ramp is 204witch-
ing cycles and the resolution is 1/64 of the steady-state
regulation voltage. This allows a smooth increase of the
output voltage. A logic-low on each EN_ initiates a soft-
stop sequence by stepping down the reference voltage
of the error amplifier. After the soft-stop sequence is
completed, the MOSFET drivers are both turned off. See
Figure 1 for more detail.
Connect EN1 and EN2 to VCC for always-on operation.
Owing to their accurate turn-on and turn–off thresholds,
EN1 and EN2 can be used as a UVLO adjustment input
and for power sequencing together with the PGOOD_
outputs. (See the Setting the Enable Input (EN_) section).
The adaptive action in the soft-start becomes visible if
the cycle-by-cycle, low-side, source peak current limit
is reached during the soft-start ramping sequence. In
this case, the rate-of-rise of the internal reference is
decreased, so that the PWM controller tries to regulate to
VCCCDE
2048 CLK
CYCLES
2048 CLK
CYCLESGHIAUVLO
EN_
VOUT_
DAC_VREF_
DH_
DL_
UVLOUndervoltage threshold value is provided in
the Electrical Characteristics table.
Internal 5.2V linear regulator output.
Active-high enable input.
Regulator output voltage.
Regulator internal soft-start and soft-stop signal.
Regulator high-side gate-driver output.
Regulator low-side gate-driver output.
VCC rising while below the UVLO threshold.
EN_ is low.
VCC
EN_
VOUT_
DAC_VREF_
DH_
DL_
SYMBOLDEFINITIONVCC is higher than the UVLO threshold. EN_ is low.
EN is pulled high. DH_ and DL_ start switching.
Normal operation.
VCC drops below UVLO.
VCC goes above UVLO threshold. DH_ and DL_
start switching. Normal operation.
EN_ is pulled low. VOUT_ enters soft-stop.
EN_ is pulled high. DH_ and DL_ start switching. Normal operation.
VCC drops below UVLO.
SYMBOLDEFINITIONDEFINITIONMAX15023Wide 4.5V to 28V Input,
Dual-Output Synchronous Buck Controller
