MAX1393ETB+ ,1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/2-Channel Single-Ended, 12-Bit, SAR ADCsFeaturesThe MAX1393/MAX1396 micropower, serial-output, 12-♦ 312.5ksps, 12-Bit Successive-Approximat ..
MAX139CPL ,3Digit A/D Converters with Bandgap Refrence and Charge-Pump Voltage ConverterApplications MAX138CMH 0°C to +70°C 44 MOFP
5V P d P l M t MAX13BCQH (Y'C to +70°C 44 PLCC
+ ower ..
MAX139CPL ,3Digit A/D Converters with Bandgap Refrence and Charge-Pump Voltage ConverterFeatures
. Single Supply +2.5V to +7.0V Operation
. Measures Both Positive and Negative Input
..
MAX139CPL+ ,3 1/2 Digit ADC with Reference, Charge Pump, and Direct LED DriversApplications MAXTEBCMH (Y'C to +70”C 44 MQFP
V P d P I M MAX138CQH 0% to +70°C 44 PLCC
" owere an ..
MAX139CQH ,3Digit A/D Converters with Bandgap Refrence and Charge-Pump Voltage ConverterGeneral Description
The MAX138/MAX139 are 31/2 digit A/D converters (ADCs)
with on-board LCD (M ..
MAX1400CAI ,%V, 18-Bit, Low-Power, Multichannel, Oversampling Sigma-Delta ADCFeaturesThe MAX1400 18-bit, low-power, multichannel, serial-' 18-Bit Resolution, Sigma-Delta ADCout ..
MAX4017ESA+T ,Low-Cost, High-Speed, Single-Supply, Gain of +2 Buffers with Rail-to-Rail Outputs in SOT23General Description ________
MAX4017EUA ,Low-Cost / High-Speed / Single-Supply / Gain of +2 Buffers with Rail-to-Rail Outputs in SOT23FeaturesThe MAX4014/MAX4017/MAX4019/MAX4022 are preci-' Internal Precision Resistors for Closed-Loo ..
MAX4018EEE ,Low-Cost / High-Speed / SOT23 / Single-Supply Op Amps with Rail-to-Rail OutputsGeneral Description ________
MAX4018EEE+ ,Low-Cost, High-Speed, Single-Supply Op Amps with Rail-to-Rail OutputsApplicationsOrdering InformationSet-Top BoxesSurveillance Video SystemsTEMP PIN- TOPPARTBattery-Pow ..
MAX4018ESD ,Low-Cost / High-Speed / SOT23 / Single-Supply Op Amps with Rail-to-Rail OutputsApplications______________Ordering InformationSet-Top BoxesSOTSurveillance Video Systems TEMP. PIN- ..
MAX4019EEE ,Low-Cost / High-Speed / Single-Supply / Gain of +2 Buffers with Rail-to-Rail Outputs in SOT23applications that require wide bandwidth, such as-75dB Total Harmonic Distortionvideo, communicatio ..
MAX1393ETB+
1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/2-Channel Single-Ended, 12-Bit, SAR ADCs
General DescriptionThe MAX1393/MAX1396 micropower, serial-output, 12-
bit, analog-to-digital converters (ADCs) operate with a
single power supply from +1.5V to +3.6V. These ADCs
feature automatic shutdown, fast wake-up, and a high-
speed 3-wire interface. Power consumption is only
0.734mW (VDD= +1.5V) at the maximum conversion rate
of 312.5ksps. AutoShutdown™ between conversions
reduces power consumption at slower throughput rates.
The MAX1393/MAX1396 require an external reference
VREFthat has a wide range from 0.6V to VDD. The
MAX1393 provides one true-differential analog input
that accepts signals ranging from 0 to VREF(unipolar
mode) or ±VREF/2 (bipolar mode). The MAX1396 pro-
vides two single-ended inputs that accept signals rang-
ing from 0 to VREF.Analog conversion results are
available through a 5MHz 3-wire SPI™-/QSPI™-/
MICROWIRE™-/digital signal processor (DSP)-compati-
ble serial interface. Excellent dynamic performance,
low voltage, low power, ease of use, and small pack-
age sizes make these converters ideal for portable bat-
tery-powered data-acquisition applications, and for
other applications that demand low power consumption
and minimal space.
The MAX1393/MAX1396 are available in a space-saving
(3mm x 3mm) 10-pin TDFN package. The parts operate
over the extended (-40°C to +85°C) temperature range.
ApplicationsPortable Datalogging
Data Acquisition
Medical Instruments
Battery-Powered Instruments
Process Control
Features312.5ksps, 12-Bit Successive-Approximation
Register (SAR) ADCsSingle True-Differential Analog Input Channel
with Unipolar-/Bipolar-Select Input (MAX1393)Dual Single-Ended Input Channel with Channel-
Select Input (MAX1396)±1 LSB INL, ±1 LSB DNL, No Missing Codes±2 LSB Total Unadjusted Error (TUE)70dB SINAD at 75kHz Input FrequencyExternal Reference (0.6V to VDD)Single-Supply Voltage (+1.5V to +3.6V)0.915mW at 300ksps, 1.8V0.305mW at 100ksps, 1.8V3.1µW at 1ksps, 1.8V< 1µA Shutdown CurrentAutoShutdown Between ConversionsSPI-/QSPI-/MICROWIRE-/DSP-Compatible,
3- or 4-Wire Serial InterfaceSmall (3mm x 3mm) 10-Pin TDFN Package
MAX1393/MAX1396
1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/
2-Channel Single-Ended, 12-Bit, SAR ADCs
Ordering Information19-3644; Rev 2; 10/09
EVALUATION KIT
AVAILABLE
PARTTEMP RANGEPIN-PACKAGEANALOG INPUTSTOP MARK
MAX1393ETB+ -40°C to +85°C 10 TDFN-EP* 1-CH DIFF AOZ
MAX1396ETB+ -40°C to +85°C 10 TDFN-EP* 2-CH S/E APC
AutoShutdown is a trademark of Maxim Integrated Products, Inc.
SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
Typical Operating Circuit and Pin Configurations appear at
end of data sheet.+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
MAX1393/MAX1396
1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/
2-Channel Single-Ended, 12-Bit, SAR ADCs
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VDD = +1.5V to +3.6V, VREF= VDD, CREF = 0.1μF, fSCLK = 5MHz, TA= TMINto TMAX, unless otherwise noted. Typical values are at= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND..............................................................-0.3V to +4V
SCLK, CS, OE, CH1/CH2, UNI/BIP,
DOUT to GND.........................................-0.3V to (VDD+ 0.3V)
AIN+, AIN-, AIN1, AIN2, REF to GND........-0.3V to (VDD+ 0.3V)
Maximum Current into Any Pin.........................................±50mA
Continuous Power Dissipation (TA= +70°C)
10-Pin TDFN (derate 18.5mW/°C above +70°C)....1481.5mW
Operating Temperature Ranges
MAX139_E_ _...................................................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
DC ACCURACY (Note 1)Resolution12Bits
Integral NonlinearityINL±1LSB
Differential NonlinearityDNLNo missing code overtemperature±1LSB
Offset Error0.5±2LSB
Gain ErrorOffset nulled0.5±2LSB
Total Unadjusted ErrorTUE±2LSB
Offset-Error Temperature
Coefficient±0.004LSB/°C
Gain-Error Temperature
Coefficient±0.001LSB/°C
Channel-to-Channel Offset
MatchingMAX1396 only±0.1LSB
Channel-to-Channel Gain
MatchingMAX1396 only±0.1LSB
Input Common-Mode RejectionCMRVCM = 0 to VDD, MAX1393 only±0.1mV/V
DYNAMIC SPECIFICATIONS (Note 2)VREF = VDD = 1.670
VREF = VDD = 1.8–2.569Signal-to-Noise Plus DistortionSINAD
VREF = VDD = 2.5–3.670
VREF = VDD = 1.670.5
VREF = VDD = 1.8–2.57071Signal-to-Noise RatioSNR
VREF = VDD = 2.5–3.671
Total Harmonic DistortionTHD-83-75dBc
Spurious-Free Dynamic RangeSFDR-85-76dBc
Intermodulation DistortionIMDfIN1 = 73kHz at -6.5dBFS,
fIN2 = 77kHz at -6.5dBFS-78dB
Channel-to-Channel CrosstalkMAX1396 only-70dB
MAX1393/MAX1396
1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/
2-Channel Single-Ended, 12-Bit, SAR ADCs
ELECTRICAL CHARACTERISTICS (continued)(VDD = +1.5V to +3.6V, VREF= VDD, CREF = 0.1μF, fSCLK = 5MHz, TA= TMINto TMAX, unless otherwise noted. Typical values are at= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSFull-Power Bandwidth-3dB point4MHz
MAX1393200Full-Linear BandwidthSINAD > 68dBMAX1396150kHz
CONVERSION RATEConversion TimetCONV13 clock cycles2.6μs
Throughput Rate16 clock cycles per conversion; includes
power-up, acquisition, and conversion time312.5ksps
Power-Up and Acquisition TimetACQThree SCLK cycles600ns
Aperture DelaytAD8ns
Aperture JittertAJ30ps
Serial Clock FrequencyfCLK0.15.0MHz
ANALOG INPUTS (AIN+, AIN-, AIN1, AIN2)Unipolar0VREFInput Voltage RangeVINBipolar, MAX1393 only, (AIN+ - AIN-)-VREF/2+VREF/2V
Common-Mode Input Voltage
RangeVCMBipolar, MAX1393 only, [(AIN+) + (AIN-)] / 20VDDV
Input Leakage CurrentChannel not selected, or conversion
stopped, or in shutdown mode±1μA
Input Capacitance16pF
REFERENCE INPUT (REF)REF Input Voltage RangeVREF0.6VDD +
0.05V
REF Input Capacitance24pF
REF DC Leakage Current0.025±2.5μA
REF Input Dynamic Current312.5ksps2060μA
DIGITAL INPUTS (SCLK, CS, OE, CH1/CH2, UNI/BIP)Input-Voltage LowVIL0.3 x
VDDV
Input-Voltage HighVIH0.7 x
VDDV
Input Hysteresis0.06 x
VDDV
Input Leakage CurrentIILInputs at GND or VDD±1μA
CS, OE1Input CapacitanceCINCH1/CH2, UNI/BIP12.5pF
DIGITAL OUTPUT (DOUT)Output-Voltage LowVOLISINK = 2mA0.1 x
VDDV0.9 x
MAX1393/MAX1396
1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/
2-Channel Single-Ended, 12-Bit, SAR ADCs
ELECTRICAL CHARACTERISTICS (continued)(VDD = +1.5V to +3.6V, VREF= VDD, CREF = 0.1μF, fSCLK = 5MHz, TA= TMINto TMAX, unless otherwise noted. Typical values are at= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSTri-State Leakage CurrentILTOE = VDD±1μA
Tri-State Output CapacitanceCOUTOE = VDD10pF
POWER SUPPLYPositive Supply VoltageVDD1.53.6V
VDD = 1.6V176200fSAMPLE = 100kspsVDD = 3V225260
VDD = 1.6V520600fSAMPLE = 312.5kspsVDD = 3V710800
Power-down mode (Note 4)510
Positive Supply Current (Note 3)IDD
Power-down mode (Note 5)0.2±2.5
Power-Supply RejectionPSRVDD = 1.5V to 3.6V, full-scale input (Note 6)±150±1000μV/V
TIMING CHARACTERISTICS(VDD = +1.5V to +3.6V, VREF= VDD, CREF = 0.1μF, fSCLK = 5MHz, TA= TMINto TMAX, unless otherwise noted. Typical values are at= +25°C.) (Figure 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSSCLK Clock PeriodtCP20010,000ns
SCLK Pulse-Width HightCH90ns
SCLK Pulse-Width LowtCL90ns
CS Fall to SCLK Rise SetuptCSS80ns
SCLK Rise to CS Fall IgnoretCSO0ns
SCLK Fall to DOUT ValidtDOVCLOAD = 0 to 30pF1080ns
OE Rise to DOUT DisabletDOD620ns
OE Fall to DOUT EnabletDOE920ns
CS Pulse-Width High or LowtCSW80ns
OE Pulse-Width High or LowtOEW80ns
CH1/CH2 Setup Time (to the
First SCLK)tCHSMAX1396 only10ns
CH1/CH2 Hold Time (to the First
SCLK)tCHHMAX1396 only0ns
UNI/BIP Setup Time (to the First
SCLK)tUBSMAX1393 only10ns
UNI/BIP Hold Time (to the First
SCLK)tUBHMAX1393 only0ns
Note 1:VDD = 1.5V, VREF = 1.5V, and VAIN= 1.5V.
Note 2:VDD = 1.5V, VREF = 1.5V, VAIN= 1.5VP-P, fSCLK= 5MHz, fSAMPLE= 312.5ksps, and fIN(sine wave) = 75kHz.
Note 3:All digital inputs swing between VDDand GND. VREF= VDD,fIN= 75kHz sine wave, VAIN= VREFP-P,CLOAD = 30pF on DOUT.
Note 4:CS= VDD, OE= UNI/BIP= CH1/CH2 = VDDor GND, SCLK is active.
Note 5:CS= VDD, OE= UNI/BIP= CH1/CH2 = VDDor GND, SCLK is inactive.
MAX1393/MAX1396
1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/
2-Channel Single-Ended, 12-Bit, SAR ADCsSCLK
DOUT
UNI/BIP OR
CH1/CH2
tUBS
tCHS
tUBH
tCHH
tCSOtCSStCLtCH
tCPtDOE
HIGH-Z
tDOV
tOEW
tCSW
tDOD
HIGH-Z
Figure 1. Detailed Serial-Interface Timing Diagram
GND
50pF
50pF
DOUT
DOUT
GND
VDD
a) HIGH IMPEDANCE TO VOH, VOL TO VOH,
AND VOH TO HIGH IMPEDANCE
b) HIGH IMPEDANCE TO VOL, VOH TO VOL,
AND VOL TO HIGH IMPEDANCE
10mA
10mA
Figure 2. Load Circuits for Enable/Disable Times
1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/
2-Channel Single-Ended, 12-Bit, SAR ADCs
MAX1393/MAX1396
Typical Operating Characteristics(VDD= +1.5V, VREF= +1.5V, CREF= 0.1μF, CL= 30pF, fSCLK= 5MHz. TA= +25°C, unless otherwise noted.)
INL vs. CODEMAX1393/96 toc01
CODE
INL (LSB)
VDD = 1.5V
VREF = 1.5V
INL ERROR vs. REFERENCE VOLTAGEMAX1393/96 toc02
REFERENCE VOLTAGE (V)
INL ERROR (LSB)
VDD = 3.6V
MAX INL
MIN INL
DNL vs. CODEMAX1393/96 toc03
CODE
DNL (LSB)
VDD = 1.5V
VREF = 1.5V
DNL ERROR vs. REFERENCE VOLTAGEMAX1393/96 toc04
REFERENCE VOLTAGE (V)
DNL ERROR (LSB)
VDD = 3.6V
MAX DNL
MIN DNL
OFFSET ERROR vs. SUPPLY VOLTAGEMAX1393/96 toc05
SUPPLY VOLTAGE (V)
OFFSET ERROR (
VREF = 1.5V
TEMPERATURE = +25°C
AIN1
AIN2
OFFSET ERROR vs. TEMPERATUREMAX1393/96 toc06
TEMPERATURE (°C)
OFFSET ERROR (-2553565
VDD = 2.6V
OFFSET ERROR
vs. REFERENCE VOLTAGEMAX1393/96 toc07
REFERENCE VOLTAGE (V)
OFFSET ERROR (
VDD = 3.6V
GAIN ERROR vs. SUPPLY VOLTAGEMAX1393/96 toc08
SUPPLY VOLTAGE (V)
GAIN ERROR (
VREF = 1.5V
TEMPERATURE = +25°C
GAIN ERROR vs. TEMPERATUREMAX1393/96 toc09
TEMPERATURE (°C)
GAIN ERROR (-2553565
VDD = 2.6V
AIN1
AIN2
MAX1393/MAX1396
1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/
2-Channel Single-Ended, 12-Bit, SAR ADCs
Typical Operating Characteristics (continued)(VDD= +1.5V, VREF= +1.5V, CREF= 0.1μF, CL= 30pF, fSCLK= 5MHz. TA= +25°C, unless otherwise noted.)
GAIN ERROR
vs. REFERENCE VOLTAGEMAX1393/96 toc10
REFERENCE VOLTAGE (V)
GAIN ERROR (
VDD = 3.6V
SUPPLY CURRENT
vs. SUPPLY VOLTAGEMAX1393/96 toc11
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (
VREF = 1.5V, CL = 33pF
fSCLK = 4.8MHz, fSAMPLE = 300ksps
AIN = FULL SCALE, 10kHz SINE WAVE
SUPPLY CURRENT vs. TEMPERATUREMAX1393/96 toc12
TEMPERATURE (°C)
SUPPLY CURRENT (65355-25
VREF = 1.5V, CL = 33pF
fSCLK = 4.8MHz, fSAMPLE = 300ksps
AIN = FULL SCALE, 10kHz SINE WAVE
SUPPLY CURRENT
vs. CONVERSION RATEMAX1393/96 toc13
fSAMPLE (ksps)
SUPPLY CURRENT (
fSCLK = 5MHz, fSAMPLE = 312.5ksps
AIN = FULL SCALE, 75kHz SINE WAVE
CL = 30pF
VDD = VREF = 1.6V
VDD = VREF = 3.0V
SHUTDOWN CURRENT
vs. SUPPLY VOLTAGEMAX1393/96 toc14
SUPPLY VOLTAGE (V)
SHUTDOWN CURRENT (
SERIAL CLOCK IDLE
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATUREMAX1393/96 toc15
TEMPERATURE (°C)
SHUTDOWN SUPPLY CURRENT (65355-25
VDD = 1.8VVDD = 3.6V
SCLK-TO-DOUT TIMINGMAX1393/96 toc16
CLOAD (pF)
DOUT DELAY (ns)
VDD = 3.6V
VDD = 1.5V
FFTMAX1393/96 toc17
FREQUENCY (kHz)
MAGNITUDE (dB)
VDD = 2.5V
VREF = 2.5V
fS = 312.5ksps
fIN = 75kHz
THD = -90.3dB
SINAD = 72.1dB
SFDR = 93.3dB
SAMPLING ERROR
vs. SOURCE IMPEDANCEMAX1393/96 toc18
SOURCE IMPEDANCE (Ω)
SAMPLING ERROR (LSB)
AIN HIGH-TO-LOW FS TRANSITION
AIN LOW-TO-HIGH FS TRANSITION
MAX1393/MAX1396
Detailed DescriptionThe MAX1393/MAX1396 use an input track and hold
(T/H) circuit along with a SAR to convert an analog input
signal to a serial 12-bit digital output data stream. The
serial interface provides easy interfacing to microproces-
sors and DSPs. Figure 3 shows the simplified functional
diagram for the MAX1393 (1 channel, true differential)
and the MAX1396 (2 channels, single ended).
True-Differential Analog Input T/HThe equivalent input circuit of Figure 4 shows the
MAX1393/MAX1396 input architecture, which is com-
posed of a T/H, a comparator, and a switched-capacitor
DAC. The T/H enters its tracking mode on the falling
edge of CS(while OEis held low). The positive input
capacitor is connected to AIN+ (MAX1393), or to AIN1 or
AIN2 (MAX1396). The negative input capacitor is con-
nected to AIN- (MAX1393) or GND (MAX1396). The T/H
enters its hold mode on the 3rd falling edge of SCLK
1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/
2-Channel Single-Ended, 12-Bit, SAR ADCs
PIN
MAX1393MAX1396
NAMEFUNCTION1 1 VDDPositive Supply Voltage. Connect VDD to a 1.5V to 3.6V power supply. Bypass VDD to GND
with a 0.1μF capacitor as close to the device as possible. — AIN- Negative Analog Input 2 AIN2 Analog Input Channel 2 — AIN+ Positive Analog Input 3 AIN1 Analog Input Channel 1
4 4 GND Ground
5 5 REF External Reference Voltage Input. VREF = 0.6V to (VDD + 0.05V). Bypass REF to GND with a
0.1μF capacitor as close to the device as possible.
6 — UNI/BIP
Input-Mode Select. Drive UNI/BIP high to select unipolar input mode. Pull UNI/BIP low to
select bipolar input mode. In unipolar mode, the output data is in straight binary format. In
bipolar mode, the output data is in two’s complement format.
— 6 CH1/CH2 Channel-Select Input. Pull CH1/CH2 low to select channel 1. Drive CH1/CH2 high to select
channel 2.
7 7 OE
Active-Low Output Enable. Pull OE low to enable DOUT. Drive OE high to disable DOUT.
Connect to CS to interface with SPI, QSPI, and MICROWIRE devices or set low to interface
with DSP devices.
8 8 CS Active-Low Chip-Select Input. A falling edge on CS initiates power-up and acquisition.
9 9 DOUT Serial-Data Output. DOUT changes state on the falling edge of SCLK. DOUT is high
impedance when OE is high.
10 10 SCLK
Serial-Clock Input. SCLK drives the conversion process and clocks data out. Acquisition
ends on the 3rd falling edge after the CS falling edge. The LSB is clocked out on the SCLK
15th falling edge and the device enters AutoShutdown mode (see Figures 8, 9, and 10). — EP Exposed Pad. Not internally connected. Connect the exposed pad to GND or leave unconnected.
Pin DescriptionDOUT
VDD
REF
12-BIT SAR
ADC
SCLK
GND
OUTPUT
SHIFT
REGISTER
CONTROL
LOGIC AND
TIMING
*INDICATES THE MAX1396
AIN+ (AIN1)*
AIN- (AIN2)*
INPUT
MUX
AND T/H
UNI/BIP
(CH1/CH2)*
MAX1393
MAX1396
and the difference between the sampled positive and
negative input voltages is converted. The time required
for the T/H to acquire an input signal is determined by
how quickly its input capacitance is charged. The
required acquisition time lengthens as the input signal’s
source impedance increases. The acquisition time,
tACQ, is the minimum time needed for the signal to be
acquired. It is calculated by the following equation:
tACQ≥9 x (RSOURCE+ RIN) x CIN+ tPU
where:
RSOURCEis the source impedance of the input signal.
RIN= 500Ω, which is the equivalent differential analog
input resistance.
CIN= 16pF, which is the equivalent differential analog
input capacitance.
tPU= 400ns.
Note:tACQis never less than 600ns and any source
impedance below 400Ωdoes not significantly affect the
ADC’s AC performance.
Analog Input BandwidthThe ADC’s input-tracking circuitry has a 4MHz full-
power bandwidth, making it possible to digitize high-
speed transient events and measure periodic signals
with bandwidths exceeding the ADC’s sampling rate by
using undersampling techniques.
Use anti-alias filtering to avoid high-frequency signals
being aliased into the frequency band of interest.
Analog Input Range and ProtectionThe MAX1393/MAX1396 produce a digital output that
corresponds to the analog input voltage as long as the
analog inputs are within their specified range. When
operating the MAX1393 in unipolar mode (UNI/BIP= 1),
the specified differential analog input range is from 0 to
VREF. When operating in bipolar mode (UNI/BIP= 0),
the differential analog input range is from -VREF/2 to
+VREF/2 with a common-mode range of 0 to VDD. The
MAX1396 has an input range from 0 to VREF.
Internal protection diodes confine the analog input volt-
age within the region of the analog power input rails
(VDD, GND) and allow the analog input voltage to swing
from GND - 0.3V to VDD+ 0.3V without damage. Input
voltages beyond GND - 0.3V and VDD+ 0.3V forward
bias the internal protection diodes. In this situation, limit
the forward diode current to less than 50mA to avoid
damage to the MAX1393/MAX1396.
Output Data FormatFigures 8, 9, and 10 illustrate the conversion timing for
the MAX1393/MAX1396. Sixteen SCLK cycles are
required to read the conversion result and data on
DOUT transitions on the falling edge of SCLK. The con-
version result contains 4 zeros, followed by 12 data bits
with the data in MSB-first format. For the MAX1393, data
is straight binary for unipolar mode and two’s comple-
ment for bipolar mode. For the MAX1396, data is always
straight binary.
Transfer FunctionFigure 5 shows the unipolar transfer function for the
MAX1393/MAX1396. Figure 6 shows the bipolar trans-
fer function for the MAX1393. Code transitions occur
halfway between successive-integer LSB values.
MAX1393/MAX1396
1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/
2-Channel Single-Ended, 12-Bit, SAR ADCsHOLD
TRACK
CIN+
REF
GNDDAC
CIN-
RIN+RIN-
VDD/2
RSOURCE
COMPARATOR
HOLD
HOLD
AIN2
AIN1 (AIN+)*
GND (AIN-)*
ANALOG
SIGNAL
SOURCE
MAX1393
MAX1396
*INDICATES THE MAX1393
Figure 4. Equivalent Input Circuit
