MAX1338ETN+ Fast Delivery |IC PHOENIX CO.,LIMITED

MAX1338ETN+ ,14-Bit, 4-Channel, Software-Programmable, Multiranging, Simultaneous-Sampling ADCApplications♦ +2.7V to +5.25V Digital I/O Supply Multiple-Channel Data Recorders♦ 56-Pin Thin QFN P ..
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MAX1338ETN+
14-Bit, 4-Channel, Software-Programmable, Multiranging, Simultaneous-Sampling ADC
General Description
The MAX1338 14-bit, analog-to-digital converter (ADC)
offers four simultaneously sampled, fully differential input
channels, with independent track-and-hold (T/H) circuitry
for each channel. The input channels are individually
software programmable for input ranges of ±10V, ±5V,
±2.5V, and ±1.25V. The input channels feature fault tol-
erance to ±17V. The internal T/H circuits have a 16ns
aperture delay and 100ps aperture-delay matching.
A 14-bit parallel bus provides the conversion result with
a maximum per-channel output rate of 150ksps
(600ksps for all four channels). The MAX1338 has an
on-board oscillator and 2.5V internal reference. An
external clock and/or reference can also be used.
The MAX1338 operates from a +5V supply for analog
inputs and digital core. The device operates from a +2.7V
to +5.25V supply for the digital I/O lines. The MAX1338
features two power-saving modes: standby mode and
shutdown mode. Standby mode allows rapid wake-up
and reduces quiescent current to 4mA (typ), and shut-
down mode reduces sleep current to less than 10µA (typ).
The MAX1338 is available in an 8mm x 8mm x 0.8mm,
56-pin, thin QFN package. The device operates over
the extended -40°C to +85°C temperature range.
Applications
Multiple-Channel Data Recorders
Vibration Analysis
Motor Control: 3-Phase Voltage, Current, and
Power Measurement
Optical Communication Equipment
Features150ksps Sample Rate per ChannelAll Four Input Channels Simultaneously Sampled
16ns Aperture Delay
100ps Aperture-Delay Matching Channel-Independent Software-Selectable Input
Range: ±10V, ±5V, ±2.5V, ±1.25V±17V Fault-Tolerant InputsDynamic Performance at 10kHz Input
SNR: 77dB
SINAD: 76dB
SFDR: 98dBc
THD: -83dBcDC Performance
INL: ±2 LSB
DNL: ±1 LSB
Offset Error: ±4 LSB
Gain Error: ±0.1% FSR14-Bit Parallel InterfaceInternal Clock and Reference Voltage+5V Analog and Digital Supplies +2.7V to +5.25V Digital I/O Supply 56-Pin Thin QFN Package (8mm x 8mm x 0.8mm)
MAX1338
14-Bit, 4-Channel, Software-Programmable,
Multiranging, Simultaneous-Sampling ADC
Ordering Information
19-3151; Rev 1; 7/04
PARTTEMP RANGEPIN-PACKAGE
MAX1338ETN-40°C to +85°C56 Thin QFN-EP*
*EP = Exposed pad.
Pin Configuration appears at end of data sheet.
MAX1338
14-Bit, 4-Channel, Software-Programmable,
Multiranging, Simultaneous-Sampling ADC
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVDDto AGND.........................................................-0.3V to +6V
DVDDto DGND.........................................................-0.3V to +6V
DRVDDto DRGND....................................................-0.3V to +6V
AVDDto DVDD.......................................................-0.3V to +0.3V
DGND to DRGND..................................................-0.3V to +0.3V
AGND to DGND.....................................................-0.3V to +0.3V
AGND to DRGND..................................................-0.3V to +0.3V
AIN0+, AIN0-, AIN1+, AIN1-, AIN2+, AIN2-, AIN3+,
AIN3- to AGND.....................................................-17V to +17V
D0–D13 to DRGND................................-0.3V to (DRVDD+ 0.3V)
REFADC, REFP1, REFP2, REFN1, REFN2, COM1, COM2 to
AGND....................................................-0.3V to (AVDD+ 0.3V)
INTCLK/EXTCLKto AGND.......................-0.3V to (AVDD+ 0.3V)
CS, RD, WR, CONVST, to DRGND........-0.3V to (DRVDD+ 0.3V)
SHDN, STANDBY, CLK, EOC,
EOLCto DRGND................................-0.3V to (DRVDD+ 0.3V)
Maximum Current into Any Pin.........................................±50mA
Continuous Power Dissipation (TA= +70°C)
56-Pin Thin QFN (derate 31.3mW /°C above +70°C)....2500mW
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Maximum Junction Temperature.....................................+150°C
Lead Temperature (soldering, 10s).................................+300°C
Junction to Ambient Thermal Resistance θJA..................32°C/W
Junction to Case Thermal Resistance θJC.........................2°C/W
ELECTRICAL CHARACTERISTICS
(AVDD= DVDD= +5.0V, DRVDD= +3.0V, AGND = DGND = DRGND = 0, INTCLK/EXTCLK= AGND, fCLK= 5MHz, input range =
±10V, REFP2 = REFP1, REFN2 = REFN1, COM1 = COM2, 1.0nF from REFADC to AGND, 1.0µF and 0.1µF from COM1 to AGND,
0.1µF from REFP1 to AGND, 0.1µF from REFN1 to AGND, 1.0µF from REFP1 to REFN1. Typical values are at TA= +25°C. TA= TMIN
to TMAX, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
STATIC PERFORMANCE
ResolutionN14Bits
Integral NonlinearityINL(Note 1)±1±3LSB
Differential NonlinearityDNLNo missing codes (Note 1)±0.25±1LSB
Offset Error(Note 1)±4±16LSB
Offset-Error Temperature
Coefficient5ppm/°C
Offset-Error Matching±10LSB
Gain ErrorOffset nulled (Notes 1, 2)±0.1±0.35%FSR
Channel Gain-Error MatchingOffset nulled±20LSB
Gain-Error Temperature
CoefficientOffset nulled10ppm/°C
DYNAMIC PERFORMANCE (at fIN = 10kHz, AIN = -0.2dBFS)
Sampling Rate Per ChannelSimultaneous on all channels150ksps
Signal-to-Noise RatioSNR(Note 1)7577dB
Signal-to-Noise Plus DistortionSINAD(Note 1)7476dB
Total Harmonic DistortionTHD(Note 1)-83-80dBc
Spurious-Free Dynamic RangeSFDRRange 0 (Note 1)85dBc
Channel-to-Channel Isolation(Note 1)80dB
ANALOG INPUTS (AIN_)
Range set bits = (0,0)-10+10
Range set bits = (0,1)-5+5
Range set bits = (1,0)-2.5+2.5Input Differential Voltage Range
Range set bits = (1,1)-1.25+1.25
MAX1338
14-Bit, 4-Channel, Software-Programmable,
Multiranging, Simultaneous-Sampling ADC
ELECTRICAL CHARACTERISTICS (continued)
(AVDD= DVDD= +5.0V, DRVDD= +3.0V, AGND = DGND = DRGND = 0, INTCLK/EXTCLK= AGND, fCLK= 5MHz, input range =
±10V, REFP2 = REFP1, REFN2 = REFN1, COM1 = COM2, 1.0nF from REFADC to AGND, 1.0µF and 0.1µF from COM1 to AGND,
0.1µF from REFP1 to AGND, 0.1µF from REFN1 to AGND, 1.0µF from REFP1 to REFN1. Typical values are at TA= +25°C. TA= TMIN
to TMAX, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Range set bits = (0,0)-5+5
Range set bits = (0,1)-2.5+2.5
Range set bits = (1,0)-1.25+1.25Input Common-Mode Range
Range set bits = (1,1)-0.625+0.625
Input ResistanceAll settings6.25kΩ
Input Capacitance15pF
Small-Signal BandwidthSSBW(Note 1)1MHz
Full-Power BandwidthFPBW(Note 1)75kHz
INTERNAL REFERENCE (REFADC)
Output Voltage2.4752.52.525V
Differential Reference VoltageREFP–
REFN2.5V
Output-Voltage Temperature
Coefficient50ppm/°C
Load Regulation5V/mA
EXTERNAL REFERENCE
REFADC Voltage Input Range2.02.53.0V
REFADC Input Current(Note 3)-250+250µA
REFADC Input ResistanceRREF5kΩ
REFADC Input Capacitance15pF
TRACK/HOLD (T/H)
Aperture DelaytAD(Note 1)16ns
Aperture-Delay Matching100ps
Aperture JittertAJ(Note 1)50psRMS
CLOCK-SELECT INPUT (INTCLK/EXTCLK)
Input-Voltage HighVIH0.7 x
AVDDV
Input-Voltage LowVIL0.3 x
AVDDV
DIGITAL INTERFACE AND CONTROL INPUTS (CS, RD, WR, CONVST, SHDN, CLK, STANDBY)
Input-Voltage HighVIH0.7 x
DRVDDV
Input-Voltage LowVIL0.3 x
DRVDDV
Input Hysteresis50mV
Input CapacitanceCIN15pF
MAX1338
14-Bit, 4-Channel, Software-Programmable,
Multiranging, Simultaneous-Sampling ADC
ELECTRICAL CHARACTERISTICS (continued)
(AVDD= DVDD= +5.0V, DRVDD= +3.0V, AGND = DGND = DRGND = 0, INTCLK/EXTCLK= AGND, fCLK= 5MHz, input range =
±10V, REFP2 = REFP1, REFN2 = REFN1, COM1 = COM2, 1.0nF from REFADC to AGND, 1.0µF and 0.1µF from COM1 to AGND,
0.1µF from REFP1 to AGND, 0.1µF from REFN1 to AGND, 1.0µF from REFP1 to REFN1. Typical values are at TA= +25°C. TA= TMIN
to TMAX, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Input CurrentIINVIN = 0 or DRVDD±1µA
DIGITAL INTERFACE AND CONTROL OUTPUTS (EOC, EOLC)
Output-Voltage HighVOHSourcing 0.8mADRVDD
- 0.6V
Output-Voltage LowVOLSinking 1.6mA0.4V
PARALLEL DIGITAL I/O (D0–D7)
Output-Voltage HighVOHSourcing 0.8mADRVDD -
0.6V
Output-Voltage LowVOLSinking 1.6mA0.4V
Leakage Current1µA
Tristate Output CapacitanceRD = 1 or CS = 115pF
Input-Voltage HighVIH0.7 x
DRVDDV
Input-Voltage LowVIL0.3 x
DRVDDV
Input Hysteresis50mV
Input CapacitanceCIN15pF
Input CurrentIINVIN = 0 or DRVDD±1µA
PARALLEL DIGITAL OUTPUTS (D8–D13)
Output-Voltage HighVOHSourcing 0.8mADRVDD -
0.6V
Output-Voltage LowVOLSinking 1.6mA0.4V
Leakage Current1µA
Tristate Output Capacitance15pF
POWER SUPPLIES
Analog Supply VoltageAVDD4.7555.25V
Digital Supply VoltageDVDD4.7555.25V
Parallel Digital I/O Supply VoltageDRVDD2.705.25V60
SHDN = 10.0050.1Analog Supply CurrentAIDD
STANDBY = 1, SHDN = 04.25
SHDN = 10.0010.05Digital Supply CurrentDIDD
STANDBY = 1, SHDN = 00.0010.05
SHDN = 100.05Digital Driver Supply CurrentDRIDD
STANDBY = 1, SHDN = 000.05
Analog Power-Supply Rejection4.75V to 5.25V (Note 1)75dB
MAX1338
14-Bit, 4-Channel, Software-Programmable,
Multiranging, Simultaneous-Sampling ADC
ELECTRICAL CHARACTERISTICS (continued)
(AVDD= DVDD= +5.0V, DRVDD= +3.0V, AGND = DGND = DRGND = 0, INTCLK/EXTCLK= AGND, fCLK= 5MHz, input range =
±10V, REFP2 = REFP1, REFN2 = REFN1, COM1 = COM2, 1.0nF from REFADC to AGND, 1.0µF and 0.1µF from COM1 to AGND,
0.1µF from REFP1 to AGND, 0.1µF from REFN1 to AGND, 1.0µF from REFP1 to REFN1. Typical values are at TA= +25°C. TA= TMIN
to TMAX, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
TIMING CHARACTERISTICS (Figures 4, 5, and 6)
Internal clock2.93.23.5µs
Time to First Conversion ResulttEOC1External clock16CLK
Cycles
Internal clock600ns
Time to Subsequent ConversionstNEXTExternal clock3CLK
Cycles
Internal clock0.2CONVST Pulse-Width LowtCONVSTExternal clock0.1µs
CS Pulse WidthtCS30ns
RD Pulse-Width LowtRDL30ns
RD Pulse-Width HightRDH30ns
WR Pulse-Width LowtWRL30ns
CS to WR Setup TimetCTW0ns
WR to CS Hold TimetWTC0ns
CS to RD Setup TimetCTR0ns
RD to CS Hold TimetRTC0ns
Data Access Time
(RD Low to Valid Data)tACCFigure 130ns
Bus Relinquish Time
(RD High to D_ High-Z)tREQFigure 1530ns
CLK Rise to End-of-Conversion
(EOC) Rise/Fall DelaytEOCD20ns
CLK Rise to End-of-Last-
Conversion (EOLC) Fall DelaytEOLCD20ns
CONVST Rise to EOLC Fall DelaytCVEOLCD20ns
Internal clock180200ns
EOC Pulse-Width LowtEOCExternal clock1CLK
Cycle
Wake-Up Time From Standby7µs
Wake-Up Time From ShutdownAll bypass capacitors discharged5ns

Partno	Mfg	Dc	Qty	Available	Descript
MAX1338ETN+ \|MAX1338ETN	MAXIM	N/a	2451	avai	14-Bit, 4-Channel, Software-Programmable, Multiranging, Simultaneous-Sampling ADC