MAX13345EETD+ ,3-Wire Interface Full-Speed USB Transceiver With/Without Internal Series ResistorsApplicationsTypical Operating CircuitsPDAsSYSTEMVOLTAGEPC PeripheralsSUPPLYCellular TelephonesVV BU ..
MAX1338ETN ,4-channel, 14-bit, software-programmable, multiranging, simultaneous-sampling ADCApplications♦ +2.7V to +5.25V Digital I/O Supply Multiple-Channel Data Recorders♦ 56-Pin Thin QFN P ..
MAX1338ETN+ ,14-Bit, 4-Channel, Software-Programmable, Multiranging, Simultaneous-Sampling ADCApplications♦ +2.7V to +5.25V Digital I/O Supply Multiple-Channel Data Recorders♦ 56-Pin Thin QFN P ..
MAX133CPL ,3 Digit DMM CircuitGeneral Description
The MAX133 and MAX134 are integrating A/D con-
verters for 3% digit multime ..
MAX133CPL+ ,3¾ Digit DMM CircuitGeneral Description
The MAX133 and MAX134 are integrating A/D con-
verters for 3% digit multime ..
MAX133CQH ,3 Digit DMM CircuitELECTRICAL CHARACTERISTICS
(V+ : 9V, TA = +25°C, Test Circuit unless otherwise indicated)
_PA ..
MAX396CWI+T ,Precision, 16-Channel/Dual 8-Channel, Low-Voltage, CMOS Analog MultiplexersFeaturesThe MAX396/MAX397 low-voltage, CMOS analog ● Pin-Compatible with MAX306/MAX307, DG406/DG4 ..
MAX396EPI ,Precision, 16-Channel/Dual 8-Channel, Low-Voltage, CMOS Analog MultiplexersELECTRICAL CHARACTERISTICS—Dual Supplies(V+ = +5V ±10%, V- = -5V ±10%, GND = 0V, V = V = 2.4V, V = ..
MAX396EQI ,Precision, 16-Channel/Dual 8-Channel, Low-Voltage, CMOS Analog MultiplexersMAX396/MAX39719-0404; Rev. 1; 9/96Precision, 16-Channel/Dual 8-Channel,Low-Voltage, CMOS Analog Mul ..
MAX396EWI ,Precision, 16-Channel/Dual 8-Channel, Low-Voltage, CMOS Analog MultiplexersMAX396/MAX39719-0404; Rev. 1; 9/96Precision, 16-Channel/Dual 8-Channel,Low-Voltage, CMOS Analog Mul ..
MAX396EWI+ ,Precision, 16-Channel/Dual 8-Channel, Low-Voltage, CMOS Analog MultiplexersApplicationsMAX397 are pin compatible with the industry standard ● Sample-and-Hold Circuits ● Autom ..
MAX3971AUGP ,+3.3V, 10.7Gbps Limiting AmplifierApplications PKG PART TEMP RANGE PIN-PACKAGECODEVSR OC-192 ReceiversG2044-4 MAX3971AUGP 0°C to +85° ..
MAX13342EETD+T-MAX13345EETD+
3-Wire Interface Full-Speed USB Transceiver With/Without Internal Series Resistors
General DescriptionThe MAX13342E/MAX13345E USB-compliant trans-
ceivers are designed to minimize the area and external
components required to interface low-voltage ASICs to
USB. The devices comply with USB 2.0 specification for
full-speed-only (12Mbps) operation. The transceivers
include an internal 3.3V regulator, an internal 1.5kΩD+
pullup resistor, and built-in ±15kV ESD protection cir-
cuitry to protect the USB I/0 ports (D+,D-). The
MAX13345E also has internal series resistors, allowing
it to be wired directly to a USB connector.
These devices operate with logic-supply voltages as
low as +2.3V, ensuring compatibility with low-voltage
ASICs. A low-power mode reduces current consump-
tion to less than 45µA. An enumerate function controls
the D+ pullup resistor, allowing devices to logically dis-
connect while remaining plugged in.
The MAX13342E has controlled output impedance of(max) on D+/D-, allowing the use of external switch-
es to multiplex two different USB devices onto a single
USB connector. The MAX13345E has 43.5Ω(max)
internal resistors on D+/D- for direct connection to the
USB connector.
The MAX13342E/MAX13345E are equipped with DAT
and SE0 interface signals. These transceivers provide a
USB detection function that monitors the presence of
USB VBUSand signals the event.
These devices operate over the extended -40°C to +85°C
temperature range and are available in UCSP™ 2.0mm x
1.5mm and 14-pin TDFN (3mm x 3mm) packages.
UCSP™ is a trademark of Maxim Integrated Products, Inc.
ApplicationsPDAs
PC Peripherals
Cellular Telephones
Data Cradles
MP3 Players
FeaturesUSB 2.0 (Full-Speed, 12Mbps)-Compliant
TransceiverInternal PullupVBUSDetectionInternal Series Resistors (MAX13345E)±15kV (HBM) ESD Protection on D+, D-, and VBUSEnumeration Input Controls D+ Pullup ResistorSupports 3-Wire DAT/SE0 Interface+2.3V to +3.6V Interface Voltage (VL)No Power-Supply Sequencing RequiredLow USB Output Impedance (MAX13342E)
MAX13342E/MAX13345E
3-Wire Interface Full-Speed USB Transceivers
With/Without Internal Series Resistors19-0621; Rev 0; 10/06
Ordering InformationMAX13342E
SYSTEM
VOLTAGE
SUPPLY
SYSTEM
INTERFACE
DAT
SEO
1μF
1μF
0.1μF
GNDD-
VTRM
VBUS
SUS
ENUM
USB
CONNECTOR31.6Ω
31.6Ω
ypical Operating Circuits
PA RT PIN-
PA CK A G EO PA RK PK G C O DE
MAX13342EETD+ 14 TD FN- E P 3mm x 3m m )AC ZT1433- 2AX13342E E BC + *12 U C S P2.0m m x 1.5m m )AC UB12- 3
A X1 3 3 45 EETD + 14 TD FN- E P 3mm x 3m m )AD AT1433- 2AX13345E E BC + *12 U C S P2.0m m x 1.5m m )AC XB12- 3
*Future product—contact factory for availability.
+Denotes lead-free package.
EP = Exposed pad.
Pin Configurations and Selector Guide appear at end of data
sheet.Typical Operating Circuits continued at end of data sheet.
MAX13342E/MAX13345E
3-Wire Interface Full-Speed USB Transceivers
With/Without Internal Series Resistors
ABSOLUTE MAXIMUM RATINGSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages refer to GND unless otherwise noted.)
Supply Voltage (VBUS).............................................-0.3V to +6V
System Supply Voltage (VL).....................................-0.3V to +6V
Output of Internal Regulator (VTRM).........-0.3V to (VBUS+ 0.3V)
Input Voltage (D+, D-)..............................................-0.3V to +6V
SUS, BD........................................................-0.3V to (VL+ 0.3V)
ENUM, SE0, DAT..........................................-0.3V to (VL+ 0.3V)
Short-Circuit Current to VBUSor GND (D+, D-)..............±150mA
Maximum Continuous Current (all other pins)..................±15mA
Continuous Power Dissipation (TA= +70°C)
14-Pin TDFN (derate 18.5mW/°C above +70°C).......1482mW
4mm x 3mm UCSP
(derate 6.5mW/°C above +70°C)..............................518mW
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Bump Soldering...............................................................+235°C
Lead Soldering (10s)...................................................... +300°C
ELECTRICAL CHARACTERISTICS(VBUS= +4.0V to +5.5V, VL= +2.3V to +3.6V, TA= TMINto TMAX, unless otherwise noted. Typical values are at VBUS= +5.0V, VL=
+2.5V, TA= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
SUPPLY INPUTS (VBUS, VTRM, VL)VBUS Input RangeVBUS4.05.5V
VL Input RangeVL2.33.6V
Reg ul ated S up p l y- V ol tag e Outp utVTRM3.03.33.6V
Operating VBUS Supply CurrentIVBUSFull-speed transmitting/receiving at
12Mbps, CL = 50pF on D+ and D-10mA
Operating VL Supply CurrentIVLFul l - sp eed tr ansm i tti ng /r ecei vi ng at 12M b p s,
CL = 15pF receiver outputs, VL = 2.5V1.5mA
Full-speed idle, VD+ >2.7V, VD- <0.3V500Full-Speed Idle and SE0 Supply
CurrentIVBUS(IDLE)SE0: VD- <0.3V, VD+ <0.3500µA
Static VL Supply CurrentIVL(STATIC)Full-speed idle, SE0 or suspend mode10µA
Suspend Supply CurrentIVBUS(SUSP)SE0 = DAT= open;
SUS = OE = high3045µA
Disable-Mode Supply CurrentIVBUS(DIS)VL = GND or open25µA
Sharing-Mode VL Supply CurrentIV L( S H ARIN G) VBUS = GND or open, OE = low,
SE0 = DAT = low or high, SUS = high5µA
D+/D- Supply CurrentID+/D-VBUS = GND or open20µA
VBUS Power-Supply Detection
ThresholdVTH_VBUSVL > 2.3V0.83.6V
VBUS Power-Supply Detection
HysteresisVVBUSHYS100mV
VL Power-Supply ThresholdVTH_VL850mV
MAX13342E/MAX13345E
3-Wire Interface Full-Speed USB Transceivers
With/Without Internal Series Resistors
ELECTRICAL CHARACTERISTICS (continued)(VBUS= +4.0V to +5.5V, VL= +2.3V to +3.6V, TA= TMINto TMAX, unless otherwise noted. Typical values are at VBUS= +5.0V, VL=
+2.5V, TA= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
DIGITAL INPUTS AND OUTPUTS (DAT, SE0, OE, ENUM, SUS, BD)Input-High VoltageVIH0.7 x VLV
Input-Low VoltageVIL0.3 x VLV
Output-Voltage HighVOHISOURCE = 2mAVL - 0.4V
Output-Voltage LowVOLISINK = 2mA0.4V
Input Leakage CurrentILKG-1+1µA
Input CapacitanceMeasured from input to GND10pF
ANALOG INPUTS AND OUTPUTS (D+/D-)Differential Input SensitivityVID|VD+ - VD-|200mV
Differential Common-Mode
Voltage RangeVCMIncludes VID range0.82.5V
Single-Ended Input Voltage HighVIHSE2.0V
Single-Ended Input Voltage LowVILSE0.8V
Receiver Single-Ended
HysteresisVHYS200mV
Output-Voltage LowVOLDRL = 1.5kΩ from D+ or D- to 3.6V0.3V
Output-Voltage HighVOHDRL = 15kΩ from D+ or D- to GND2.83.6V
Off-State Leakage CurrentTri-state driver-1+1µA
Transceiver CapacitanceCINDMeasured from D+ or D- to GND20pF
MAX13342E414Driver Output ImpedanceROUTMAX13345E2843Ω
Internal Pullup ResistorRPU1.4251.5001.575kΩ
Input ImpedanceZINDrivers off, tri-state driver, ENUM = 0,
VD+, VD- = 0 OR +3.6V1MΩ
LINEAR REGULATORExternal CapacitorCOUTCompensation of linear regulator1µF
ESD PROTECTION (D+, D-)Human Body Model±15kV
IEC 61000-4-2 Air-Gap
Discharge±8kV
IEC 61000-4-2 Contact
Discharge±8kV
MAX13342E/MAX13345E
3-Wire Interface Full-Speed USB Transceivers
With/Without Internal Series Resistors
TIMING CHARACTERISTICS(VBUS= +4V to +5.5V, VL= +2.3V to +3.6V, ENUM = VL, TA= TMINto TMAX, unless otherwise noted. Typical values are at VBUS=
+5V, VL= +2.5V, TA= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
TRANSMITTER ( CL = 50pF)Rise TimetFR
10% to 90% of |VOHD-VOLD| with an external
31.6Ω series resistor (MAX13342E),
Figures 3, 8
420ns
Fall TimetFF
10% to 90% of |VOHD-VOLD| with an external
31.6Ω series resistor (MAX13342E),
Figures 3, 8
420ns
Rise-and-Fall Time Matching
(Note 1)tLR/tLFFigures 3, 890110%
Output Signal Crossover (Note 2)VCRS_L,
VCRS_FFigure 41.32V
tPLH_DRVLow-to-high transition,
Figures 4, 8VL > 2.3V20Driver
Propagation DelaytPHL_DRVHigh-to-low transition,
Figures 4, 8VL > 2.3V20
tPZH_DRVOff-to-high transition,
Figures 5, 8VL > 2.3V18
Driver-Enabled Delay Time
tPZL_DRVOff-to-low transition,
Figures 5, 8VL > 2.3V18
tPHZ_DRVHigh-to-off transition,
Figure 5, 9VL > 2.3V18
Driver Disable Delay
tPLZ_DRVLow-to-off transition,
Figures 5, 9VL > 2.3V18
RECEIVER (CL = 15pF)tPLH_RCVLow-to-high transition,
Figures 6,10VL > 2.3V20
Differential Receiver
Propagation Delay
tPHL_RCVHigh-to-low transition,
Figures 6,10VL > 2.3V20
tPLH_SELow-to-high transition,
Figures 6,1018Single-Ended Receiver
Propagation DelaytPHL_SEHigh-to-low transition,
Figures 6,1018
tPHZ_SEHigh-to-off transition,
Figure 7VL > 2.3V20
Single-Ended Receiver Disable
DelaytPLZ_SELow-to-off transition,
Figure 7VL > 2.3V20
tPZH_SEOff-to-high transition,
Figure 7VL > 2.3V22Single-Ended Receiver Enable
DelaytPZL_SEOff-to-low transition,
Figure 7VL > 2.3V22
Note 1:Parameters are 100% production tested at +25°C, unless otherwise noted. Limits over temperature are guaranteed by design.
MAX13342E/MAX13345E
3-Wire Interface Full-Speed USB Transceivers
With/Without Internal Series Resistors
Typical Operating Characteristics(VBUS= +5V, VL= +3.3V, TA= +25°C, unless otherwise noted.)
DIFFERENTIAL RECEIVER PROPAGATION
DELAY vs. VL
MAX13342E toc01
VL (V)
PROPAGATION DELAY (ns)
TA = +85°C
TA = +25°C
TA = -40°C
DIFFERENTIAL RECEIVER PROPAGATION
DELAY vs. VBUS
MAX13342E toc02
VBUS (V)
PROPAGATION DELAY (ns)
TA = +85°C
TA = +25°C
TA = -40°C
SINGLE-ENDED RECEIVER PROPAGATION
DELAY vs. VL
MAX13342E toc03
VL (V)
PROPAGATION DELAY (ns)
OE = SUS = HIGH
TA = +85°CTA = +25°C
TA = -40°C
SINGLE-ENDED RECEIVER PROPAGATION
DELAY vs. VBUS
MAX13342E toc04
VBUS (V)
PROPAGATION DELAY (ns)
OE = SUS = HIGH
TA = +85°C
TA = +25°CTA = -40°C
TRANSMITTER SKEW
vs. TEMPERATURE
MAX13342E toc05
TEMPERATURE (°C)
TRANSMITTER SKEW (ns)
RECEIVER SKEW
vs. TEMPERATURE
MAX13342E toc06
TEMPERATURE (°C)
TRANSMITTER SKEW (ns)22661101544488132176198220
VL SUPPLY CURRENT
vs. D+/D- CAPACITANCEMAX13342E toc07
CAPACITANCE (pF)
SUPPLY CURRENT (mA)
VBUS SUPPLY CURRENT
vs. D+/D- CAPACITANCE
MAX13342E toc08
CAPACITANCE (pF)
BUS
SUPPLY CURRENT (mA)
VL = 2.5V
VBUS SUSPEND CURRENT
vs. VBUS SUPPLY VOLTAGE
MAX13342E toc09
VBUS (V)
BUS
SUPPLY CURRENT (
TA = +85°CTA = +25°C
TA = -40°C
ypical Operating Characteristics (continued)(VBUS= +5V, VL= +3.3V, TA= +25°C, unless otherwise noted.)
MAX13342E/MAX13345E
3-Wire Interface Full-Speed USB Transceivers
With/Without Internal Series Resistors
MAX13342E/MAX13345E
TRANSMITTINGMAX13342E toc10
2V/div
DAT
2V/div
(2V/div)
SEO
20ns/div
MAX13342E/MAX13345E
RECEIVINGMAX13342E toc11
2V/div
2V/div
2V/div
DAT
2V/div
SEO
100ns/div
MAX13342E/MAX13345E
BUS DETECTION MAX13342E toc12
1V/div
VBUS
2V/div
4μs
EYE DIAGRAM
TIME (ns)
D+ AND D- (V)
MAX13342E toc13
MAX13342E/MAX13345E
3-Wire Interface Full-Speed USB Transceivers
With/Without Internal Series Resistors
Pin Description
PIN
TDFNUCSPNAMEFUNCTION1B1VTRM
Regulated Output Voltage. VTRM provides a 3.3V output derived from VBUS. Bypass VTRM to GND
with a 1µF (min) low-ESR capacitor, such as ceramic or plastic film types. VTRM provides power
to internal circuitry and the internal D+ pullup resistor. Do not use VTRM to power external
circuitry. These USB transceivers can also be powered by an externally regulated 3.3V supply
connected to both VBUS and VTRM.
2A1VLSystem-Side Power-Supply Input. Connect VL to the systems logic-level power supply. Bypass VL
to GND with a 0.1µF (min) low-ESR ceramic capacitor.A2SE0
Logic-Side Data Input/Output. SE0 operates as an input when OE is low and as an output when
OE is high. As an input, when SE0 is active high, D+ and D- are both driven low. As an output,
SE0 goes active high when both D+ and D- are low. (See Tables 3 and 4.)A3DATLogic-Side Data Input/Output. DAT operates as an input for data on D+/D- when OE is low. DAT
operates as the output of the differential receiver on D+/D- when OE is high. (See Tables 3 and 4.)
5, 12—N.C.No Connection. Leave N.C. unconnected. N.C. is not internally connected.B3SUSSuspend Input. Drive SUS low for normal transceiver operation. Drive SUS high for low-power
state.A4BDUSB Detector Output. A high on BD indicates that VBUS is present.
8B4OE
Output Enable. OE controls the USB transmitter outputs (D+/D-) and the interface signals (DAT,
SE0) when in USB mode. Drive OE high to operate D+/D- as inputs and to operate the logic
interface signals as outputs. Drive OE low to operate D+/D- as outputs and to operate the logic
interface signals as inputs.C4GNDGroundC3D-
Negative USB Differential Data Input/Output. D- is wired to the USB connector directly
(MAX13345E) or through a series resistor (MAX13342E). D- operates as an input when OE is high
and as an output when OE is low.C2D+
Positive USB Differential Data Input/Output. D+ is wired to the USB connector directly
(MAX13345E) or through a series resistor (MAX13342E). D+ operates as an input when OE is
high and as an output when OE is low.B2ENUMEnumerate. Drive ENUM high to connect the internal 1.5kΩ resistor from D+ to VTRM. Drive ENUM
low to disconnect the internal 1.5kΩ resistor.C1VBUSUSB-Side Power-Supply Input. Connect VBUS to the incoming USB power supply. Bypass VBUS to
GND with a 1µF ceramic capacitor.—EPExposed Paddle. Connect EP to GND.
MAX13342E/MAX13345E
3-Wire Interface Full-Speed USB Transceivers
With/Without Internal Series Resistors
Detailed DescriptionThe MAX13342E/MAX13345E USB-compliant trans-
ceivers are designed to minimize the area and external
components required to interface low-voltage ASICs to
USB. The devices comply with the USB 2.0 specifica-
tion for full-speed (12Mbps) operation. The transceivers
include an internal 3.3V regulator, an internal 1.5kΩD+
pullup resistor, and built-in ±15kV (HBM) ESD protec-
tion circuitry to protect D+, D-. Figure 1 is the
MAX13342E/MAX13345E functional diagram.
The MAX13342E has controlled output impedance of
12Ω(max) on D+/D-, allowing the use of external
switches to multiplex two different USB devices onto a
single USB connector.
The MAX13345E uses internal series resistors on D+/D-
to allow direct interface to the USB connector. A low-
power mode reduces current consumption to less than
45µA. An enumerate function controls connection of the
internal D+ pullup resistor.
The MAX13342E/MAX13345E are equipped with DAT
and SE0 interface signals and support the 3-wire USB
tranceiver interface. Although the 3-wire interface is
commonly associated with USB On-the-Go trans-
ceivers, the MAX13342E/MAX13345E support USB
peripherals only. These transceivers provide a USB
VBUS detection function that monitors the presence of
USB VBUSand signals the event.
LEVEL
TRANSLATOR
AND LOGIC
LDO
REGULATORVTRM
VBUS
MAX13342E
MAX13345E
ENUM
SUS
DAT
SEO
MAX13345E
Figure 1. MAX13342E/MAX13345E Functional Diagram
MAX13342E/MAX13345E
3-Wire Interface Full-Speed USB Transceivers
With/Without Internal Series Resistors
InterfaceThe MAX13342E/MAX13345E control signals are used
to control the USB D+/D- lines. VLpowers the logic-
side interface and sets the input and output thresholds
of these signals. The control signals for the MAX13342E
and MAX13345E are DAT, SE0, and OE.
Power-Supply Configuration
Normal Operating ModeSee Table 1 for various power-supply configurations.
VBUSsupplies power to the USB transceivers. Connect
VBUSto a +4V to +5.5V supply. Connect VLto a +2.3V
to +3.6V supply. VBUSis typically connected directly to
the USB connector. An internal regulator provides 3.3V
to internal circuitry, and a regulated 3.3V output at
VTRM, in addition to powering the internal D+ pullup
resistor. The MAX13342E and MAX13345E can be
powered by connecting both VBUSand VTRMto a 3.3V
external regulator.
Low-Power ModeOperate the transceivers in low-power mode by assert-
ing SUS high. In low-power mode, the USB differential
receiver is turned off and VBUSconsumes less than
45µA of supply current. The single-ended D+ and D-
receivers are still active when driving SUS high.
Sharing ModeConnect VLto a system power supply and leave VBUS
(or VBUSand VTRM) unconnected or connected to
GND. D+ and D- are tri-stated, allowing other circuitry
to share the USB D+ and D- line. VLconsumes less
than 5µA of supply current. When operating the trans-
ceivers in sharing mode, the SUS input is ignored, and
the interface signals (SE0, DAT) are high impedance.
Disable ModeConnect VBUSto a system power supply and leave VL
unconnected or connect to ground. In disable mode,
D+ and D- are tri-stated, and VBUSand/or VTRM(or
VBUSand VTRM) consume less than 25µA. When oper-
ating the transceivers in disable mode, OE, SUS, and
inputs to the interface control signals are ignored.
(See Table 2.)
VBUS (V)VTRM (V)VL (V)CONFIGURATIONNOTES+4.0 to +5.5+3.0 to +3.6 output+2.3 to +3.6Normal mode—
+4.0 to +5.5+3.0 to +3.6 outputGND or floatingDisable modeTable 2
GND or FloatingHigh Z+2.3 to +3.6Sharing modeTable 2
INPUTS/OUTPUTSDISABLE MODESHARING MODEVBUS / VTRM4V to 5.5VFloating or connected to GNDFloating or connected to GND2.3V to 3.6V input
D+ and D-High impedanceHigh impedance
DAT, SE0High impedanceHigh impedance
SUSHigh impedanceHigh impedanceLowLow
Table 1. Power-Supply Configuration
Table 2. Disable-Mode and Sharing-Mode Connection
