MAX13032EETE+T ,6-Channel High-Speed Logic-Level TranslatorsApplicationsTypical Operating Circuits continued at end of data sheet.SD Card Level TranslationMini ..
MAX13036ATI+ ,Contact Monitor and Level ShifterFeaturesThe MAX13036 contact monitor and level shifter monitors ● +6V to +26V Operating Voltage Ran ..
MAX1303BEUP , 8-/4-Channel, VREF Multirange Inputs, Serial 16-Bit ADCs
MAX1303BEUP+ ,4-Channel, ±VREF Multirange Inputs, Serial 16-Bit ADCELECTRICAL CHARACTERISTICS(V = V = V = V = 5V, V = V = V = V = V = 0V, f = 3.5MHz (50% dutyAVDD1 AV ..
MAX13041ASD+ ,±80V Fault-Protected High-Speed CAN Transceiver with Low-Power Management and Wake-On CANApplications+Denotes a lead(Pb)-free/RoHS-compliant package.+12V Automotive—Clamp 30 Modules/V Deno ..
MAX13042EETD+ ,1.62V to 3.6V Improved High-Speed LLTApplicationsUCSP is a trademark of Maxim Integrated Products, Inc.CMOS Logic-Level Portable POS Sys ..
MAX381CPE ,Precision, Low-Voltage Analog SwitchesMAX381/MAX383/MAX38519-0300; Rev 0; 9/94Precision, Low-Voltage Analog Switches_______________
MAX381CSE ,Precision, Low-Voltage Analog SwitchesApplicationsMAX381ESE -40°C to +85°C 16 Narrow SOSample-and-Hold Circuits Military RadiosMAX381EJE ..
MAX381EJE ,Precision, Low-Voltage Analog SwitchesMAX381/MAX383/MAX38519-0300; Rev 0; 9/94Precision, Low-Voltage Analog Switches_______________
MAX381EPE ,Precision, Low-Voltage Analog SwitchesGeneral Description ________
MAX381ESE ,Precision, Low-Voltage Analog SwitchesBlock Diagrams/Truth TablesTOP VIEWCOM1 1 16 1 1NO1 COM1 16 NO1 COM1 16 NO1 2N.C. 15 IN1 2 15 IN1 2 ..
MAX3831UCB ,+3.3V / 2.5Gbps / SDH/SONET / 4-Channel Interconnect Mux/Demux ICs with Clock GeneratorApplicationstern and rolls the demux to maintain proper channelSDH/SONET Backplanes ATM Switching N ..
MAX13032EETE+-MAX13032EETE+T
6-Channel High-Speed Logic-Level Translators
General DescriptionThe MAX13030E–MAX13035E 6-channel, bidirectional
level translators provide the level shifting necessary for
100Mbps data transfer in multivoltage systems. The
MAX13030E–MAX13035E are ideally suited for memo-
ry-card level translation, as well as generic level trans-
lation in systems with six channels. Externally applied
voltages, VCCand VL, set the logic levels on either side
of the device. Logic signals present on the VLside of
the device appear as a higher voltage logic signal on
the VCCside of the device and vice versa. The
MAX13035E features a CLK_RET output that returns the
same clock signal applied to the CLK_VLinput.
The MAX13030E–MAX13035E operate at full speed
with external drivers that source as little as 4mA output
current. Each I/O channel is pulled up to VCCor VLby
an internal 30µA current source, allowing the
MAX13030E–MAX13035E to be driven by either push-
pull or open-drain drivers.
The MAX13030E–MAX13034E feature an enable (EN)
input that places the device into a low-power shutdown
mode when driven low. The MAX13030E–MAX13035E
features an automatic shutdown mode that disables the
part when VCCis less than VL. The state of I/O VCC_
and I/O VL_during shutdown is chosen by selecting the
appropriate part version (see Ordering Information/
Selector Guide).
The MAX13030E–MAX13035E accept VCCvoltages
from +2.2V to +3.6V and VLvoltages from +1.62V to
+3.2V, making them ideal for data transfer between
low-voltage ASIC/PLDs and higher voltage systems.
The MAX13030E–MAX13035E are available in 16-bump
UCSP (2mm x 2mm) and 16-pin TQFN (4mm x 4mm)
packages, and operate over the extended -40°C to
+85°C temperature range.
ApplicationsSD Card Level Translation
MiniSD Card Level Translation
MMC Level Translation
Transflash Level Translation
Memory Stick Card Level Translation
FeaturesCompatible with 4mA Input Drivers or Larger100Mbps Guaranteed Data RateSix Bidirectional ChannelsClock Return Output (MAX13035E)Enable Input (MAX13030E–MAX13034E)±15kV ESD Protection on I/O VCCLines+1.62V ≤VL≤
+3.2V and +2.2V ≤VCC≤
+3.6V
Supply Voltage RangeLead-Free, 16-Bump UCSP (2mm x 2mm) and
16-pin TQFN (4mm x 4mm) Packages
MAX13030E–MAX13035E
6-Channel High-Speed Logic-Level Translators19-0626; Rev 0; 1/07
EVALUATION KIT
AVAILABLE
Ordering Information/Selector GuideGNDGNDGND
+1.8V
SYSTEM
CONTROLLER
+3.3V
SD CARDVCC
CLK_RET
CLK_VCC
CLOCK_IN
+3.3V+1.8V
CLK_VL
0.1μF1μF0.1μF
MAX13035E
DAT3
DAT2
DAT1
DAT0
CMD
CLOCK
I/O VL_
I/O VL_
I/O VL_
I/O VL_
I/O VL_
I/O VCC_
I/O VCC_
I/O VCC_
I/O VCC_
I/O VCC_
DAT3
DAT2
DAT1
DAT0
CMD
CLOCK
Typical Operating Circuits
PARTPIN-PACKAGEI/O VL_ STATE DURING
SHUTDOWN
I/O VCC_ STATE DURING
SHUTDOWNPKG CODE
MAX13030EEBE+16 UCSPHigh impedanceHigh impedanceB16-1
MAX13030EETE+16 TQFN-EP**High impedanceHigh impedanceT1644-4
Functional Diagram and Pin Configurations appear at end
of data sheet.Typical Operating Circuits continued at end of data sheet.
Note:All devices are specified over the -40°C to +85°C operating
temperature range.
+Denotes a lead-free package.
Ordering Information/Selector guide continued at end of
data sheet.
MAX13030E–MAX13035E
6-Channel High-Speed Logic-Level Translators
ABSOLUTE MAXIMUM RATINGSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND.)
VCC, VL.....................................................................-0.3V to +4V
I/O VCC_, CLK_VCC....................................-0.3V to (VCC+ 0.3V)
I/O VL_, CLK_VL, CLK_RET ..........................-0.3V to (VL+ 0.3V)
EN.............................................................................-0.3V to +4V
Short-Circuit Duration I/O VL_, I/O VCC_,
CLK_VCC, CLK_VL, CLK_RET to GND.......................Continuous
Continuous Power Dissipation (TA= +70°C)
16-Bump UCSP (derate 8.2mW/°C)..............................660mW
16-Pin TQFN (derate 25.0mW/°C)...............................2000mW
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Junction Temperature......................................................+150°C
Bump Temperature (soldering)........................................+235°C
Lead Temperature (soldering, 10s).................................+300°C
ELECTRICAL CHARACTERISTICS(VCC= +2.2V to +3.6V, VL= +1.62V to +3.2V, EN = VL, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC=
+3.3V, VL= +1.8V and TA= +25°C.) (Notes 1, 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
POWER SUPPLIESVL Supply RangeVL(Note 2)1.623.20V
VCC Supply RangeVCC2.23.6V
Supply Current from VCCIQVCCI/O VCC_ = VCC, I/O VL_ = VL1625µA
Supply Current from VLIQVLI/O VCC_ = VCC, I/O VL_ = VL610µA
TA = +25°C, EN = GND or VL > VCC + 0.7V,
MAX13030E–MAX13034E24
VCC Shutdown Supply CurrentISHDN-VCC
TA = +25°C, VL > VCC + 0.7V,
MAX13035E,24
TA = +25°C, EN = GND or VL > VCC + 0.7V,
MAX13030E–MAX13034E0.14VL Shutdown Supply CurrentISHDN-VL
TA = +25°C, VL > VCC + 0.7V, MAX13035E0.14
I/O VCC_, I/O VL_, CLK_VCC
Tri-State Leakage CurrentILEAKTA = +25°C, EN = GND or VL > VCC + 0.7V0.12µA
EN Input Leakage CurrentILEAK_ENTA = +25°C, MAX13030E–MAX13034E1µA
VL - VCC Shutdown Threshold
HighVTH_HVCC rising-0.20.05VL0.7V
VL - VCC Shutdown Threshold
LowVTH_LVCC falling-0.20.1VL0.7V
I/O VCC_ Pulldown Resistance
During ShutdownRVCC_PD_SDEN = GND, MAX13032E/MAX13034E1016.523kΩ
I/O VCC_ Pullup Resistance
During ShutdownRVCC_PU_SDEN = GND, MAX13031E1016.523kΩ
I/O VL_ Pulldown Resistance
During ShutdownRVL_PD_SDEN = GND, MAX13033E/MAX13034E1016.523kΩ
MAX13030E–MAX13035E
6-Channel High-Speed Logic-Level Translators
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSI/O VL_, CLK_VL, CLK_RET
Pullup Resistance During
Shutdown
RVL_PU_SD(VL > VCC + 0.7V), MAX13035E4575105kΩ
I/O VL_, CLK_VL, CLK_RET
Pullup CurrentRVL_PUEN = VCC or VL, I/O VL_ = GND20µA
I/O VCC_, CLK_VCC Pullup
CurrentRVCC_PUEN = VCC or VL, I/O VCC_ = GND20µA
I/O VL to I/O VCC DC
ResistanceRIOVL_IOVCC(Note 3)3kΩ
ESD PROTECTION (Note 3)Human Body Model, CVCC = 1.0µF±15
IEC 61000-4-2 Air-Gap Discharge,
CVCC = 1.0µF±12I/O VCC_, CLK_VCC
IEC 61000-4-2 Contact Discharge,
CVCC = 1.0µF±8
LOGIC-LEVEL THRESHOLDSI/O VL_, CLK_VL Input-Voltage
High ThresholdVIHL(Note 4)VL -
0.2V
I/O VL_, CLK_VL Input-Voltage
Low ThresholdVILL(Note 4)0.15V
I/O VCC_, CLK_VCC Input-
Voltage High ThresholdVIHC(Note 4)VCC -
0.4V
I/O VCC_, CLK_VCC Input-
Voltage Low ThresholdVILC(Note 4)0.2V
EN Input-Voltage High
ThresholdVIHMAX13030E–MAX13034EVL -
0.4V
EN Input-Voltage LowVILMAX13030E–MAX13034E0.4V
I/O VL_, CLK_VL, CLK_RET
Output-Voltage HighVOHLI/O VL_, CLK_VL, CLK_RET source current
= 20µA, I/O VCC_ ≥ VCC - 0.4V2/3 VLV
I/O VL_, CLK_VL, CLK_RET
Output-Voltage LowVOLLI/O VL_, CLK_VL, CLK_RET sink current =
20µA, I/O VCC_ ≤ 0.2V1/3 VLV
I/O VCC_, CLK_VCC Output-
Voltage HighVOHCI/O VCC_, CLK_VCC source current = 20µA,
I/O VL_ ≥ VL - 0.2V
2/3
VCCV
ELECTRICAL CHARACTERISTICS (continued)(VCC= +2.2V to +3.6V, VL= +1.62V to +3.2V, EN = VL, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC=
+3.3V, VL= 1.8V and TA= +25°C.) (Notes 1, 2)
MAX13030E–MAX13035E
6-Channel High-Speed Logic-Level Translators
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSI/O VCC_, CLK_VCC Output-
Voltage LowVOLCI/O VCC_, CLK_VCC sink current = 20µA,
I/O VL_ ≤ 0.15V
1/3
VCCV
RISE/FALL TIME ACCELERATOR STAGE (Note 3)On falling edge3Accelerator Pulse DurationOn rising edge3ns
VL = 1.62V11VL-Output-Accelerator Source
ImpedanceVL = 3.2V6Ω
VCC = 2.2V9VCC-Output-Accelerator Source
ImpedanceVCC = 3.6V8Ω
VL = 1.62V9VL-Output-Accelerator Sink
ImpedanceVL = 3.2V8Ω
VCC = 2.2V10VCC-Output-Accelerator Sink
ImpedanceVCC = 3.6V9Ω
ELECTRICAL CHARACTERISTICS (continued)(VCC= +2.2V to +3.6V, VL= +1.62V to +3.2V, EN = VL, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC=
+3.3V, VL= 1.8V and TA= +25°C.) (Notes 1, 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSI/O VCC_, CLK_VCC Rise TimetRVCCRS = 150Ω, CI/OVCC = 10pF, CCLK_VCC =
10pF, push-pull drivers (Figure 1)2.5ns
I/O VCC_, CLK_VCC Fall TimetFVCCRS = 150Ω, C I /OV C C = 10p F, C C LK _V C C =
10p F ( Figures 1, 2)2.5ns
I/O VL_, CLK_VL Rise TimetRVLRS = 150Ω, C I /OV L = 15p F, C C LK _V L = 15p F,
push-pull drivers (Figure 3)2.5ns
I/O VL_, CLK_VL Fall TimetFVLRS = 150Ω, C I /OV L = 15p F, C C LK _V L = 15p FFigures 3, 4)2.5ns
Propagation Delay
(Driving I/O VL_, CLK_VL)tPVL-VCCRS = 150Ω, CI/OVCC = 10pF, CCLK_VCC =
10pF, push-pull drivers (Figure 1)6.5ns
Propagation Delay
(Driving I/O VCC_, CLK_VCC)tPVCC-VLRS = 150Ω, C I /OV L = 15p F, C C LK _V L = 15p F,
push-pull drivers (Figure 3)6.5ns
Channel-to-Channel SkewtSKEWRS = 150Ω, C I /OV C C = 10p F, C I /OV L = 15p F0.8ns
Propagation Delay from
I/O VL_ to I/O VCC_ after ENtEN-VCCRLOAD = 1MΩ, CI/OVCC = 10pF (Figure 5)
(MAX13030E–MAX13034E)5µs
TIMING CHARACTERISTICS(VCC= +2.2V to +3.6V, VL= +1.62V to +3.2V, CI/OVL≤15pF, CI/OVCC≤15pF, RSOURCE= 150Ω, EN = VL, I/O VL_to I/O VCC_
rise/fall time = 3ns, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC= +3.3V, VL= 1.8V and TA= +25°C.)
(Note 1)
MAX13030E–MAX13035E
6-Channel High-Speed Logic-Level Translators
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSPropagation Delay from
I/O VCC_ to I/O VL_ after ENtEN-VLRLOAD = 1MΩ, CI/OVL = 15pF (Figure 5)
(MAX13030E–MAX13034E)5µs
Maximum Data Rate
Push-pull operation, RSOURCE = 150_,
CI/OVCC_ = 10pF, CI/OVL_ = 15pF,
CCLK_VCC = 10pF, CCLK_VL = 15pF
100Mbps
TIMING CHARACTERISTICS (continued)(VCC= +2.2V to +3.6V, VL= +1.62V to +3.2V, CI/OVL≤15pF, CI/OVCC≤15pF, RSOURCE= 150Ω, EN = VL, I/O VL_to I/O VCC_
rise/fall time = 3ns, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC= +3.3V, VL= 1.8V and TA= +25°C.)
(Note 1)
Note 1:All units are 100% production tested at TA= +25°C. Limits over the operating temperature range are guaranteed by design
and not production tested.
Note 2:VLmust be less than or equal to VCC- 0.2V during normal operation. However, VLcan be greater than VCCduring startup
and shutdown conditions and the part will not latch-up or be damaged.
Note 3:Guaranteed by design.
Note 4:Input thresholds are referenced to the boost circuit.
MAX13030E–MAX13035E
6-Channel High-Speed Logic-Level Translators
Typical Operating Characteristics(VCC= 3.3V, VL= 1.8V, CL= 15pF, RSOURCE= 150Ω, data rate = 100Mbps, push-pull driver, TA= +25°C, unless otherwise noted.)
VL SUPPLY CURRENT vs. VCC SUPPLY
VOLTAGE (DRIVING I/O VL_, VL = 1.8V)
MAX13030E toc01
VCC SUPPLY VOLTAGE (V)
L SUPPLY CURRENT (
DRIVING ONE I/O VL
VL SUPPLY CURRENT vs. VL SUPPLY
VOLTAGE (DRIVING I/O VCC_, VCC = 3.6V)
MAX13030E toc02
VL SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
DRIVING ONE I/O VCC
VCC SUPPLY CURRENT vs. VCC SUPPLY
VOLTAGE (DRIVING I/O VL_, VL = 1.8V)
MAX13030E toc03
VCC SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
DRIVING ONE I/O VL
VCC SUPPLY CURRENT vs. VL SUPPLY
VOLTAGE (DRIVING I/O VCC_, VCC = 3.6V)
MAX13030E toc04
VL SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
DRIVING ONE I/O VCC
SUPPLY CURRENT
vs.TEMPERATURE (DRIVING I/O VCC_)
MAX13030E toc05
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
DRIVING ONE I/O VCC
ICC
SUPPLY CURRENT
vs.TEMPERATURE (DRIVING I/O VL_)
MAX13030E toc06
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
ICC
DRIVING ONE I/O VL
VL SUPPLY CURRENT vs. CAPACITIVE
LOAD ON I/O VL_ (DRIVING I/O VCC_)
MAX13030E toc07
CAPACITIVE LOAD (pF)
SUPPLY CURRENT (mA)
DRIVING ONE I/O VCC
VCC SUPPLY CURRENT vs. CAPACITIVE
LOAD ON I/O VCC_ (DRIVING I/O VL_)
MAX13030E toc08
CAPACITIVE LOAD (pF)
SUPPLY CURRENT (mA)
DRIVING ONE I/O VL
RISE/FALL TIME vs. CAPACITIVE
LOAD ON I/O VCC_ (DRIVING I/O VL_)
MAX13030E toc09
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ps)
tRVCC
tFVCC
MAX13030E–MAX13035E
6-Channel High-Speed Logic-Level Translators
Typical Operating Characteristics (continued)(VCC= 3.3V, VL= 1.8V, CL= 15pF, RSOURCE= 150Ω, data rate = 100Mbps, push-pull driver, TA= +25°C, unless otherwise noted.)
RISE/FALL TIME vs. CAPACITIVE
LOAD ON I/O VL_ (DRIVING I/O VCC_)
MAX13030E toc10
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ps)
tRVL
tFVL
PROPAGATION DELAY vs. CAPACITIVE
LOAD ON I/O VCC_ (DRIVING I/O VL_)
MAX13030E toc11
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
tPLH
tPHL
PROPAGATION DELAY vs. CAPACITIVE
LOAD ON I/O VL_ (DRIVING I/O VCC_)
MAX13030E toc12
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
tPHL
tPLH
10ns/div
TYPICAL I/O VL_ DRIVING
(FREQUENCY = 26MHz, CIOVCC = 40pF)I/O VL_
1V/div
I/O VCC_
2V/div
MAX13030E toc13
10ns/div
TYPICAL I/O VCC_ DRIVING
(FREQUENCY = 26MHz, CIOVL = 15pF)I/O VCC_
2V/div
I/O VL_
1V/div
MAX13030E toc14
10ns/div
TYPICAL CLK_ VL DRIVING
(FREQUENCY = 26MHz, CCLK_VCC = 40pF)CLK_ VL
1V/div
CLK_RET
1V/div
MAX13030E toc15
CLK_ VCC
2V/div
MAX13030E–MAX13035E
6-Channel High-Speed Logic-Level Translators
Pin Description
PIN
MAX13030E–MAX13034EMAX13035E
UCSPTQFNUCSPTQFN
NAMEFUNCTION4A14I/O VL3Input/Output 3. Referenced to VL.6A26I/O VCC3Input/Output 3. Referenced to VCC.7A37I/O VCC4Input/Output 4. Referenced to VCC.9A49I/O VL4Input/Output 4. Referenced to VL.3B13I/O VL2Input/Output 2. Referenced to VL.5B25I/O VCC2Input/Output 2. Referenced to VCC.8B38I/O VCC5Input/Output 5. Referenced to VCC.10B410I/O VL5Input/Output 5. Referenced to VL.2C12VLLogic-Supply Voltage, +1.62V to +3.2V. Bypass VL to GND with
a 0.1µF capacitor placed as close as possible to the device.16C216VCC
Power-Supply Voltage, +2.2V to +3.6V. Bypass VCC to GND with
a 0.1µF ceramic capacitor. For full ESD protection, connect a
1µF ceramic capacitor from VCC to GND as close as possible to
the VCC input.13C313GNDGround11——ENEnable Input. Drive EN to GND for shutdown mode, or drive EN to
VL or VCC for normal operation.1D11I/O VL1Input/Output 1. Referenced to VL.15D215I/O VCC1Input/Output 1. Referenced to VCC.14——I/O VCC6Input/Output 6. Referenced to VCC.12——I/O VL6Input/Output 6. Referenced to VL.—C411CLK_RETClock Return Output. CLK_RET is the returned signal of a clock
applied to CLK_VL. CLK_RET is referenced to VL.—D314CLK_VCCTranslator Channel for a Clock Applied to VCC—D412CLK_VLTranslator Channel for a Clock Applied to VLEP—EPEPExposed Paddle. Connect exposed paddle to GND.
MAX13030E–MAX13035E
6-Channel High-Speed Logic-Level Translators
Test Circuits/Timing DiagramsMAX13030E–
MAX13035E
tFVCCtRVCC
I/O VL_
(CLK_VL*)I/O VCC_
(CLK_VCC*)
150ΩVCC
10%10%
90%90%
50%50%
50%50%
VCC
CIOVCC
tPLHtPHL
tPVL-VCC = tPLH OR tPHL
VCCEN**VL
I/O VCC
I/O VL
*MAX13035E ONLY
(CCLK_VCC*)
**MAX13030E–MAX13034E ONLY
Figure 1. Push-Pull Driving I/O VL_Test Circuit and Timing
MAX13030E–
MAX13035E
tFVCCtRVCC VCC
10%10%
90%90%
50%50%
50%50%
VCC
CIOVCC
I/O VCC
VGATEVCCEN**
VGATE
I/O VL_
(CLK_VL*)
I/O VCC_
(CLK_VCC*)
*MAX13035E ONLY**MAX13030E–MAX13034E ONLY
(CCLK_VCC*)
tPLHtPHL
tPVL-VCC = tPHL
Figure 2. Open-Drain Driving I/O VL_ Test Circuit and Timing
