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MAX1284BCSAMaxim N/a25avai400ksps/300ksps / Single-Supply / Low-Power / Serial 12-Bit ADCs with Internal Reference
MAX1284BESAMAXIM ?N/a5avai400ksps/300ksps / Single-Supply / Low-Power / Serial 12-Bit ADCs with Internal Reference
MAX1285BCSAMaxim N/a39avai400ksps/300ksps / Single-Supply / Low-Power / Serial 12-Bit ADCs with Internal Reference


MAX1285BCSA ,400ksps/300ksps / Single-Supply / Low-Power / Serial 12-Bit ADCs with Internal ReferenceELECTRICAL CHARACTERISTICS—MAX1284 (continued)(V = +4.5V to +5.5V; f = 6.4MHz, 50% duty cycle, 16 c ..
MAX1286EKA ,150ksps, 12-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential ADCsFeaturesThe MAX1286–MAX1289 are low-cost, micropower, seri-♦ Single-Supply Operational output 12-bi ..
MAX1286ETA+ ,150ksps, 12-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential ADCsELECTRICAL CHARACTERISTICS(V = +2.7V to +3.6V, V = +2.5V for MAX1287/MAX1289, or VDD = +4.75V to +5 ..
MAX1287EKA+T ,150ksps, 12-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential ADCsApplicationsLow-Power Data Acquisition PART PIN-PACKAGE TOP MARKPortable Temperature MonitorsMAX128 ..
MAX128AEAI ,Multirange, +5V, 12-Bit DAS with 2-Wire Serial Interface
MAX128BCAI ,Multirange, +5V, 12-bit DAS with 2-wire serial interface. INL(LSB) +1,-1FeaturesThe MAX127/MAX128 are multirange, 12-bit data' 12-Bit Resolution, 1/2 LSB Linearityacquisit ..
MAX3784AUTE+T ,5Gbps PCB EqualizerFeaturesThe MAX3784/MAX3784A 5Gbps equalizers provide♦ Spans 40in (1m) of FR-4 PCBcompensation for ..
MAX3784UGE-T ,5Gbps PCB EqualizerApplicationsChassis Life ExtensionTOP VIEW4.25Gbps Fibre Channel12 11 9104x Multiplexed 1.25Gbps Et ..
MAX3785UTT+ ,6.25Gbps, 1.8V PC Board EqualizerApplicationsPin ConfigurationsHSBI for ≤ 6.4GbpsTOP VIEW (BUMPS ON BOTTOM OF DIE)Double IEEE 802.3a ..
MAX3786UTJ ,1.5Gbps Serial ATA-Compatible Mux/Buffer with Loopback and EqualizationMAX378619-2727; Rev 2; 6/041.5Gbps Serial ATA-Compatible Mux/Buffer withLoopback and Equalization
MAX3786UTJ+ ,1.5Gbps Serial ATA-Compatible Mux/Buffer with Loopback and EqualizationApplications+Denotes lead-free package.*EP = Exposed pad.1.5Gbps Serial ATA RedundancyTypical Appli ..
MAX3786UTJ+T ,1.5Gbps Serial ATA-Compatible Mux/Buffer with Loopback and EqualizationFeaturesThe MAX3786 is an AC-coupled, serial-ATA (SATA)-♦ < 50ps Total Residual Jitter (20in FR-4, ..


MAX1284BCSA-MAX1284BESA-MAX1285BCSA
400ksps/300ksps / Single-Supply / Low-Power / Serial 12-Bit ADCs with Internal Reference
General Description
The MAX1284/MAX1285 12-bit analog-to-digital con-
verters (ADCs) combine a high-bandwidth track/hold
(T/H), a serial interface with high conversion speed, an
internal +2.5V reference, and low power consumption.
The MAX1284 operates from a single +4.5V to +5.5V
supply. The MAX1285 operates from a single +2.7V to
+3.6V supply.
The 3-wire serial interface connects directly to
SPI™/QSPI™/ MICROWIRE™ devices without external
logic. The devices use an external serial-interface clock
to perform successive-approximation analog-to-digital
conversions.
Low power, ease of use, and small package size make
these converters ideal for remote-sensor and data-acqui-
sition applications or for other circuits with demanding
power consumption and space requirements. The
MAX1284/MAX1285 are available in 8-pin SO packages.
These devices are pin-compatible, higher-speed ver-
sions of the MAX1240/MAX1241. Refer to the respec-
tive data sheets for more information.
Applications

Portable Data Logging
Data Acquisition
Medical Instruments
Battery-Powered Instruments
Pen Digitizers
Process Control
____________________________Features
Single-Supply Operation
+4.5V to +5.5V (MAX1284)
+2.7V to +3.6V (MAX1285)
±1LSB (max) DNL, ±1LSB (max) INL400ksps Sampling Rate (MAX1284)Internal Track/Hold+2.5V Internal ReferenceLow Power: 2.5mA (400ksps)SPI/QSPI/MICROWIRE 3-Wire Serial-InterfacePin-Compatible, High-Speed Upgrades to
MAX1240/MAX1241
8-Pin SO Package
400ksps/300ksps, Single-Supply, Low-Power,
Serial 12-Bit ADCs with Internal Reference

19-1687; Rev 1; 7/00
Pin Configuration
Ordering Information
Functional Diagram

SPI and QSPI are trademarks of Motorola, Inc.
MICROWIREis a trademark of National Semiconductor Corp.
MAX1284/MAX1285
MAX1284/MAX1285
400ksps/300ksps, Single-Supply, Low-Power,
Serial 12-Bit ADCs with Internal Reference
ELECTRICAL CHARACTERISTICS—MAX1284

(VDD= +4.5V to +5.5V; fSCLK= 6.4MHz, 50% duty cycle, 16 clocks/conversion cycle (400ksps), 4.7µF capacitor at REF, TA= TMINto
VDDto GND.............................................................-0.3V to +6V
AIN to GND................................................-0.3V to (VDD + 0.3V)
REF to GND...............................................-0.3V to (VDD + 0.3V)
Digital Inputs to GND...............................................-0.3V to +6V
DOUT to GND............................................-0.3V to (VDD + 0.3V)
DOUT Current..................................................................±25mA
Continuous Power Dissipation (TA = +70°C)
8-Pin SO (derate 5.88mW/°C above +70°C)..............471mW
Operating Temperature Ranges
MAX1284BCSA/MAX1285BCSA.......................0°C to +70°C
MAX1284BESA/MAX1285BESA.....................-40°C to +85°C
Storage Temperature Range............................-60°C to +150°C
Lead Temperature (soldering, 10s)................................+300°C
ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
MAX1284/MAX1285
400ksps/300ksps, Single-Supply, Low-Power,
Serial 12-Bit ADCs with Internal Reference
ELECTRICAL CHARACTERISTICS—MAX1284 (continued)

(VDD= +4.5V to +5.5V; fSCLK= 6.4MHz, 50% duty cycle, 16 clocks/conversion cycle (400ksps), 4.7µF capacitor at REF, TA= TMINto
TMAX,unless otherwise noted. Typical values are at TA= +25°C.)
ELECTRICAL CHARACTERISTICS—MAX1285

(VDD= +2.7V to +3.6V; fSCLK= 4.8MHz, 50% duty cycle, 16 clocks/conversion cycle (300ksps), 4.7µF capacitor at REF, TA= TMINto
MAX1284/MAX1285
400ksps/300ksps, Single-Supply, Low-Power,
Serial 12-Bit ADCs with Internal Reference
ELECTRICAL CHARACTERISTICS—MAX1285 (continued)

(VDD= +2.7V to +3.0V; fSCLK= 4.8MHz, 50% duty cycle, 16 clocks/conversion cycle (300ksps), 4.7µF capacitor at REF, TA= TMINto
TMAX,unless otherwise noted. Typical values are at TA= +25°C.)
MAX1284/MAX1285
400ksps/300ksps, Single-Supply, Low-Power,
Serial 12-Bit ADCs with Internal Reference
TIMING CHARACTERISTICS—MAX1284 (Figures 1, 2, 8, 9)

(VDD= +4.5V to +5.5V, TA= TMIN to TMAX,unless otherwise noted.)
TIMING CHARACTERISTICS—MAX1285 (Figures 1, 2, 8, 9)

(VDD= +2.7V to +3.6V, TA= TMIN to TMAX,unless otherwise noted.)
Note 1:
Tested at VDD= VDD(MIN).
Note 2:
Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
been calibrated.
Note 3:
Internal reference, offset, and reference errors nulled.
Note 4:
Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 5:
External load should not change during conversion for specified accuracy. Guaranteed specification limit of 2mV/mA due to
production test limitations.
Note 6:
Electrical characteristics are guaranteed from VDD(MIN)to VDD(MAX). For operations beyond this range, see Typical
Operating Characteristics.
Note 7:
MAX1284 tested with 20pF on DOUTand fSCLK= 6.4MHz, 0 to 5V. MAX1285 tested with same loads, fSCLK= 4.8MHz,
0 to 3V. DOUT= full scale.
MAX1284/MAX1285
400ksps/300ksps, Single-Supply, Low-Power,
Serial 12-Bit ADCs with Internal Reference
__________________________________________Typical Operating Characteristics

(MAX1284: VDD= +5.0V, fSCLK= 6.4MHz, MAX1285: VDD= +3.0V, fSCLK= 4.8MHz; CLOAD= 20pF, 4.7µF capacitor at REF, = +25°C, unless otherwise noted.)
MAX1284/MAX1285
400ksps/300ksps, Single-Supply, Low-Power,
Serial 12-Bit ADCs with Internal Reference
Typical Operating Characteristics (continued)

(MAX1284: VDD= +5.0V, fSCLK= 6.4MHz, MAX1285: VDD= +3.0V, fSCLK= 4.8MHz; CLOAD= 20pF, 4.7µF capacitor at REF, = +25°C, unless otherwise noted.)
Pin Description
Detailed Description
Converter Operation

The MAX1284/MAX1285 use an input T/H and succes-
sive-approximation register (SAR) circuitry to convert
an analog input signal to a digital 12-bit output. Figure
3 shows the MAX1284/MAX1285 in its simplest configu-
ration. The internal reference is trimmed to +2.5V.The
serial interface requires only three digital lines (SCLK,CS,and DOUT) and provides an easy interface to
microprocessors (µPs).
The MAX1284/MAX1285 have two modes: normal and
shutdown. Pulling SHDNlow shuts the device down and
reduces supply current to below 2µA (typ), while pulling
SHDNhigh puts the device into operational mode. PullingCSlow initiates a conversion that is driven by SCLK. The
conversion result is available at DOUT in unipolar serial
format. The serial data stream consists of three zeros,
followed by the data bits (MSB first). All transitions on
DOUT occur 20ns after the rising edge of SCLK. Figures
8 and 9 show the interface timing information.
Analog Input

Figure 4 illustrates the sampling architecture of the
ADC’s comparator. The full-scale input voltage is set by
the internal reference (VREF= +2.5V).
Track/Hold

In track mode, the analog signal is acquired and stored
in the internal hold capacitor. In hold mode, the T/H
switch opens and maintains a constant input to the
ADC’s SAR section.
During acquisition, the analog input (AIN) charges
capacitor CHOLD. Bringing CSlow, ends the acquisition
interval. At this instant, the T/H switches the input side
of CHOLDto GND. The retained charge on CHOLDrep-
resents a sample of the input, unbalancing node ZERO
at the comparator’s input.
In hold mode, the capacitive digital-to-analog converter
(DAC) adjusts during the remainder of the conversion
cycle to restore node ZERO to 0 within the limits of 12-
bit resolution. This action is equivalent to transferring a
charge from CHOLDto the binary-weighted capacitive
DAC, which in turn forms a digital representation of the
analog input signal. At the conversion’s end, the input
MAX1284/MAX1285
400ksps/300ksps, Single-Supply, Low-Power,
Serial 12-Bit ADCs with Internal Reference

Figure 1. Load Circuits for DOUT Enable Time
Figure 2. Load Circuits for DOUT Disable Time
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