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MAX1257BETM ,2.5 V, 12-bit, multichannel ADC/DAC with FIFO, temperature sensing, and GPIO portFeaturesage from +2.7V to +3.6V (MAX1221/MAX1223/MAX1257)and from +4.75V to +5.25V (MAX1220/MAX1222 ..
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MAX3680EAI+T ,+3.3V, 622Mbps, SDH/SONET 1:8 Deserializer with TTL OutputsApplications ________________Ordering Information622Mbps SDH/SONET Transmission SystemsPART TEMP RA ..
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MAX12557ETK
Dual, 65Msps, 14-Bit, IF/Baseband ADC
General DescriptionThe MAX12557 is a dual 3.3V, 14-bit analog-to-digital
converter (ADC) featuring fully differential wideband
track-and-hold (T/H) inputs, driving internal quantizers.
The MAX12557 is optimized for low power, small size,
and high dynamic performance in intermediate frequen-
cy (IF) and baseband sampling applications. This dual
ADC operates from a single 3.3V supply, consuming
only 610mW while delivering a typical 72.5dB signal-to-
noise ratio (SNR) performance at a 175MHz input fre-
quency. The T/H input stages accept single-ended or
differential inputs up to 400MHz. In addition to low oper-
ating power, the MAX12557 features a 166µW power-
down mode to conserve power during idle periods.
A flexible reference structure allows the MAX12557 to
use the internal 2.048V bandgap reference or accept
an externally applied reference and allows the refer-
ence to be shared between the two ADCs. The refer-
ence structure allows the full-scale analog input range
to be adjusted from ±0.35V to ±1.15V. The MAX12557
provides a common-mode reference to simplify design
and reduce external component count in differential
analog input circuits.
The MAX12557 supports either a single-ended or differ-
ential input clock. User-selectable divide-by-two (DIV2)
and divide-by-four (DIV4) modes allow for design flexibil-
ity and help eliminate the negative effects of clock jitter.
Wide variations in the clock duty cycle are compensated
with the ADC’s internal duty-cycle equalizer (DCE).
The MAX12557 features two parallel, 14-bit-wide,
CMOS-compatible outputs. The digital output format is
pin-selectable to be either two’s complement or Gray
code. A separate power-supply input for the digital out-
puts accepts a 1.7V to 3.6V voltage for flexible interfac-
ing with various logic levels. The MAX12557 is available
in a 10mm x 10mm x 0.8mm, 68-pin thin QFN package
with exposed paddle (EP), and is specified for the
extended (-40°C to +85°C) temperature range.
For a 12-bit, pin-compatible version of this ADC, refer to
the MAX12527 data sheet.
ApplicationsIF and Baseband Communication Receivers
Cellular, LMDS, Point-to-Point Microwave,
MMDS, HFC, WLAN
I/Q Receivers
Ultrasound and Medical Imaging
Portable Instrumentation
Digital Set-Top Boxes
Low-Power Data Acquisition
FeaturesDirect IF Sampling Up to 400MHzExcellent Dynamic Performance
74.1dB/72.5dB SNR at fIN= 70MHz/175MHz
83.4dBc/79.5dBc SFDR at fIN= 70MHz/175MHz3.3V Low-Power Operation
637mW (Differential Clock Mode)
610mW (Single-Ended Clock Mode)Fully Differential or Single-Ended Analog InputAdjustable Differential Analog Input Voltage 750MHz Input BandwidthAdjustable, Internal or External, Shared Reference Differential or Single-Ended ClockAccepts 25% to 75% Clock Duty CycleUser-Selectable DIV2 and DIV4 Clock ModesPower-Down ModeCMOS Outputs in Two’s Complement or Gray
CodeOut-of-Range and Data-Valid IndicatorsSmall, 68-Pin Thin QFN Package12-Bit Compatible Version Available (MAX12527)Evaluation Kit Available (Order MAX12557 EV Kit)
MAX12557
Dual, 65Msps, 14-Bit, IF/Baseband ADC
Ordering Information*EP = Exposed paddle.
Selector Guide
Pin Configuration appears at end of data sheet.
MAX12557
Dual, 65Msps, 14-Bit, IF/Baseband ADC
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈10pF at digital outputs, VIN= -0.5dBFS (differen-
tial), DIFFCLK/SECLK= OVDD, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T= GND, fCLK= 65MHz, TA= -40°C to
+85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND................................................................-0.3V to +3.6V
OVDDto GND............-0.3V to the lower of (VDD+ 0.3V) and +3.6V
INAP, INAN to GND...-0.3V to the lower of (VDD+ 0.3V) and +3.6V
INBP, INBN to GND...-0.3V to the lower of (VDD+ 0.3V) and +3.6V
CLKP, CLKN to
GND........................-0.3V to the lower of (VDD+ 0.3V) and +3.6V
REFIN, REFOUT
to GND..................-0.3V to the lower of (VDD+ 0.3V) and +3.6V
REFAP, REFAN,
COMA to GND......-0.3V to the lower of (VDD+ 0.3V) and +3.6V
REFBP, REFBN,
COMB to GND......-0.3V to the lower of (VDD+ 0.3V) and +3.6V
DIFFCLK/SECLK, G/T, PD, SHREF, DIV2,
DIV4 to GND.........-0.3V to the lower of (VDD+ 0.3V) and +3.6V
D0A–D13A, D0B–D13B, DAV,
DORA, DORB to GND..............................-0.3V to (OVDD + 0.3V)
Continuous Power Dissipation (TA= +70°C)
68-Pin Thin QFN 10mm x 10mm x 0.8mm
(derate 70mW/°C above +70°C)....................................4000mW
Operating Temperature Range................................-40°C to +85°C
Junction Temperature...........................................................+150°C
Storage Temperature Range.................................-65°C to +150°C
Lead Temperature (soldering 10s).......................................+300°C
MAX12557
Dual, 65Msps, 14-Bit, IF/Baseband ADC
ELECTRICAL CHARACTERISTICS (continued)(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈10pF at digital outputs, VIN= -0.5dBFS (differen-
tial), DIFFCLK/SECLK= OVDD, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T= GND, fCLK= 65MHz, TA= -40°C to
MAX12557
Dual, 65Msps, 14-Bit, IF/Baseband ADC
ELECTRICAL CHARACTERISTICS (continued)(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈10pF at digital outputs, VIN= -0.5dBFS (differen-
tial), DIFFCLK/SECLK= OVDD, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T= GND, fCLK= 65MHz, TA= -40°C to
MAX12557
Dual, 65Msps, 14-Bit, IF/Baseband ADC
ELECTRICAL CHARACTERISTICS (continued)(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈10pF at digital outputs, VIN= -0.5dBFS (differen-
tial), DIFFCLK/SECLK= OVDD, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T= GND, fCLK= 65MHz, TA= -40°C to
