MAX1142ACAP ,14-Bit ADC, 200ksps, +5V Single-Supply with Referenceapplications such as indus-trial process control, instrumentation, and medical♦ 2.5μA Shutdown Mode
MAX1142ACAP+ ,14-Bit ADC, 200ksps, +5V Single-Supply with Referenceapplications. The MAX1142 accepts input signals of 0to +12V (unipolar) or ±12V (bipolar), while the ..
MAX1142ACAP+ ,14-Bit ADC, 200ksps, +5V Single-Supply with ReferenceELECTRICAL CHARACTERISTICS(AV = DV = +5V ±5%, f = 4.8MHz, external clock (50% duty cycle), 24 clock ..
MAX1142AEAP+ ,14-Bit ADC, 200ksps, +5V Single-Supply with ReferenceMAX1142/MAX114319-2037; Rev 0; 5/0114-Bit ADC, 200ksps, +5V Single-Supply with Reference
MAX1142BCAP ,14-Bit ADC, 200ksps, +5V Single-Supply with ReferenceFeaturesThe MAX1142/MAX1143 are 200ksps, 14-bit ADCs.♦ 200ksps (Bipolar) and 150ksps (Unipolar) The ..
MAX1142BCAP+ ,14-Bit ADC, 200ksps, +5V Single-Supply with ReferenceApplicationsOrdering Information continued at end of data sheet.Industrial Process ControlIndustria ..
MAX3483ESA ,3.3V-Powered, 10Mbps and Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3483ESA ,3.3V-Powered, 10Mbps and Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3483ESA ,3.3V-Powered, 10Mbps and Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3483ESA ,3.3V-Powered, 10Mbps and Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3483ESA+ ,3.3V Powered, ±15kV ESD-Protected, 12Mbps, Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3485CSA ,3.3V-Powered / 10Mbps and Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX1142ACAP-MAX1142ACAP+-MAX1142AEAP+-MAX1142BCAP-MAX1142BCAP+-MAX1143ACAP+
14-Bit ADC, 200ksps, +5V Single-Supply with Reference
General DescriptionThe MAX1142/MAX1143 are 200ksps, 14-bit ADCs.
These serially interfaced ADCs connect directly to
SPI™, QSPI™, and MICROWIRE™ devices without
external logic. They combine an input scaling network,
internal track/hold, a clock, +4.096V reference, and
three general-purpose digital output pins (for external
multiplexer or PGA control) in a 20-pin SSOP package.
The excellent dynamic performance (SINAD ‡81dB),
high-speed (200ksps), and low power (7.5mA) of these
ADCs, make them ideal for applications such as indus-
trial process control, instrumentation, and medical
applications. The MAX1142 accepts input signals of 0
to +12V (unipolar) or ±12V (bipolar), while the
MAX1143 accepts input signals of 0 to +4.096V (unipo-
lar) or ±4.096V (bipolar). Operating from a single
+4.75V to +5.25V analog supply and a +4.75V to
+5.25V digital supply, power-down modes reduce cur-
rent consumption to 1mA at 10ksps and further reduce
supply current to less than 20µA at slower data rates.
A serial strobe output (SSTRB) allows direct connection
to the TMS320-family of digital signal processors. The
MAX1142/MAX1143 user can select either the internal
clock, or an external serial-interface clock for the ADC
to perform analog-to-digital conversions.
The MAX1142/MAX1143 feature internal calibration cir-
cuitry to correct linearity and offset errors. On-demand
calibration allows the user to optimize performance.
Three user-programmable logic outputs are provided
for the control of an 8-channel MUX or a PGA.
ApplicationsIndustrial Process Control
Industrial I/O Modules
Data-Acquisition Systems
Medical Instruments
Portable and Battery-Powered Equipment
Features200ksps (Bipolar) and 150ksps (Unipolar)
Sampling ADC14-Bits, No Missing Codes1LSB INL Guaranteed81dB (min) SINAD +5V Single-Supply OperationLow Power Operation, 7.5mA (Unipolar Mode)2.5μA Shutdown ModeSoftware-Configurable Unipolar & Bipolar Input
Ranges
0 to +12V and ±12V (MAX1142)
0 to +4.096V and ±4.096V (MAX1143)
Internal or External ReferenceInternal or External ClockSPI/QSPI/MICROWIRE-Compatible Wire Serial
Interface Three User-Programmable Logic Outputs Small 20-Pin SSOP Package
MAX1142/MAX1143
14-Bit ADC, 200ksps, +5V Single-Supply
with ReferenceTOP VIEW
SHDN
RST
AGND
AIN
CREF
AVDD
AGND
REFADJ
REF
DIN
DVDD
DGND
SCLK
SSTRB
DGNDDOUT
MAX1142
MAX1143
SSOP
Pin Configuration19-2037; Rev 0; 5/01
Ordering Information
PARTTEMP. RANGEPIN-
PACKAGE
INL
(LSB)
MAX1142ACAP0°C to +70°C20 SSOP–1
MAX1142BCAP0°C to +70°C20 SSOP–2
Functional Diagram appears at end of data sheet.
Typical Application Circuit appears at end of data sheet.SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
Ordering Information continued at end of data sheet.
MAX1142/MAX1143
14-Bit ADC, 200ksps, +5V Single-Supply
with Reference
ABSOLUTE MAXIMUM RATINGSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVDDto AGND, DVDDto DGND.............................-0.3V to +6V
AGND to DGND.....................................................-0.3V to +0.3V
AIN to AGND.....................................................................±16.5V
REFADJ, CREF, REF to AGND.................-0.3V to (AVDD+ 0.3V)
Digital Inputs to DGND.............................................-0.3V to +6V
Digital Outputs to DGND.........................-0.3V to (DVDD+ 0.3V)
Continuous Power Dissipation (TA= +70°C)
20-SSOP (derate 8.00mW/°C above +70°C)...............640mW
Operating Temperature Ranges
MAX114_CAP......................................................0°C to +70°C
MAX114_EAP....................................................-40°C to +85°C
Storage Temperature Range.............................-60°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s).................................+300°C
ELECTRICAL CHARACTERISTICS(AVDD= DVDD= +5V ±5%, fSCLK= 4.8MHz, external clock (50% duty cycle), 24 clocks/conversion (200ksps), bipolar input, external
VREF= +4.096V, VREFADJ= AVDD, CREF= 2.2µF, CCREF= 1µF, TA = TMINto TMAX, unless otherwise noted. Typical values are at = +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
DC ACCURACY (Note 1)Resolution14Bits
Unipolar ModeMAX114_A–1Relative Accuracy (Note 2)INLMAX114_B–2LSB
Differential NonlinearityDNLUnipolar Mode–1LSB
Transition Noise0.34LSB RMS
Unipolar–4Offset ErrorBipolar–6mV
Unipolar–0.2Gain Error (Note 3)Bipolar–0.3%FSR
Offset D r i ft ( Bi p ol ar and U ni p ol ar ) Excluding reference drift–1ppm/oCai n D r i ft ( Bi p ol ar and U ni p ol ar ) Excluding reference drift–1ppm/oC
DYNAMIC SPECIFICATIONS (5kHz sine-wave input, 200ksps, 4.8MHz clock, bipolar input mode).(MAX1142, 24Vp-p. MAX1143, 8.192Vp-p)
fIN = 5kHz81SINADfIN = 100kHz82dB
fIN = 5kHz82SNRfIN = 100kHz82dB
fIN = 5kHz-88THDfIN = 100kHz91dB
fIN = 5kHz90SFDRfIN = 100kHz95dB
ANALOG INPUTUnipolar012MAX1142Bipolar-1212
Unipolar04.096Input Range
MAX1143Bipolar- 4.0964.096
MAX1142/MAX1143
14-Bit ADC, 200ksps, +5V Single-Supply
with Reference
ELECTRICAL CHARACTERISTICS (continued)(AVDD= DVDD= +5V ±5%, fSCLK= 4.8MHz, external clock (50% duty cycle), 24 clocks/conversion (200ksps), bipolar input, external
VREF= +4.096V, VREFADJ= AVDD, CREF= 2.2µF, CCREF= 1µF, TA = TMINto TMAX, unless otherwise noted. Typical values are at = +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSUnipolar7.510.0MAX1142Bipolar5.97.9
Unipolar1001000Input Impedance
MAX1143Bipolar3.44.5
Input Capacitance32pF
CONVERSION RATEInternal Clock Frequency4MHz
Aperture DelaytAD10ns
Aperture JittertAJ50ps
MODE 1 (24 External Clock Cycles per Conversion)Unipolar0.13External Clock FrequencyfSCLKBipolar0.14.8MHz
Unipolar4.17125Sample RatefS = fSCLK /24Bipolar4.17200ksps
Unipolar8240Conversion Time (Note 4)tCONV+ACQ =
24 / fSCLKBipolar5240µs
MODE 2 (Internal Clock Mode)External Clock Frequency
(Data Transfer Only)8MHz
Conversion TimeSSTRB Low Pulse Width46µs
Unipolar1.82Acquisition TimeBipolar1.14µs
MODE 3 (32 External Clock Cycles per Conversion)External Clock FrequencyfSCLKUnipolar or Bipolar0.14.8MHz
Sample RatefS = fSCLK /32Unipolar or Bipolar3.125150ksps
Conversion Time (Note 4)tCONV+ACQ =
32 / fSCLKUnipolar or Bipolar6.67320µs
INTERNAL REFERENCEOutput VoltageVREF4.0564.0964.136V
REF Short Circuit Current24mA
Output Tempco–20ppm/oC
Capacitive Bypass at REF0.4710µF
Maximum Capacitive Bypass at
REFADJ10µF
REFADJ Output Voltage4.096V
REFADJ Input RangeFor small adjustments from 4.096V±100mV
MAX1142/MAX1143
14-Bit ADC, 200ksps, +5V Single-Supply
with Reference
ELECTRICAL CHARACTERISTICS (continued)(AVDD= DVDD= +5V ±5%, fSCLK= 4.8MHz, external clock (50% duty cycle), 24 clocks/conversion (200ksps), bipolar input, external
VREF= +4.096V, VREFADJ= AVDD, CREF= 2.2µF, CCREF= 1µF, TA = TMINto TMAX, unless otherwise noted. Typical values are at = +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSREFADJ Buffer Disable
ThresholdTo power-down the internal referenceAVDD -
0.5V
AVDD -
0.1VV
Buffer Voltage Gain1V/V
EXTERNAL REFERENCE (Reference buffer disabled. Reference applied to REF)Input Range (Notes 5 and 6)3.04.0964.2V
VREF = 4.096V, fSCLK = 4.8MHz250
VREF = 4.096V, fSCLK = 0230Input Current
In power-down, fSCLK = 00.1A
DIGITAL INPUTSInput High VoltageVIH2.4V
Input Low VoltageVIL0.8V
Input LeakageIINVIN = 0 or DVDD–1mA
Input HysteresisVHYST0.2V
Input CapacitanceCIN10pF
DIGITAL OUTPUTSOutput High VoltageVOHISOURCE = 0.5mADVDD -
0.5V
ISINK = 5mA0.4Output Low VoltageVOLISINK = 16mA0.8V
Three-State Leakage CurrentILCS = DVDD–10mA
Three-State Output
CapacitanceCS = DVDD10pF
POWER SUPPLIESAnalog Supply (Note 7)AVDD4.7555.25V
Digital Supply (Note 7)DVDD4.7555.25V
Unipolar Mode58
Bipolar Mode8.511mAAnalog Supply CurrentIANALOG
SHDN = 0, or softw are power -down mode0.310mA
Unipolar or Bipolar Mode2.53.5mADigital Supply CurrentIDIGITALSHDN = 0, or softw are power -down mode2.210mA
Power Supply Rejection Ratio
(Note 8)PSRRAVDD = DVDD = 4.75V to 5.25V,72dB
MAX1142/MAX1143
14-Bit ADC, 200ksps, +5V Single-Supply
with Reference
Note 1:Tested at AVDD = DVDD = +5V, bipolar input mode.
Note 2:Relative accuracy is the deviation of the analog value at any code from its theoretical value after the gain error and offset
error have been nulled.
Note 3:Offset nulled.
Note 4:Conversion time is defined as the number of clock cycles multiplied by the clock period, clock has 50% duty cycle.
Includes the acquisition time.
Note 5:ADC performance is limited by the converter’s noise floor, typically 300µVp-p.
Note 6When an external reference has a different voltage than the specified typical value, the full scale of the ADC will scale
proportionally.
Note 7:Electrical characteristics are guaranteed from AVDD(MIN)= DVDD(MIN)to AVDD(MAX)= DVDD(MAX). For operations beyond
this range, see the Typical Operating Characteristics. For guaranteed specifications beyond the limits, contact
the factory.
Note 8:Defined as the change in positive full-scale caused by a ±5% variation in the nominal supply voltage.
TIMING CHARACTERISTICS (Figures 5 and 6)(AVDD= DVDD= +5V ±5%, TA= TMINto TMAX, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITAcquisition TimetACQ1.14ms
DIN to SCLK SetuptDS50ns
DIN to SCLK HoldtDH0ns
SCLK to DOUT ValidtDO70ns
CS Fall to DOUT EnabletDVCLOAD = 50pF80ns
CS Rise to DOUT DisabletTRCLOAD = 50pF80ns
CS to SCLK Rise SetuptCSS100ns
CS to SCLK Rise HoldtCSH0ns
SCLK High Pulse WidthtCH80ns
SCLK Low Pulse WidthtCL80ns
SCLK Fall to SSTRBtSSTRBCLOAD = 50pF80ns
CS Fall to SSTRB EnabletSDVCLOAD = 50pF, External clock mode80ns
CS Rise to SSTRB DisabletSTRCLOAD = 50pF, External clock mode80ns
SSTRB Rise to SCLK RisetSCKInternal clock mode0ns
RST Pulse WidthtRS208ns
