MAX11047ECB+-MAX11048ECB+-MAX11048ETN+-MAX11049ETN+ Fast Delivery |IC PHOENIX CO.,LIMITED

MAX11047ECB+ ,4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCsApplications(10mm x 10mm) PackagesAutomatic Test Equipment ♦ Evaluation Kit Available (MAX11046EVKI ..
MAX11048ECB+ ,4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCsMAX11047–MAX11049/MAX11057–MAX1105919-5106; Rev 2; 1/114-/6-/8-Channel, 16-/14-Bit,Simultaneous-Sam ..
MAX11048ETN+ ,4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCsApplications(10mm x 10mm) PackagesAutomatic Test Equipment ♦ Evaluation Kit Available (MAX11046EVKI ..
MAX11048ETN+ ,4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCsfeatures include a 4MHz T/H input band-width, internal clock, and internal or external reference.♦ ..
MAX11049ETN+ ,4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCsELECTRICAL CHARACTERISTICS(V = 4.75V to 5.25V, V = +2.7V to 5.25V, V = V = V = 0V, V = internal ref ..
MAX11049ETN+ ,4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCsFeatures♦ 16-Bit ADC (MAX11047/MAX11048/MAX11049)The MAX11047/MAX11048/MAX11049 and MAX11057/MAX110 ..
MAX3442EASA+ ,±15kV ESD-Protected, ±60V Fault-Protected, 10Mbps, Fail-Safe RS-485/J1708 Transceivers
MAX3442EESA ,15kV ESD-Protected / 60V Fault-Protected / 10Mbps / Fail-Safe RS-485/J1708 Transceivers
MAX3442EESA+ ,±15kV ESD-Protected, ±60V Fault-Protected, 10Mbps, Fail-Safe RS-485/J1708 Transceivers
MAX3442EESA+T ,±15kV ESD-Protected, ±60V Fault-Protected, 10Mbps, Fail-Safe RS-485/J1708 Transceivers
MAX3443ECSA ,15kV ESD-Protected / 60V Fault-Protected / 10Mbps / Fail-Safe RS-485/J1708 Transceivers
MAX3443ECSA ,15kV ESD-Protected / 60V Fault-Protected / 10Mbps / Fail-Safe RS-485/J1708 Transceivers

MAX11047ECB+-MAX11048ECB+-MAX11048ETN+-MAX11049ETN+
4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs
General Description
The MAX11047/MAX11048/MAX11049 and MAX11057/
MAX11058/MAX11059 16-bit/14-bit ADCs offer 4, 6, or 8
independent input channels. Featuring independent track
and hold (T/H) and SAR circuitry, these parts provide
simultaneous sampling at 250ksps for each channel.
The devices accept a 0 to +5V input. All inputs are
overrange protected with internal ±20mA input clamps
providing overrange protection with a simple external
resistor. Other features include a 4MHz T/H input band-
width, internal clock, and internal or external reference.
A 20MHz, bidirectional, parallel interface provides the
conversion results and accepts digital configuration
inputs.
The devices operate with a 4.75V to 5.25V analog supply
and a separate flexible 2.7V to 5.25V digital supply for
interfacing with the host without a level shifter. The
MAX11047/MAX11048/MAX11049 are available in a 56-pin
TQFN and 64-pin TQFP packages while the MAX11057/
MAX11058/MAX11059 are available in TQFP only.All
devices operate over the extended -40°C to +85°C tem-
perature range.
Applications
Automatic Test Equipment
Power-Factor Monitoring and Correction
Power-Grid Protection
Multiphase Motor Control
Vibration and Waveform Analysis
Features16-Bit ADC (MAX11047/MAX11048/MAX11049)14-Bit ADC (MAX11057/MAX11058/MAX11059)4-Channel ADC (MAX11047/MAX11057)6-Channel ADC (MAX11048/MAX11058)8-Channel ADC (MAX11049/MAX11059)Single Analog and Digital SupplyHigh-Impedance Inputs Up to 1GΩOn-Chip T/H Circuit for Each ChannelFast 3µs Conversion TimeHigh Throughput: 250ksps for Each Channel16-/14-Bit, High-Speed, Parallel InterfaceInternal Clocked Conversions10ns Aperture Delay100ps Channel-to-Channel T/H MatchingLow Drift, Accurate 4.096V Internal Reference
Providing an Input Range of 0 to 5VExternal Reference Range of 3.0V to 4.25V,
Allowing Full-Scale Input Ranges of +3.7V to+5.2V56-Pin TQFN (8mm x 8mm) and 64-Pin TQFP
(10mm x 10mm) PackagesEvaluation Kit Available (MAX11046EVKIT+)
MAX11047–MAX11049/MAX11057–MAX11059
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
Ordering Information
19-5106; Rev 2; 1/11
EVALUATION KIT
AVAILABLE
PARTPIN-PACKAGECHANNELS
MAX11047ETN+56 TQFN-EP*4
MAX11047ECB+64 TQFP-EP*4
MAX11048ETN+56 TQFN-EP*6
MAX11048ECB+64 TQFP-EP*6
MAX11049ETN+56 TQFN-EP*8
MAX11049ECB+64 TQFP-EP*8
MAX11057ECB+64 TQFP-EP*4
MAX11058ECB+64 TQFP-EP*6
MAX11059ECB+64 TQFP-EP*8
Note:All devices are specified over the -40°C to +85°C operating
temperature range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Functional Diagram
CLAMPS/H16-/14-BIT ADCs
CLAMPS/H16-/14-BIT ADCs
REF
BUF
CONFIGURATION
REGISTERS
INTERFACE
AND
CONTROL
BANDGAP
REFERENCE
8 x 16-/14-BIT REGISTERS
BIDIRECTIONAL DR
IVERS
CH0
AVDD
AGNDS
AGND
CH7†
DB15**
DB0/CR0
DB3/CR3
DB4
EOCb
SHDN
CONVST
CSb
RDb
WRb
DGND
DVDD
RDC
RDC_SENSE*REFIO
INT REF10kΩ
EXT REF
*CONNECTED INTERNALLY ON THE TQFN PARTS
**MAX11047/MAX11048/MAX11049
†MAX11049/MAX11059
MAX11047/MAX11048/MAX11049/
MAX11057/MAX11058/MAX11059
MAX11047–MAX11049/MAX11057–MAX11059
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VAVDD= 4.75V to 5.25V, VDVDD= +2.7V to 5.25V, VAGNDS= VAGND= VDGND= 0V, VREFIO= internal reference, CRDC= 4 x 33µF,
CREFIO= 0.1µF, CAVDD = 4 x 0.1µF || 10µF, CDVDD = 3 x 0.1µF || 10µF; all digital inputs at DVDDor DGND, unless otherwise noted.= -40°Cto +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVDD to AGND........................................................-0.3V to +6V
DVDD to AGND and DGND.....................................-0.3V to +6V
DGND to AGND.....................................................-0.3V to +0.3V
AGNDS to AGND...................................................-0.3V to +0.3V
CH0–CH7 to AGND...............................................-2.5V to +7.5V
REFIO, RDC to AGND..................................-0.3V to the lower of
(AVDD + 0.3V) and +6V
EOC, WR, RD, CS, CONVST to AGND.........-0.3V to the lower of
(DVDD + 0.3V) and +6V
DB0–DB15 to AGND....................................-0.3V to the lower of
(DVDD + 0.3V) and +6V
Maximum Current into Any Pin Except AVDD, DVDD, AGND,
DGND...........................................................................±50mA
Continuous Power Dissipation (TA= +70°C)
56-Pin TQFN (derated 47.6mW/°C above +70°C)..3809.5mW
64-Pin TQFP (derate 43.5mW/°C above +70°C.........3478mW
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
Soldering Temperature (reflow).......................................+260°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
STATIC PERFORMANCE (Note 1)
MAX11047/MAX11048/MAX11049 16 Resolution N MAX11057/MAX11058/MAX11059 14 Bits
MAX11047/MAX11048/MAX11049 -2 ±0.65 +2 Integral Nonlinearity INL
MAX11057/MAX11058/MAX11059 -0.9 ±0.2 +0.9
LSB
MAX11047/MAX11048/MAX11049 > -1 ±0.7 < +1.2 Differential Nonlinearity DNL
MAX11057/MAX11058/MAX11059 -0.6 ±0.2 +0.7
LSB
MAX11047/MAX11048/MAX11049 16 No Missing Codes MAX11057/MAX11058/MAX11059 14 Bits
Offset Error ±0.001 ±0.012 %FSR
Offset Temperature Coefficient ±0.8 µV/°C
Channel Offset Matching ±0.01 %FSR
Gain Error ±0.012 %FSR
Positive Full-Scale Error ±0.017 %FSR
Positive Full-Scale Error Matching ±0.01 %FSR
Channel Gain-Error Matching Between all channels ±0.01 %FSR
Gain Temperature Coefficient ±0.6 ppm/°C
DYNAMIC PERFORMANCE
MAX11047/MAX11048/MAX11049,
fIN = 10kHz, full-scale input 90.7 92.3
Signal-to-Noise Ratio SNR
MAX11057/MAX11058/MAX11059,
fIN = 10kHz, full-scale input 84.5 85.3
dB
MAX11047–MAX11049/MAX11057–MAX11059
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
ELECTRICAL CHARACTERISTICS (continued)
VAVDD= 4.75V to 5.25V, VDVDD= +2.7V to 5.25V, VAGNDS= VAGND= VDGND= 0V, VREFIO= internal reference, CRDC= 4 x 33µF,
CREFIO= 0.1µF, CAVDD = 4 x 0.1µF || 10µF, CDVDD = 3 x 0.1µF || 10µF; all digital inputs at DVDDor DGND, unless otherwise noted.= -40°Cto +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
MAX11047/MAX11048/MAX11049,
fIN = 10kHz, full-scale input 90.5 92
Signal-to-Noise and Distortion
Ratio SINAD
MAX11057/MAX11058/MAX11059,
fIN = 10kHz, full-scale input 84.5 85.2
dB
MAX11047/MAX11048/
MAX11049 98 108
Spurious-Free Dynamic Range SFDR fIN = 10kHz,
full-scale input MAX11057/MAX11058/
MAX11059 95 108
dB
MAX11047/MAX11048/
MAX11049 -108 -98
Total Harmonic Distortion THD fIN = 10kHz,
full-scale input MAX11057/MAX11058/
MAX11059 -108 -95
dB
Channel-to-Channel Crosstalk fIN = 60Hz, full scale and ground on
adjacent channel (Note 2) -126 -100 dB
ANALOG INPUTS(CH0–CH7)
Input Voltage Range (Note 3) 0 1.22 x
VREFIOV
Input Leakage Current -1 +1 µA
Input Capacitance 15 pF
Input-Clamp Protection Current Each input simultaneously -20 +20 mA
TRACK AND HOLD
Throughput Rate Per channel 250 ksps
Acquisition Time tACQ 1 µs
-3dB point 4 Full-Power Bandwidth -0.1dB point > 0.2 MHz
Aperture Delay 10 ns
Aperture-Delay Matching 100 ps
Aperture Jitter 50 psRMS
INTERNAL REFERENCE
REFIO Voltage VREF 4.080 4.096 4.112 V
REFIO Temperature Coefficient ±4 ppm/°C
EXTERNAL REFERENCE
Input Current -10 +10 µA
REF Voltage Input Range VREF 3.00 4.25 V
REF Input Capacitance 15 pF
DIGITAL INPUTS (CR0–CR3, RD,WR,CS, CONVST)
Input-Voltage High VIH VDVDD = 2.7V to 5.25V 2 V
Input-Voltage Low VIL VDVDD = 2.7V to 5.25V 0.8 V
Input Capacitance CIN 10 pF
MAX11047–MAX11049/MAX11057–MAX11059
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
ELECTRICAL CHARACTERISTICS (continued)
VAVDD= 4.75V to 5.25V, VDVDD= +2.7V to 5.25V, VAGNDS= VAGND= VDGND= 0V, VREFIO= internal reference, CRDC= 4 x 33µF,
CREFIO= 0.1µF, CAVDD = 4 x 0.1µF || 10µF, CDVDD = 3 x 0.1µF || 10µF; all digital inputs at DVDDor DGND, unless otherwise noted.= -40°Cto +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
DIGITAL OUTPUTS (DB0–DB15, EOC)
Output-Voltage High VOH ISOURCE = 1.2mA VDVDD -
0.4 V
Output-Voltage Low VOL ISINK = 1mA 0.4 V
Three-State Leakage Current DB0–DB15, VRD VIH or VCS VIH 10 µA
Three-State Output Capacitance DB0–DB15, VRD VIH or VCS VIH 15 pF
POWER SUPPLIES (MAX11047/MAX11057)
Analog Supply Voltage AVDD 4.75 5.25 V
Digital Supply Voltage DVDD 2.70 5.25 V
Analog Supply Current IAVDD 25 mA
Digital Supply Current IDVDD VDVDD = 3.3V (Note 4) 5.5 mA
Shutdown Current For DVDD 10 µA
Shutdown Current For AVDD 10 µA
MAX11047 ±1.2 Power-Supply Rejection PSR VAVDD = 4.9V to 5.1V
(Note 5) MAX11057 ±0.3
LSB
POWER SUPPLIES (MAX11048/MAX11058)
Analog Supply Voltage AVDD 4.75 5.25 V
Digital Supply Voltage DVDD 2.70 5.25 V
Analog Supply Current IAVDD 32 mA
Digital Supply Current IDVDD VDVDD = 3.3V (Note 4) 6.5 mA
Shutdown Current For DVDD 10 µA
Shutdown Current For AVDD 10 µA
MAX11048 ±1.2 Power-Supply Rejection PSR VAVDD = 4.9V to 5.1V
(Note 5) MAX11058 ±0.3
LSB
POWER SUPPLIES (MAX11049/MAX11059)
Analog Supply Voltage AVDD 4.75 5.25 V
Digital Supply Voltage DVDD 2.70 5.25 V
Analog Supply Current IAVDD 39 mA
Digital Supply Current IDVDD VDVDD = 3.3V (Note 4) 7 mA
Shutdown Current For DVDD 10 µA
Shutdown Current For AVDD 10 µA
MAX11049 ±1.2 Power-Supply Rejection PSR VAVDD = 4.9V to 5.1V
(Note 5) MAX11059 ±0.3
LSB
TIMING CHARACTERISTICS(Note 4)
CONVST Rise to EOC Fall tCON Conversion time (Note 6) 3 µs
Acquisition Time tACQ 1 µs
CS Rise to CONVST Rise tQ Sample quiet time (Note 6) 500 ns
MAX11047–MAX11049/MAX11057–MAX11059
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
Typical Operating Characteristics
(VAVDD= 5V, VDVDD= 3.3V, TA= +25°C, fSAMPLE= 250ksps, internal reference, unless otherwise noted.)
INTEGRAL NONLINEARITY (INL)
vs. CODE FOR MAX1104_
MAX11047 toc01
OUTPUT CODE (DECIMAL)
INL (LSBs)
VAVDD = 5.0V
VDVDD = 3.3V
fSAMPLE = 250ksps
TA = +25°C
VRDC = 4.096V
DIFFERENTIAL NONLINEARITY (DNL)
vs. CODE FOR MAX1104_
MAX11047 toc02
OUTPUT CODE (DECIMAL)
DNL (LSBs)
VAVDD = 5.0V
VDVDD = 3.3V
fSAMPLE = 250ksps
TA = +25°C
VRDC = 4.096V
ELECTRICAL CHARACTERISTICS (continued)
VAVDD= 4.75V to 5.25V, VDVDD= +2.7V to 5.25V, VAGNDS= VAGND= VDGND= 0V, VREFIO= internal reference, CRDC= 4 x 33µF,
CREFIO= 0.1µF, CAVDD = 4 x 0.1µF || 10µF, CDVDD = 3 x 0.1µF || 10µF; all digital inputs at DVDDor DGND, unless otherwise noted.= -40°Cto +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
Note 1:See the Definitionssection at the end of the data sheet.
Note 2:Tested with alternating channels modulated at full scale and ground.
Note 3:See the Input Range and Protectionsection.
Note 4:CLOAD= 30pF on DB0–DB15 and EOC. Inputs (CH0–CH7) alternate between full scale and zero scale. fCONV= 250ksps. All
data is read out.
Note 5:Defined as the change in positive full scale caused by a ±2% variation in the nominal supply voltage.
Note 6:It is recommended that RD, WR, and CSare kept high for the quiet time (tQ) and conversion time (tCON).
Note 7:Guaranteed by design.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
CONVST Rise to EOC Rise t0 65 140 ns
EOC Fall to CONVST Fall t1 CONVST mode B0 = 0 only (Note 7) 0 ns
CONVST Low Time t2 CONVST mode B0 = 1 only 20 ns
CS Fall to WR Fall t3 0 ns
WR Low Time t4 20 ns
CS Rise to WR Rise t5 0 ns
Input Data Setup Time t6 10 ns
Input Data Hold Time t7 0 ns
CS Fall to RD Fall t8 0 ns
RD Low Time t9 30 ns
RD Rise to CS Rise t10 0 ns
RD High Time t11 10 ns
RD Fall to Data Valid t12 35 ns
RD Rise to Data Hold Time t13 (Note 7) 5 ns
MAX11047–MAX11049/MAX11057–MAX11059
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
Typical Operating Characteristics (continued)
(VAVDD= 5V, VDVDD= 3.3V, TA= +25°C, fSAMPLE= 250ksps, internal reference, unless otherwise noted.)
ANALOG SUPPLY CURRENT
vs. TEMPERATURE
MAX11047 toc06
TEMPERATURE (°C)
IAVDD
(mA)3510-15
MAX11049 CONVERTING
MAX11048 CONVERTING
MAX11047 CONVERTING
MAX11047 STATIC
MAX11048 STATIC
MAX11049 STATIC
VAVDD = 5.0V
fSAMPLE = 250ksps
DIGITAL SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX11047 toc07
VDVDD (V)
DVDD
(mA)
TA = +25°C
fSAMPLE = 250ksps
CDBxx = 15pF
MAX11048 CONVERTING
MAX11049/MAX11048/
MAX11047 STATIC
MAX11049 CONVERTING
MAX11047 CONVERTING
DIGITAL SUPPLY CURRENT
vs. TEMPERATURE
MAX11047 toc08
TEMPERATURE (°C)
IDVDD
(mA)3510-15
VDVDD = 3.3V
fSAMPLE = 250ksps
CDBxx = 15pF
MAX11048 CONVERTING
MAX11049/MAX11048/
MAX11047 STATIC
MAX11049 CONVERTING
MAX11047 CONVERTING
ANALOG AND DIGITAL SHUTDOWN
CURRENT vs. TEMPERATURE
MAX11047 toc09
IAVDD
IDVDD
SHUTDOWN CURRENT (µA)3510-15
VAVDD = 5.0V
VDVDD = 3.3V
ANALOG AND DIGITAL SHUTDOWN
CURRENT vs. SUPPY VOLTAGE
MAX11047 toc09a
IAVDD
IDVDD
SHUTDOWN CURRENT (µA)
TA = +25°C
INTERNAL REFERENCE VOLTAGES
vs. SUPPLY VOLTAGE
MAX11047 toc10
REF
(V)
VRDC
VREFIO
TA = +25°C
ANALOG SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX11047 toc05
VAVDD (V)
IAVDD
(mA)
MAX11049 CONVERTING
MAX11048 CONVERTING
MAX11047 CONVERTING
MAX11047 STATIC
MAX11048 STATIC
MAX11049 STATIC
TA = +25°C
fSAMPLE = 250ksps
INL AND DNL vs. TEMPERATURE
FOR MAX1104_
MAX11047 toc04
TEMPERATURE (°C)
INL AND DNL (LSBs)3510-15
VAVDD = 5.0V
VDVDD = 3.3V
fSAMPLE = 250ksps
VRDC = 4.096V
MAX INL
MIN INL
MAX DNL
MIN DNL
INL AND DNL vs. ANALOG SUPPLY
VOLTAGE FOR MAX1104_
MAX11047 toc03
VAVDD (V)
INL AND DNL (LSBs)
VDVDD = 3.3V
fSAMPLE = 250ksps
TA = +25°C
VRDC = 4.096V
MAX DNL
MIN INLMAX INL
MIN DNL
MAX11047–MAX11049/MAX11057–MAX11059
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
GAIN ERROR AND GAIN ERROR
MATCHING vs. TEMPERATURE
MAX11047 toc15
TEMPERATURE (°C)
ERRORS (%FS)
GAIN ERROR MATCHING
0.010fSAMPLE = 250ksps
VAVDD = 5.0V
VREFIO = 4.096V
GAIN ERROR3510-15-4085
FFT PLOT FOR MAX1104_
MAX11047 toc16
FREQUENCY (kHz)
MAGNITUDE (dB)
fIN = 10kHz
fSAMPLE = 250ksps
TA = +25°C
VAVDD = 5.0V
TWO-TONE IMD PLOT FOR MAX1104_
MAX11047 toc17
MAGNITUDE (dB)
fIN1 = 9834Hz
fIN2 = 10384Hz
fSAMPLE = 250ksps
TA = +25°C
VAVDD = 5.0V
VRDC = 4.096V
VIN = -0.01dBFS
SIGNAL-TO-NOISE RATIO (SNR) AND
SIGNAL-TO-NOISE AND DISTORTION RATIO
(SINAD) vs. TEMPERATURE FOR MAX1104_
MAX11047 toc18
SNR AND SINAD (dB)
VAVDD = 5.0V
fIN = 10kHz
fSAMPLE = 250ksps
TA = +25°C
VRDC = 4.096V
VIN = -0.025dB FROM FS
SNR
SINAD
INTERNAL REFERENCE VOLTAGES
vs. TEMPERATURE
MAX11047 toc11
TEMPERATURE (°C)
REFIO
(V)35-1510
VAVDD = 5.0V
UPPER TYPICAL LIMIT
LOWER TYPICAL LIMIT
OFFSET ERROR AND OFFSET ERROR
MATCHING vs. SUPPLY VOLTAGE
MAX11047 toc12
VAVDD (V)
ERRORS (%FS)
fSAMPLE = 250ksps
TA = +25°C
VRDC = 4.096V
OFFSET ERROR MATCHING
OFFSET ERROR
Typical Operating Characteristics (continued)
(VAVDD= 5V, VDVDD= 3.3V, TA= +25°C, fSAMPLE= 250ksps, internal reference, unless otherwise noted.)
OFFSET ERROR AND OFFSET ERROR
MATCHING vs. TEMPERATURE
TEMPERATURE (°C)
ERRORS (%FS)3510-15
OFFSET ERROR MATCHING
0.010fSAMPLE = 250ksps
VAVDD = 5.0V
VREFIO = 4.096V
OFFSET ERROR
GAIN ERROR AND GAIN ERROR
MATCHING vs. SUPPLY VOLTAGE
MAX11047 toc14
VAVDD (V)
ERRORS (%FS)
GAIN ERROR MATCHING
0.010fSAMPLE = 250ksps
TA = +25°C
VRDC = 4.096V
GAIN ERROR
TOTAL HARMONIC DISTORTION (THD)
vs. TEMPERATURE FOR MAX1104_
MAX11047 toc19
THD (dB)
VAVDD = 5.0V
fIN = 10kHz
fSAMPLE = 250ksps
TA = +25°C
VRDC = 4.096V
VIN = -0.025dB FROM FS
MAX11047–MAX11049/MAX11057–MAX11059
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
Typical Operating Characteristics (continued)
(VAVDD= 5V, VDVDD= 3.3V, TA= +25°C, fSAMPLE= 250ksps, internal reference, unless otherwise noted.)
SIGNAL-TO-NOISE AND DISTORTION RATIO
(SINAD) vs. FREQUENCY FOR MAX1104_
MAX11047 toc22
FREQUENCY (kHz)
SINAD (dB)
VAVDD = 5.0V
fSAMPLE = 250ksps
TA = +25°C
VRDC = 4.096V
VIN = -0.025dB FROM FS
THD vs. INPUT FREQUENCY
FOR MAX1104_
MAX11047 toc23
FREQUENCY (kHz)
THD (dB)
VAVDD = 5.0V
fSAMPLE = 250ksps
TA = +25°C
VRDC = 4.096V
VIN = -0.025dB FROM FS
CROSSTALK vs. FREQUENCY
MAX11047 toc24
FREQUENCY (kHz)
CROSSTALK (dB)1
fIN = 60Hz
fSAMPLE = 250ksps
TA = +25°C
VAVDD = 5.0V
VRDC = 4.096V
VIN = -0.025dB FROM FS
INACTIVE CHANNEL AT GND
OUTPUT NOISE HISTOGRAM WITH INPUT
CONNECTED TO 2.5V FOR MAX1104_
MAX11047 toc25
OUTPUT CODE (DECIMAL)
NUMBER OF OCCURENCES
VCHX = 2.500270V
VAVDD = 5.0V
fSAMPLE = 250ksps
TA = +25°C
CONVERSION TIME vs. ANALOG
SUPPLY VOLTAGE
MAX11047 toc26
CONVERSION TIME (µS)
TA = +25°C
CONVERSION TIME vs. TEMPERATURE
MAX11047 toc27
CONVERSION TIME (µS)
VAVDD = 5.0V
SNR AND SINAD vs. ANALOG SUPPLY
VOLTAGE FOR MAX1104_
MAX11047 toc20
fIN = 10kHz
fSAMPLE = 250ksps
TA = +25°C
VRDC = 4.096V
VIN = -0.025dB FROM FS
SNR AND SINAD (dB)
VAVDD (V)
SNR
SINAD
THD vs. ANALOG SUPPLY VOLTAGE
FOR MAX1104_
MAX11047 toc21
fIN = 10kHz
fSAMPLE = 250ksps
TA = +25°C
VRDC = 4.096V
VIN = -0.025dB FROM FS
VAVDD (V)
THD (dB)
-110.0
MAX11047–MAX11049/MAX11057–MAX11059
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
TOP VIEW
MAX11047
MAX11048
MAX11049
TQFN
8mm x 8mm
DB1/CR1
*EPDB0/CR0
EOC
CONVST
SHDN
DVDD
DGND
RDC
AGNDS
AVDD
AGND
CH0*/I.C.†‡
AGNDS
RDC
DB14
DB15
DVDD
DGND
RDC
AGNDS
AVDD
AGND
I.C.†‡/CH7*
‡MAX11047
†MAX11048
*MAX11049
AGNDS
RDC23456789101112131441403938373635343332313029
DB4
DB3/CR3DB2/CR2
DB5DB6DB7
DVDDDGND
DB8DB9
DB10DB11DB12DB13
AGNDAVDDCH1*/CH0
/I.C.
CH2*/CH1
/CH0
AGNDSCH3*/CH2
/CH1
RDCREFIOCH4*/CH3
/CH2
AGNDSCH5*/CH4
/CH3
AGNDAVDDCH6*/CH5
/I.C.
MAX11047
MAX11048
MAX11049
TQFP 10mm x 10mm
*EPEOC
CONVST
SHDN
DVDD
DGND
AGNDS
AVDD
AGND
RDC_SENSE
RDC
AGNDS
AVDD
AGND
CH0*/I.C.†‡
AGNDS
DGND
AGNDS
AVDD
AGND
RDC_SENSE
RDC
AGNDS
AVDD
AGND
I.C.†‡/CH7*
AGNDS23456789101112131447464544434241403938373635
DB5DB4
DB3/CR3
DB6DB7
DVDDDGND
DB8DB9
DB10DB11DB12DB13DB14
CH2*/CH1
/CH0
AGNDAVDDAGNDSCH3*/CH2
/CH1
RDCREFIOCH4*/CH3
/CH2
AGNDSCH5*/CH4
/CH3
AGNDAVDDCH6*/CH5
/I.C.
RDC16
DB2/CR2DB1/CR133
CH1*/CH0
/I.C.
RDC
DB0/CR0DB15
DVDD
Pin Configurations
MAX11057
MAX11058
MAX11059
*EPEOC
CONVST
SHDN
DVDD
DGND
AGNDS
AVDD
AGND
RDC_SENSE
RDC
AGNDS
AVDD
AGND
CH0*/I.C.†‡
AGNDS
DGND
AGNDS
AVDD
AGND
RDC_SENSE
RDC
AGNDS
AVDD
AGND
I.C.†‡/CH7*
AGNDS23456789101112131447464544434241403938373635
CH2*/CH1
/CH0
AGNDAVDDAGNDSCH3*/CH2
/CH1
RDCREFIOCH4*/CH3
/CH2
AGNDSCH5*/CH4
/CH3
AGNDAVDDCH6*/CH5
/I.C.
RDC1633
CH1*/CH0
/I.C.
RDC
CR0DB13
DVDD
‡MAX11057
†MAX11058
TQFP
DB3DB2
DB1/CR3
DB4DB5
DVDDDGND
DB6
DB7DB8DB9
DB10DB11DB12
DB0/CR2
CR1
MAX11047–MAX11049/MAX11057–MAX11059
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
Pin Description
PIN
MAX11047
(TQFN-EP)
MAX11048
(TQFN-EP)
MAX11049
(TQFN-EP)
NAMEFUNCTION11DB1316-Bit Parallel Data Bus Digital Output Bit 1322DB1216-Bit Parallel Data Bus Digital Output Bit 1233DB1116-Bit Parallel Data Bus Digital Output Bit 1144DB1016-Bit Parallel Data Bus Digital Output Bit 1055DB916-Bit Parallel Data Bus Digital Output Bit 966DB816-Bit Parallel Data Bus Digital Output Bit 8
7, 21, 507, 21, 507, 21, 50DGNDDigital Ground
8, 20, 518, 20, 518, 20, 51DVDDDigital Supply. Bypass to DGND with a 0.1µF capacitor at each DVDD input.99DB716-Bit Parallel Data Bus Digital Output Bit 71010DB616-Bit Parallel Data Bus Digital Output Bit 61111DB516-Bit Parallel Data Bus Digital Output Bit 51212DB416-Bit Parallel Data Bus Digital Output Bit 41313DB3/CR316-Bit Parallel Data Bus Digital Output Bit 3/Configuration Register Input Bit 31414DB2/CR216-Bit Parallel Data Bus Digital Output Bit 2/Configuration Register Input Bit 21515DB1/CR116-Bit Parallel Data Bus Digital Output Bit 1/Configuration Register Input Bit 11616DB0/CR016-Bit Parallel Data Bus Digital Output Bit 0/Configuration Register Input Bit 01717EOCActive-Low End of Conversion Output. EOC goes low when conversion is
completed. EOC goes high when a conversion is initiated.1818CONVST
Convert Start Input. Rising edge of CONVST ends sample and starts a
conversion on the captured sample. The ADC is in acquisition mode when
CONVST is low and CONVST mode = 0.1919SHDN
Shutdown Input. If SHDN is held high, the entire device enters and stays in a
low-current state. Contents of the Configuration register are not lost when in
the shutdown state.
22, 28, 35,
43, 49
22, 28, 35,
43, 49
22, 28, 35,
43, 49RDC
Reference Buffer Decoupling. Connect all RDC outputs together. Bypass to
AGND with at least an 80µF total capacitance. See the Layout, Grounding,
and Bypassing section.
23, 27, 33,
38, 44, 48
23, 27, 33,
38, 44, 48
23, 27, 33,
38, 44, 48AGNDSSignal Ground. Connect all AGND and AGNDS inputs together on PWB.
24, 30,
41, 47
24, 30,
41, 47
24, 30,
41, 47AVDDAnalog Supply Input. Bypass AVDD to AGND with a 0.1µF capacitor at each
AVDD input.
25, 31,
40, 46
25, 31,
40, 46
25, 31,
40, 46AGNDAnalog Ground. Connect all AGND inputs together.
26, 29,
42, 4526, 45—I.C.Internally Connected. Connect to AGND2926CH0Channel 0 Analog Input3229CH1Channel 1 Analog Input3636REFIOExternal Reference Input/Internal Reference Output. Place a 0.1µF capacitor
from REFIO to AGND.
MAX11047–MAX11049/MAX11057–MAX11059
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
Pin Description (continued)
PIN
MAX11047
(TQFN-EP)
MAX11048
(TQFN-EP)
MAX11049
(TQFN-EP)
NAMEFUNCTION3432CH2Channel 2 Analog Input3734CH3Channel 3 Analog Input3937CH4Channel 4 Analog Input4239CH5Channel 5 Analog Input—42CH6Channel 6 Analog Input—45CH7Channel 7 Analog Input5252WRActive-Low Write Input. Drive WR low to write to the ADC. Configuration
registers are loaded on the rising edge of WR.5353CSActive Low-Chip Select Input. Drive CS low when reading from or writing to
the ADC.5454RDActive-Low Read Input. Drive RD low to read from the ADC. Each rising edge
of RD advances the channel output on the data bus.5555DB1516-Bit Parallel Data Bus Digital Output Bit 155656DB1416-Bit Parallel Data Bus Digital Output Bit 14
———EP
Exposed Pad. Internally connected to AGND. Connect to a large ground
plane to maximize thermal performance. Not intended as an electrical
connection point.
PIN
MAX11047
(TQFP-EP)
MAX11048
(TQFP-EP)
MAX11049
(TQFP-EP)
NAMEFUNCTION11DB1416-Bit Parallel Data Bus Digital Output Bit 1422DB1316-Bit Parallel Data Bus Digital Output Bit 1333DB1216-Bit Parallel Data Bus Digital Output Bit 1244DB1116-Bit Parallel Data Bus Digital Output Bit 1155DB1016-Bit Parallel Data Bus Digital Output Bit 1066DB916-Bit Parallel Data Bus Digital Output Bit 977DB816-Bit Parallel Data Bus Digital Output Bit 8
8, 22, 598, 22, 598, 22, 59DGNDDigital Ground
9, 21, 609, 21, 609, 21, 60DVDDDigital Supply. Bypass to DGND with a 0.µF capacitor at each DVDD input.1010DB716-Bit Parallel Data Bus Digital Output Bit 71111DB616-Bit Parallel Data Bus Digital Output Bit 61212DB516-Bit Parallel Data Bus Digital Output Bit 51313DB416-Bit Parallel Data Bus Digital Output Bit 41414DB3/CR316-Bit Parallel Data Bus Digital Output Bit 3/Configuration Register Input Bit 31515DB2/CR216-Bit Parallel Data Bus Digital Output Bit 2/Configuration Register Input Bit 21616DB1/CR116-Bit Parallel Data Bus Digital Output Bit 1/Configuration Register Input Bit 1
MAX11047–MAX11049/MAX11057–MAX11059
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
Pin Description (continued)
PIN
MAX11047
(TQFP-EP)
MAX11048
(TQFP-EP)
MAX11049
(TQFP-EP)
NAMEFUNCTION1818EOCActive-Low, End-of-Conversion Output. EOC goes low when a conversion is
completed. EOC goes high when a conversion is initiated.1919CONVST
Convert Start Input. The rising edge of CONVST ends sample and starts a
conversion on the captured sample. The ADC is in acquisition mode when
CONVST is low and CONVST mode = 0.2020SHDN
Shutdown Input. If SHDN is held high, the entire device enters and stays in a
low-current state. Contents of the Configuration register are not lost when in
the shutdown state.
23, 28, 32,
38, 43, 49,
53, 58
23, 28, 32,
38, 43, 49,
53, 58
23, 28, 32,
38, 43, 49,
53, 58
AGNDSSignal Ground. Connect all AGND and AGNDS inputs together.
24, 29, 35,
46, 52, 57
24, 29, 35,
46, 52, 57
24, 29, 35,
46, 52, 57AVDDAnalog Supply Input. Bypass AVDD to AGND with a 0.1µF capacitor at each
AVDD input.
25, 30, 36,
45, 51, 56
25, 30, 36,
45, 51, 56
25, 30, 36,
45, 51, 56AGNDAnalog Ground. Connect all AGND inputs together.
26, 5526, 5526, 55RD C _S E N S E Reference Buffer Sense Feedback. Connect to RDC plane.
27, 33, 40,
48, 54
27, 33, 40,
48, 54
27, 33, 40,
48, 54RDC
Reference Buffer Decoupling. Connect all RDC outputs together. Bypass to
AGND with at least an 80µF total capacitance. See the Layout, Grounding,
and Bypassing section.
31, 34,
47, 5031, 50—I.C.Internally Connected. Connect to AGND.3431CH0Channel 0 Analog Input3734CH1Channel 1 Analog Input4141REFIOExternal Reference Input/Internal Reference Output. Place a 0.1µF capacitor
from REFIO to AGND.3937CH2Channel 2 Analog Input4239CH3Channel 3 Analog Input4442CH4Channel 4 Analog Input4744CH5Channel 5 Analog Input—47CH6Channel 6 Analog Input—50CH7Channel 7 Analog Input6161WRActive-Low Write Input. Drive WR low to write to the ADC. Configuration
registers are loaded on the rising edge of WR.6262CSActive-Low Chip-Select Input. Drive CS low when reading from or writing to
the ADC.6363RDActive-Low Read Input. Drive RD low to read from the ADC. Each rising edge
of RD advances the channel output on the data bus.6464DB1516-Bit Parallel Data Bus Digital Out Bit 15—EP
Exposed Pad. Internally connected to AGND. Connect to a large ground
plane to maximize thermal performance. Not intended as an electrical
MAX11047–MAX11049/MAX11057–MAX11059
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
Pin Description (continued)
PIN
MAX11057
(TQFP-EP)
MAX11058
(TQFP-EP)
MAX11059
(TQFP-EP)
NAMEFUNCTION11DB1214-Bit Parallel Data Bus Digital Output Bit 1222DB1114-Bit Parallel Data Bus Digital Output Bit 1133DB1014-Bit Parallel Data Bus Digital Output Bit 1044DB914-Bit Parallel Data Bus Digital Output Bit 955DB814-Bit Parallel Data Bus Digital Output Bit 866DB714-Bit Parallel Data Bus Digital Output Bit 777DB614-Bit Parallel Data Bus Digital Output Bit 6
8, 22, 598, 22, 598, 22, 59DGNDDigital Ground
9, 21, 609, 21, 609, 21, 60DVDDDigital Supply. Bypass to DGND with a 0.1µF capacitor at each DVDD input.1010DB514-Bit Parallel Data Bus Digital Output Bit 51111DB414-Bit Parallel Data Bus Digital Output Bit 41212DB314-Bit Parallel Data Bus Digital Output Bit 31313DB214-Bit Parallel Data Bus Digital Output Bit 21414DB1/CR314-Bit Parallel Data Bus Digital Output Bit 1/Configuration Register Input Bit 31515DB0/CR214-Bit Parallel Data Bus Digital Output Bit 0/Configuration Register Input Bit 21616CR1Configuration Register Input Bit 11717CR0Configuration Register Input Bit 01818EOCActive-Low, End-of-Conversion Output. EOC goes low when a conversion is
completed. EOC goes high when a conversion is initiated.1919CONVST
Convert Start Input. The rising edge of CONVST ends sample and starts a
conversion on the captured sample. The ADC is in acquisition mode when
CONVST is low and CONVST mode = 0.2020SHDN
Shutdown Input. If SHDN is held high, the entire device enters and stays in a
low-current state. Contents of the Configuration register are not lost when in
the shutdown state.
23, 28, 32,
38, 43, 49,
53, 58
23, 28, 32,
38, 43, 49,
53, 58
23, 28, 32,
38, 43, 49,
53, 58
AGNDSSignal Ground. Connect all AGND and AGNDS inputs together.
24, 29, 35,
46, 52, 57
24, 29, 35,
46, 52, 57
24, 29, 35,
46, 52, 57AVDDAnalog Supply Input. Bypass AVDD to AGND with a 0.1µF capacitor at each
AVDD input.
25, 30, 36,
45, 51, 56
25, 30, 36,
45, 51, 56
25, 30, 36,
45, 51, 56AGNDAnalog Ground. Connect all AGND inputs together.
26, 5526, 5526, 55RD C _S E N S E Reference Buffer Sense Feedback. Connect to RDC plane.
27, 33,
40,48, 54
27, 33,
40,48, 54
27, 33,
40,48, 54RDC
Reference Buffer Decoupling. Connect all RDC outputs together. Bypass to
AGND with at least an 80µF total capacitance. See the Layout, Grounding,
and Bypassing section.
31, 34,
47, 5031, 50—I.C.Internally Connected. Connect to AGND.3431CH0Channel 0 Analog Input

Partno	Mfg	Dc	Qty	Available	Descript
MAX11047ECB+ \|MAX11047ECB	MAXIM	N/a	100	avai	4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs
MAX11048ECB+ \|MAX11048ECB	MAXIM	N/a	4	avai	4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs
MAX11048ETN+ \|MAX11048ETN	MAXIM	N/a	20	avai	4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs
MAX11048ETN+ \|MAX11048ETN	MAXIM/DALLAS	N/a	12	avai	4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs
MAX11049ETN+ \|MAX11049ETN	MAXIM/DALLAS	N/a	36	avai	4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs
MAX11049ETN+ \|MAX11049ETN	MAXIM	N/a	28	avai	4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs