MAX1037EKA-T ,2.7-5.5V; low power, 4-/12-channel 2-wire serial 8-bit ADC. For hand-held portable applications, medical instrumnets, battery-powered test equipment, solar-powered remote systems, received-signal-strength indicators, system supervisionFeaturesThe MAX1036–MAX1039 low-power, 8-bit, multichannel, 2 High-Speed I C-Compatible Serial Int ..
MAX1038AEEE+ ,2.7V to 5.5V, Low-Power, 4-/12-Channel 2-Wire Serial 8-Bit ADCsFeaturesThe MAX1036–MAX1039 low-power, 8-bit, multichannel, 2♦ High-Speed I C-Compatible Serial Int ..
MAX1039AEEE ,2.7V to 5.5V / Low-Power / 4-/12-Channel 2-Wire Serial 8-Bit ADCsApplications Small PackagesMedical Instruments8-Pin SOT23 (MAX1036/MAX1037)Battery-Powered Test Eq ..
MAX1039AEEE+ ,2.7V to 5.5V, Low-Power, 4-/12-Channel 2-Wire Serial 8-Bit ADCsELECTRICAL CHARACTERISTICS(V = 2.7V to 3.6V (MAX1037/MAX1039), V = 4.5V to 5.5V (MAX1036/MAX1038). ..
MAX1039AEEE+T ,2.7V to 5.5V, Low-Power, 4-/12-Channel 2-Wire Serial 8-Bit ADCsFeaturesThe MAX1036–MAX1039 low-power, 8-bit, multichannel, 2♦ High-Speed I C-Compatible Serial Int ..
MAX1044CPA ,Switched-Capacitor Voltage ConvertersApplications include generating a -5V supply from aPART TEMP. RANGE PIN-PACKAGE+5V logic supply to ..
MAX3386EIPW ,RS-232 Transceiver With Split Supply Pin for Logic Side 20-TSSOP -40 to 85BLOCK DIAGRAM7 17DIN1 DOUT18 16DIN1 DOUT29 15DIN2 DOUT320PowerdownPWRDOWN11 14ROUT1 RIN15 K10 13ROU ..
MAX3386EIPWR ,RS-232 Transceiver With Split Supply Pin for Logic Side 20-TSSOP -40 to 85maximum ratings” may cause permanent damage to the device. These are stress ratingsonly, and functi ..
MAX3387 ,3V / 15kV ESD-Protected / AutoShutdown Plus RS-232 Transceiver for PDAs and Cell PhonesApplications+3.3VSubnotebook/Palmtop Computers 23 15 24CBYPASSFORCEOFF V VPDAs and PDA Cradles CC L ..
MAX3387E ,3V, ±15kV ESD-Protected, AutoShutdown Plus RS-232 Transceiver for PDAs and Cell PhonesApplications BYPASSFORCEOFF V VCC L1 2Subnotebook/Palmtop Computers C1+V+ C1C330.1μFPDAs and PDA Cr ..
MAX3387ECUG ,3V / 15kV ESD-Protected / AutoShutdown Plus RS-232 Transceiver for PDAs and Cell PhonesFeaturesThe MAX3387E 3V powered EIA/TIA-232 and V.28/V.24♦ V Pin for Compatibility with Mixed-Volta ..
MAX3387ECUG+ ,3V, ±15kV ESD-Protected, AutoShutdown Plus RS-232 Transceiver for PDAs and Cell PhonesApplications BYPASSFORCEOFF V VCC L1 2Subnotebook/Palmtop Computers C1+V+ C1C330.1μFPDAs and PDA Cr ..
MAX1037EKA-T
2.7-5.5V; low power, 4-/12-channel 2-wire serial 8-bit ADC. For hand-held portable applications, medical instrumnets, battery-powered test equipment, solar-powered remote systems, received-signal-strength indicators, system supervision
General DescriptionThe MAX1036–MAX1039 low-power, 8-bit, multichannel,
analog-to-digital converters (ADCs) feature internal
track/hold (T/H), voltage reference, clock, and an
I2C-compatible 2-wire serial interface. These devices
operate from a single supply and require only 350µA at
the maximum sampling rate of 188ksps. Auto-
Shutdown™ powers down the devices between conver-
sions reducing supply current to less than 1µA at low
throughput rates. The MAX1036/MAX1037 have four ana-
log input channels each, while the MAX1038/MAX1039
have twelve analog input channels. The analog inputs are
software configurable for unipolar or bipolar and single-
ended or pseudo-differential operation.
The full-scale analog input range is determined by the
internal reference or by an externally applied reference
voltage ranging from 1V to VDD. The MAX1037/
MAX1039 feature a 2.048V internal reference and the
MAX1036/MAX1038 feature a 4.096V internal reference.
The MAX1036/MAX1037 are available in 8-pin SOT23
packages. The MAX1038/MAX1039 are available in 16-
pin QSOP packages. The MAX1036–MAX1039 are guar-
anteed over the extended industrial temperature range
(-40°C to +85°C). Refer to MAX1136–MAX1139 for 10-bit
devices and to the MAX1236–MAX1239 for 12-bit
devices.
ApplicationsHand-Held Portable Applications
Medical Instruments
Battery-Powered Test Equipment
Solar-Powered Remote Systems
Received-Signal-Strength Indicators
System Supervision
FeaturesHigh-Speed I2C-Compatible Serial Interface
400kHz Fast Mode
1.7MHz High-Speed ModeSingle Supply
2.7V to 3.6V (MAX1037/MAX1039)
4.5V to 5.5V (MAX1036/MAX1038)Internal Reference
2.048V (MAX1037/MAX1039)
4.096V (MAX1036/MAX1038)External Reference: 1V to VDDInternal Clock4-Channel Single-Ended or 2-Channel Pseudo-
Differential (MAX1036/MAX1037)12-Channel Single-Ended or 6-Channel Pseudo-
Differential (MAX1038/MAX1039)Internal FIFO with Channel-Scan ModeLow Power
350µA at 188ksps
110µA at 75ksps
8µA at 10ksps
1µA in Power-Down ModeSoftware Configurable Unipolar/BipolarSmall Packages
8-Pin SOT23 (MAX1036/MAX1037)
16-Pin QSOP (MAX1038/MAX1039)
MAX1036–MAX1039
2.7V to 5.5V, Low-Power, 4-/12-Channel
2-Wire Serial 8-Bit ADCs
Ordering Information19-2442; Rev 1; 10/02
AutoShutdown is a trademark of Maxim Integrated Products, Inc.
Pin Configurations and Typical Operating Circuit appear
at end of data sheet.
MAX1036–MAX1039
2.7V to 5.5V, Low-Power, 4-/12-Channel
2-Wire Serial 8-Bit ADCs
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VDD= 2.7V to 3.6V (MAX1037/MAX1039), VDD= 4.5V to 5.5V (MAX1036/MAX1038). External reference, VREF= 2.048V
(MAX1037/MAX1039), VREF= 4.096V (MAX1036/MAX1038). External clock, fSCL= 1.7MHz, TA= TMINto TMAX, unless otherwise
noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND..............................................................-0.3V to +6V
AIN0–AIN11, REF to
GND......................-0.3V to the lower of (VDD+ 0.3V) and +6V
SDA, SCL to GND.....................................................-0.3V to +6V
Maximum Current Into Any Pin.........................................±50mA
Continuous Power Dissipation (TA= +70°C)
8-Pin SOT23 (derate 7.1mW/°C above +70°C).............567mW
16-Pin QSOP (derate 8.3mW/°C above +70°C).........666.7mW
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
MAX1036–MAX1039
2.7V to 5.5V, Low-Power, 4-/12-Channel
2-Wire Serial 8-Bit ADCs
ELECTRICAL CHARACTERISTICS (continued)(VDD= 2.7V to 3.6V (MAX1037/MAX1039), VDD= 4.5V to 5.5V (MAX1036/MAX1038). External reference, VREF= 2.048V
(MAX1037/MAX1039), VREF= 4.096V (MAX1036/MAX1038). External clock, fSCL= 1.7MHz, TA= TMINto TMAX, unless otherwise
noted. Typical values are at TA= +25°C.)
MAX1036–MAX1039
2.7V to 5.5V, Low-Power, 4-/12-Channel
2-Wire Serial 8-Bit ADCs
ELECTRICAL CHARACTERISTICS (continued)(VDD= 2.7V to 3.6V (MAX1037/MAX1039), VDD= 4.5V to 5.5V (MAX1036/MAX1038). External reference, VREF= 2.048V
(MAX1037/MAX1039), VREF= 4.096V (MAX1036/MAX1038). External clock, fSCL= 1.7MHz, TA= TMINto TMAX, unless otherwise
noted. Typical values are at TA= +25°C.)
MAX1036–MAX1039
2.7V to 5.5V, Low-Power, 4-/12-Channel
2-Wire Serial 8-Bit ADCs
ELECTRICAL CHARACTERISTICS (continued)(VDD= 2.7V to 3.6V (MAX1037/MAX1039), VDD= 4.5V to 5.5V (MAX1036/MAX1038). External reference, VREF= 2.048V
(MAX1037/MAX1039), VREF= 4.096V (MAX1036/MAX1038). External clock, fSCL= 1.7MHz, TA= TMINto TMAX, unless otherwise
noted. Typical values are at TA= +25°C.)
Note 1:The MAX1036/MAX1038 are tested at VDD= 5V and the MAX1037/MAX1039 are tested at VDD= 3V. All devices are config-
ured for unipolar, single-ended inputs.
Note 2:Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range and
offsets have been calibrated.
Note 3:Offset nulled.
Note 4:Ground ON channel; sine wave applied to all OFF channels.
Note 5:Conversion time is defined as the number of clock cycles (8) multiplied by the clock period. Conversion time does not
include acquisition time. SCL is the conversion clock in the external clock mode.
Note 6:The absolute voltage range for the analog inputs (AIN0–AIN11) is from GND to VDD.
Note 7:When AIN_/REF is configured to be an internal reference (SEL[2:1] = 11), decouple AIN_/REF to GND with a 0.01µF capacitor.
Note 8:The switch connecting the reference buffer to AIN_/REF has a typical on-resistance of 675Ω.
Note 9:ADC performance is limited by the converter’s noise floor, typically 1.4mVP-P.
Note 10:Electrical characteristics are guaranteed from VDD(min)to VDD(max). For operation beyond this range, see the Typical
Operating Characteristics.
Note 11:Power-supply rejection ratio is measured as:
, for the MAX1037/MAX1039 where N is the number of bits (8) and VREF= 2.048V.
Power-supply rejection ratio is measured as:
, for the MAX1036/MAX1038 where N is the number of bits (8) and VREF= 2.048V.
Note 12:A master device must provide a data hold time for SDA (referred to VILof SCL) in order to bridge the undefined region of
SCL’s falling edge (Figure 1).
Note 13:CB= total capacitance of one bus line in pF. tRand tFmeasured between 0.3VDDand 0.7VDD. Minimum specification is
tested at +25°C with CB= 400pF.
Note 14:fSCLHmust meet the minimum clock low time plus the rise/fall times.
MAX1036–MAX1039
2.7V to 5.5V, Low-Power, 4-/12-Channel
2-Wire Serial 8-Bit ADCs
Typical Operating Characteristics(VDD= 3.3V (MAX1037/MAX1039), VDD= 5V (MAX1036/MAX1038), fSCL= 1.7MHz, external clock (33% duty cycle), fSAMPLE= 188ksps,
single ended, unipolar, TA= +25°C, unless otherwise noted.)
MAX1036–MAX1039
2.7V to 5.5V, Low-Power, 4-/12-Channel
2-Wire Serial 8-Bit ADCs
Typical Operating Characteristics (continued)(VDD= 3.3V (MAX1037/MAX1039), VDD= 5V (MAX1036/MAX1038), fSCL= 1.7MHz, external clock (33% duty cycle), fSAMPLE= 188ksps,
single ended, unipolar, TA= +25°C, unless otherwise noted.)
MAX1036–MAX1039
Detailed DescriptionThe MAX1036–MAX1039 ADCs use successive-
approximation conversion techniques and input T/H cir-
cuitry to capture and convert an analog signal to a
serial 8-bit digital output. The MAX1036/MAX1037 are
4-channel ADCs, and the MAX1038/MAX1039 are 12-
channel ADCs. These devices feature a high-speed 2-
wire serial interface supporting data rates up to
1.7MHz. Figure 3 shows the simplified functional dia-
gram for the MAX1038/MAX1039.
Power SupplyThe MAX1036–MAX1039 operate from a single supply
and consume 350µA at sampling rates up to 188ksps.
The MAX1037/MAX1039 feature a 2.048V internal
reference and the MAX1036/MAX1038 feature a 4.096V
internal reference. All devices can be configured for
use with an external reference from 1V to VDD.
Analog Input and Track/HoldThe MAX1036–MAX1039 analog input architecture con-
tains an analog input multiplexer (MUX), a T/H capaci-
tor, T/H switches, a comparator, and a switched
capacitor digital-to-analog converter (DAC) (Figure 4).
In single-ended mode, the analog input multiplexer con-
nects CT/Hto the analog input selected by CS[3:0] (see
the Configuration/Setup Bytes (Write Cycle) section). The
charge on CT/His referenced to GND when converted. In
pseudo-differential mode, the analog input multiplexer
connects CT/H to the ‘+’analog input selected by
CS[3:0]. The charge on CT/His referenced to the ‘-’ ana-
log input when converted.
The MAX1036–MAX1039 input configuration is pseudo-
differential in that only the signal at the ‘+’ analog input
is sampled with the T/H circuitry. The ‘-’ analog input
signal must remain stable within ±0.5LSB (±0.1LSB for
best results) with respect to GND during a conversion.
To accomplish this, connect a 0.1µF capacitor from ‘-’
analog input to GND. See the Single-Ended/Pseudo-
Differential Inputsection.
During the acquisition interval, the T/H switches are in
the track position and CT/Hcharges to the analog input
signal. At the end of the acquisition interval, the T/H
switches move to the hold position retaining the charge
on CT/Has a sample of the input signal.
During the conversion interval, the switched capacitive
DAC adjusts to restore the comparator input voltage to
zero within the limits of 8-bit resolution. This action
requires eight conversion clock cycles and is equiva-
lent to transferring a charge of 18pF ✕(VIN+ - VIN-)
from CT/Hto the binary weighted capacitive DAC form-
ing a digital representation of the analog input signal.
Sufficiently low source impedance is required to ensure
an accurate sample. A source impedance below 1.5kΩ
does not significantly degrade sampling accuracy. To
minimize sampling errors with higher source imped-
ances, connect a 100pF capacitor from the analog
input to GND. This input capacitor forms an RC filter
with the source impedance limiting the analog input
bandwidth. For larger source impedances, use a buffer
amplifier to maintain analog input signal integrity.
When operating in internal clock mode, the T/H circuitry
enters its tracking mode on the ninth falling clock edge
2.7V to 5.5V, Low-Power, 4-/12-Channel
2-Wire Serial 8-Bit ADCs
of the address byte (see the Slave Address section).
The T/H circuitry enters hold mode two internal clock
cycles later. A conversion or series of conversions are
then internally clocked (eight clock cycles per conver-
sion) and the MAX1036–MAX1039 hold SCL low. When
operating in external clock mode, the T/H circuitry
enters track mode on the seventh falling edge of a valid
slave address byte. Hold mode is then entered on the
falling edge of the eighth clock cycle. The conversion is
performed during the next eight clock cycles.
The time required for the T/H circuitry to acquire an
input signal is a function of input capacitance. If the
analog input source impedance is high, the acquisition
time lengthens and more time must be allowed
between conversions. The acquisition time (tACQ) is the
minimum time needed for the signal to be acquired. It
is calculated by:
tACQ≥6.25 ✕(RSOURCE+ RIN) ✕CIN
where RSOURCEis the analog input source impedance,
RIN= 2.5kΩ, and CIN= 18pF. tACQis 1/fSCLfor external
clock mode. For internal clock mode, the acquisition
time is two internal clock cycles. To select RSOURCE,
allow 625ns for tACQ in internal clock mode to account
for clock frequency variations.
MAX1036–MAX1039
2.7V to 5.5V, Low-Power, 4-/12-Channel
2-Wire Serial 8-Bit ADCsFigure 1. I2C Serial Interface Timing
MAX1036–MAX1039
Analog Input BandwidthThe MAX1036–MAX1039 feature input tracking circuitry
with a 2MHz small signal-bandwidth. The 2MHz input
bandwidth makes it possible to digitize high-speed
transient events and measure periodic signals with
bandwidths exceeding the ADC’s sampling rate by
using undersampling techniques. To avoid high fre-
quency signals being aliased into the frequency band
of interest, anti-alias filtering is recommended.
Analog Input Range and ProtectionInternal protection diodes clamp the analog input to
VDDand GND. These diodes allow the analog inputs to
swing from (GND - 0.3V) to (VDD+ 0.3V) without caus-
ing damage to the device. For accurate conversions,
the inputs must not go more than 50mV below GND or
above VDD. If the analog input exceeds VDDby more
than 50mV, the input current should be limited to 2mA.
2.7V to 5.5V, Low-Power, 4-/12-Channel
2-Wire Serial 8-Bit ADCsFigure 3. MAX1038/MAX1039 Simplified Functional Diagram
Figure 4. Equivalent Input Circuit
Single-Ended/Pseudo-Differential InputThe SGL/DIFbit of the configuration byte configures the
MAX1036–MAX1039 analog input circuitry for single-
ended or pseudo-differential inputs (Table 2). In single-
ended mode (SGL/DIF= 1), the digital conversion results
are the difference between the analog input selected by
CS[3:0] and GND (Table 3). In pseudo-differential mode
(SGL/DIF= 0), the digital conversion results are the differ-
ence between the ‘+’ and the ‘-’ analog inputs selected
by CS[3:0] (Table 4). The ‘-’ analog input signal must
remain stable within ±0.5LSB (±0.1LSB for best results)
with respect to GND during a conversion.
Unipolar/BipolarWhen operating in pseudo-differential mode, the BIP/
UNIbit of the setup byte (Table 1) selects unipolar or
bipolar operation.Unipolar mode sets the differential
analog input range from zero to VREF. A negative differ-
ential analog input in unipolar mode causes the digital
output code to be zero. Selecting bipolar mode sets the
differential input range to ±VREF/2, with respect to the
negative input. The digital output code is binary in
unipolar mode and two’s complement binary in bipolar
mode (see the Transfer Functions section).
In single-ended mode, the MAX1036–MAX1039 always
operate in unipolar mode regardless of the BIP/UNI
setting, and the analog inputs are internally referenced
to GND with a full-scale input range from zero to VREF.
Digital InterfaceThe MAX1036–MAX1039 feature a 2-wire interface con-
sisting of a serial data line (SDA) and a serial clock line
(SCL). SDA and SCL facilitate bidirectional communica-
tion between the MAX1036–MAX1039 and the master
at rates up to 1.7MHz. The MAX1036–MAX1039 are
slaves that transmit and receive data. The master (typi-
cally a microcontroller) initiates data transfer on the bus
and generates SCL to permit that transfer.
SDA and SCL must be pulled high. This is typically
done with pullup resistors (500Ωor greater) (see
Typical Operating Circuit). Series resistors (RS) are
optional. They protect the input architecture of the
MAX1036–MAX1039 from high-voltage spikes on the
bus lines and minimize crosstalk and undershoot of the
bus signals.
Bit TransferOne data bit is transferred during each SCL clock
cycle. Nine clock cycles are required to transfer the
data in or out of the MAX1036–MAX1039. The data on
SDA must remain stable during the high period of the
SCL clock pulse. Changes in SDA while SCL is high are
control signals (see the START and STOP Conditions
section). Both SDA and SCL idle high when the bus is
not busy.
START and STOP ConditionsThe master initiates a transmission with a START condi-
tion (S), a high-to-low transition on SDA with SCL high.
The master terminates a transmission with a STOP
condition (P), a low-to-high transition on SDA, while
MAX1036–MAX1039
2.7V to 5.5V, Low-Power, 4-/12-Channel
2-Wire Serial 8-Bit ADCs
Table 1. Setup Byte Format
