MAX1011CEG ,Low-Power / 90Msps / 6-Bit ADCApplications Ordering InformationIF Sampling ReceiversPART TEMP. RANGE PIN-PACKAGEVSAT ReceiversMAX ..
MAX1020BETX+ ,10-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO PortsFeaturesThe MAX1020/MAX1022/MAX1057/MAX1058 integrate a ♦ 10-Bit, 225ksps ADCAnalog Multiplexer wit ..
MAX1022BETX ,10-Bit / Multichannel ADCs/DACs with FIFO / Temperature Sensing / and GPIO PortsApplicationsControls for Optical ComponentsSPI and QSPI are trademarks of Motorola, Inc.Base-Statio ..
MAX1022BETX+ ,10-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO PortsMAX1020/MAX1022/MAX1057/MAX105819-3280; Rev 5; 2/1210-Bit, Multichannel ADCs/DACs with FIFO,Tempera ..
MAX1026BCEE , 10-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference
MAX1027BCEE+ ,10-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal ReferenceApplications Interface♦ Space-Saving 28-Pin 5mm x 5mm TQFN PackageSystem SupervisionData-Acquisitio ..
MAX337EWI+ ,16-Channel Dual 8 Channel, Low Leakage, CMOS Analog MultiplexersGeneral Description Beneits and
MAX3380E ,+2.35V to +5.5V, 1µA, 2Tx/2Rx RS-232 Transceivers with ±15kV ESD-Protected I/O and Logic PinsFeaturesThe MAX3380E/MAX3381E are +2.35V to +5.5V-pow-♦ ±15kV ESD Protection on All CMOS and RS-232 ..
MAX3380ECUP+ ,+2.35V to +5.5V, 1µA, 2Tx/2Rx RS-232 Transceivers with ±15kV ESD-Protected I/O and Logic PinsMAX3380E/MAX3381E19-2128; Rev 0; 8/01+2.35V to +5.5V, 1µA, 2Tx/2Rx RS-232 Transceiverswith ±15kV ES ..
MAX3380ECUP+T ,+2.35V to +5.5V, 1µA, 2Tx/2Rx RS-232 Transceivers with ±15kV ESD-Protected I/O and Logic PinsELECTRICAL CHARACTERISTICS(V = +2.35V to +5.5V, V = +1.65V to +5.5V. When V < +4.5V, C1 = C2 = C3 = ..
MAX3381ECUP+ ,+2.35V to +5.5V, 1µA, 2Tx/2Rx RS-232 Transceivers with ±15kV ESD-Protected I/O and Logic Pinsapplications where noise and EMI are issues. TheC1+MAX3380E/MAX3381E have a unique V pin thatL C1V+ ..
MAX3381ECUP+ ,+2.35V to +5.5V, 1µA, 2Tx/2Rx RS-232 Transceivers with ±15kV ESD-Protected I/O and Logic PinsFeaturesThe MAX3380E/MAX3381E are +2.35V to +5.5V-pow-♦ ±15kV ESD Protection on All CMOS and RS-232 ..
MAX1011CEG
Low-Power / 90Msps / 6-Bit ADC
General DescriptionThe MAX1011 is a 6-bit analog-to-digital converter
(ADC) that combines high-speed, low-power operation
with a user-selectable input range, an internal refer-
ence, and a clock oscillator. The ADC converts analog
signals into binary-coded digital outputs at sampling
rates up to 90Msps. The ability to directly interface with
baseband signals makes the MAX1011 ideal for use in
a wide range of communications and instrumentation
applications.
The MAX1011’s input amplifier features a true differential
input, a -0.5dB analog bandwidth of 55MHz, and a user-
programmable input full-scale range of 125mVp-p,
250mVp-p, or 500mVp-p. With an AC-coupled signal,
input offset is typically less than 1/4LSB. Dynamic per-
formance is 5.85 effective number of bits (ENOB) with a
20MHz analog input signal, or 5.7 ENOB with a 50MHz
signal.
The MAX1011 operates with +5V analog and +3.3V digi-
tal supplies for easy interfacing to +3.3V-logic-compatible
digital signal processors and microprocessors. It comes
in a 24-pin QSOP package.
ApplicationsIF Sampling Receivers
VSAT Receivers
Wide Local Area Networks (WLANs)
Instrumentation
FeaturesHigh Sampling Rate: 90MspsLow Power Dissipation: 215mWExcellent Dynamic Performance:
5.85 ENOB with 20MHz Analog Input
5.7 ENOB with 50MHz Analog Input±1/4LSB INL and DNL (typ)±1/4LSB Input Offset (typ)Internal Bandgap Voltage ReferenceInternal Oscillator with Overdrive Capability55MHz (-0.5dB) Bandwidth Input Amplifier with
True Differential InputUser-Selectable Full-Scale Range
(125mVp-p, 250mVp-p, or 500mVp-p)Single-Ended or Differential Input DriveFlexible, 3.3V, CMOS-Compatible Digital Outputs
MAX1011
Low-Power, 90Msps, 6-Bit ADC
Functional Diagram
Pin Configuration appears at end of data sheet.
Ordering Information
MAX1011
Low-Power, 90Msps, 6-Bit ADC
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS(VCC= +5V ±5%, VCCO= 3.3V ±300mV, TA
= TMINto TMAX, unless otherwise noted.)Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND ..........................................................-0.3V to +6.5V
VCCOto OGND......................................................-0.3V to +6.5V
GND to OGND ......................................................-0.3V to +0.3V
Digital and Clock Output Pins to OGND...-0.3V to VCCO(10sec)
All Other Pins to GND...............................................-0.3V to VCC
Continuous Power Dissipation (TA= +70°C)
24-Pin QSOP (derate 10mW/°C above +70°C)...........800mW
Operating Temperature Range...............................0°C to +70°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, <10sec)...........................+300°C
MAX1011
Low-Power, 90Msps, 6-Bit ADC
AC ELECTRICAL CHARACTERISTICS(VCC= +5V ±5%, VCCO= 3.3V ±300mV, TA
= +25°C, unless otherwise noted.)
Note 1:Best-fit straight-line linearity method.
Note 2:A typical application will AC couple the analog input to the DC bias level present at the analog inputs (typically 2.35V).
However, it is also possible to DC couple the analog input (using differential or single-ended drive) within this common-
mode input range (Figures 4 and 5).
Note 3:PSRR is defined as the change in the mid-gain, full-scale range as a function of the variation in VCCsupply voltage,
expressed in decibels.
Note 4:The current in the VCCOsupply is a strong function of the capacitive loading on the digital outputs. To minimize supply tran-
sients and achieve optimal dynamic performance, reduce the capacitive-loading effects by keeping line lengths on the dig-
ital outputs to a minimum.
Note 5:Offset-correction compensation enabled, 0.22µF at compensation inputs (Figures 2 and 3).
Note 6:tPDand tSKEWare measured from the 1.4V level of the output clock, to the 1.4V level of either the rising or falling edge of a
data bit. tDCLKis measured from the 50% level of the clock-overdrive signal on TNK+ to the 1.4V level of DCLK. The capac-
itive load on the outputs is 15pF.
MAX1011
Low-Power, 90Msps, 6-Bit ADC
__________________________________________Typical Operating Characteristics(VCC= +5V ±5%, VCCO= 3.3V ±300mV, fCLK= 90Msps, GAIN = open (midgain) MAX1011 evaluation kit, TA= +25°C, unless
otherwise noted.)
_______________Detailed Description
Converter OperationThe MAX1011 integrates a 6-bit analog-to-digital con-
verter (ADC), a buffered voltage reference, and oscilla-
tor circuitry. The ADC uses a flash conversion technique
to convert an analog input signal into a 6-bit parallel
digital output code. The MAX1011’s unique design
includes 63 fully differential comparators and a propri-
etary encoding scheme that ensures no more than
1LSB dynamic encoding error. The control logic inter-
faces easily to most digital signal processors (DSPs)
and microprocessors (µPs) with +3.3V CMOS-compati-
ble logic interfaces. Figure 1 shows the MAX1011 in a
typical application.
Programmable Input AmplifierThe MAX1011 has a programmable-gain input amplifier
with a -0.5dB bandwidth of 55MHz and a true differen-
tial input. To maximize performance in high-speed
systems, the amplifier has less than 3pF of input
capacitance. The input amplifier gain is programmed
via the GAIN pin to provide three possible input full-
scale ranges (FSRs) as shown in Table 1.
Single-ended and differential AC-coupled input circuit
examples are shown in Figures 2 and 3. Each of the
MAX1011
Low-Power, 90Msps, 6-Bit ADC
Pin Description
MAX1011amplifier inputs is internally biased to a 2.35V reference
through a 20kΩresistor, eliminating external DC bias
circuits. A series 0.1µF capacitor is required at the
amplifier input for AC-coupled signals.
When operating with AC-coupled inputs, the input
amplifier’s DC offset voltage is nulled to within ±1/2LSB
by an on-chip, offset-correction amplifier. An external
compensation capacitor is required to set the dominant
pole of the offset-correction amplifier’s frequency
response (Figures 2 and 3). The compensation capaci-
tor will determine the low-frequency corner of the ana-
log input response according to the following formula:= 1 / (0.1 x C)
where C is the value of the compensation capacitor in
µF, and fcis the corner frequency in Hz.
Low-Power, 90Msps, 6-Bit ADCFigure 1. IFSampling Receiver
Figure 2. Single-Ended AC-Coupled Input
