MAT04F ,Matched Monolithic Quad TransistorCHARACTERISTICS at TA = 25°C unless otherwise noted. Each transiétor is individually tested. For ma ..
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MAX3320TCAP+T ,3V to 5.5V, Up to 250kbps True RS-232 Transceiver with 4µA AutoShutdown Plus and Power On ResetApplications ______________Ordering InformationPalmtop ComputersPART* TEMP. RANGE PIN-PACKAGEPortab ..
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MAX3322EEUP ,±15kV ESD-Protected, RS-232 Transceivers for Multidrop ApplicationsFeaturesThe MAX3322E/MAX3323E 3.0V to 5.5V powered Pin-Selectable 5kΩ /High-Impedance Receivers EI ..
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MAT04F
Matched Monolithic Quad Transistor
ANALOG
DEVICES
Matched Monolithic
Quad Transistor
#lh'r-il4
FEATURES
. Low Offset Voltage .......................................... 200pV Max
. High Current Gain m................................................ 400 Min
0 Excellent Current Gain Match ........................ 2% Max
. Low Noise Voltage at 100Hz, 1mA .. ..... 2.5nV/ Hz Max
0 Excellent Log Conformance ................... rBE = 0.69 Max
. Matching Guaranteed for All Transistors
q Available in Die Form
ORDERING INFORMATION'
PACKAGE
T, = +25°c OPERATING
vas MAX CERDIP PLASTIC TEMPERATURE
(w) 14-PIN 14-PIN RANGE
200 MAT04AY' - MIL
200 MAT04EY - IND
400 MAT04BY* - MIL
400 MAT04FY MAT04FP XIND
400 _ MAT04FStt XIND
* Fordevices processed in total compliance to MIL-STD-MO, add /883 after part
number. Consult factory for 883 data sheet.
t Burn-in is available on commercial and industrial temperature range parts in
CerDlP. plastic DIP, and TO-can packages.
tt For availability and burn-in information on so and PLCC packages, contact
your local sales office.
GENERAL DESCRIPTION
The MAT-04 is a quad monolithic NPN transistor that offers
excellent parametric matching for precision amplifier and non-
linear circuit applications. Performance characteristics of tho
MAT-04 include high gain (400 minimum) over a wide range of
collectorcurrent, low noise (2.5nV/mz maximum at 100Hz,
lc =1 mA) and excellent logarithmic conformance. The MAT-04
also features a low offset voltage of 200pV and tight current gain
matching, to within 2%. Each transistor of the MAT-04 is
individually tested to data sheet specifications. For matching
parameters (offset voltage, input offset current, and gain match),
each of the dual transistor combinations are verified to meet
stated limits. Device performance is guaranteed at 25°C and over
the industrial and military temperature ranges.
The Iong-term stability ofmatching parameters is guaranteed by
the protection diodes across the base-emitter junction of each
transistor. These diodes prevent degradation of beta and
matching characteristics due to reverse bias base-emitter
current.
The superior logarithmic conformance and accurate matching
characteristics of the MAT-04 makes it an excellent choice for
use in log and antilog circuits. The MAT-04 is an ideal choice in
applications where low noise and high gain are required.
PIN CONNECTIONS
14-PIN CERDIP
(Y-Suffix)
14-PIN PLASTIC DIP
(P-Suffix)
14-PIN so
(S-Suffix)
ABSOLUTE MAXIMUM RATINGS (Note 1)
Collector-Base Voltage (BVCBO) ........................................ 40V
Collector-Emitter Voltage (BVCEO) _.................................... 40V
Collector-Collector Voltage (BVCC) .q.....................b..r..qB...eq 40V
Emitter-Emitter Voltage (Buss) _......................................... 40V
Collector Current ..P....Fq.................................................... 30mA
Emitter Current w................................................................ 30mA
Substrate (Pin-4 to Pin-11) Current ................................. 30mA
Operating Temperature Range
MAT-MAY, BY ........ ....-55oC TO +125°C
MAT-04EY ............... ...,-25cC TO +85°C
MAT-04FY,FP,FS .......................................... -40oC to +85°C
Storage Temperature
Y Package ................................................... -65cC to +150°C
P Package .................................................... -65% to +125°C
Lead Temperature (Soldering, 60 sec) ........................ +300°C
PACKAGE TYPE l, (Note 2) e“: UNITS
14-Pin CERDIP (Y) 108 16 'C/W
14-Pin Plastic DIP (P) 83 39 "C/W
14-Pin so (S) 120 36 "CW
NOTES:
l. Absolute maxtmum ratings apply to both DICE and packaged parts. unless
otherwise noted,
2. S.Aisspecifiedtorworstcasemountingconditions,i.e.,eAisspecifiedforoevice
in socket forCerDIP and P-DIP packages; e), is specified tor device solderec
to printed circuit board for so package.
ELECTRICAL CHARACTERISTICS at TA = 25°C unless otherwise noted. Each transiétor is individually tested. For matching
parameters (Vos, los, AhFE) each dual transistor combination is verified to meet stated limits. All tests made at endpoints unless other-
wise noted.
MAT-O4A/ E MAT-04B/ F
PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
IOWA s k; s 1mA
Current Gain hrs 0V s va, 5 30V 400 800 - 300 600 -
(Note "
. IC = 1000A
CurrentGain Ah ov 5 v 5 30V - 0.5 2 - 1 4 %
Match FE CB
(Note2)
IOWA 5 k, 5 1mA
Offset Voltage Vos 0V s; VCB s; 30V - 50 200 - 100 400 wi/
(Note4)
Offset Voltage IOWA 5 Ito 5 tmA
Change vs AVos/A'c va, = OV - 5 25 - 10 50 wV
Collector Current (Note 4)
IOWA 5 k; s ltttA
Offset Voltage AVos/AVCE OV 3 Vcrs s 30V 50 100 - 100 200 Isl/
Change vs V65 (Note 4)
IOWA 5 k: 5 1 mA
Bulk EmitterFlesistance rBE va, = tht - 0.4 o 6 - 0.4 0 6 n
(Note 5)
I - 1 A
Input Bias Current '3 0! "C 30", 30V 125 250 - 165 330 nA
_ ca =
I - 100 A
InputOffssrt Current los 6 - 'it - 0.6 5 - 2 13 nA
Breakdown Voltage BVCEO Ic = 100A 40 - - 40 - - V
Collector Saturation IE, = 1000A
Voltage VCEISAT) lc = 1mA - 0.03 0.06 - 0.03 0 06 V
Collector-Base
= - - - - A
Leakage Current ICED VCB 40V 5 5 p
. Vas = OV to = 10Hz - 2 3 - 2 4
Noéjzghage an IC = 1mA to = 100Hz - 1.3 2.5 - 1.8 3 nv/OTE
y (Note 3) f0 =1kHz - 1.8 2.5 - 1.8 3
Gain Bandwidth Ic - 1mA
- - - - MH
Product tr VCE = 10V 300 300 z
= V I =
Output Capacitance Coao V231 ME; E o - 10 - - 10 - pF
V = V I = 0
Input Capacitance CEBU Irc) c - 40 - - 40 - PF
NOTES:
I. Current galn measured at k: = IOWA, 1000A and 1mA.
. . . 100 (AIB)(hFE min)
2. Currsntgain match Is defined as: AhFE T |—
3. Sample tested.
4. Measured at k: = IOWA and guaranteed by design over the specified range
5. Guaranteed by design.
ELECTRICAL CHARACTERISTICS at -25oC s: T, 5 +85°C for MAT-04E, -4ty'C s; T, s: +85°C for MAT-O4F, unless otherwise
noted. Each transistor is individually tested. For matching parameters (V05, IOS) each dual transistor combination is verified to meet
stated limits. All tests made at endpoims unless otherwise noted.
MAT-04E MAT-04F
PARAMETER SYMBOL CONDITIONS _ MIN TYP MAX MIN TYP MAX UNITS
IOWA rs, k; s 1mA
Current Gain hFE 0V s Vcrs s; 30V 225 625 - 200 500 -
(Note 1)
IOWA s '0 = 1mA
Offset Voltage Vos 0V s VCB 5 30V - 60 260 - 120 520 wV
(Note 3)
Ic = 100WA _
32:;ageeoonffftsel TCVos va, = OV - 0.2 1 - 0.4 2 “WC
g (Note 2)
. I = 100p.A
l B C - -
nput as Current IB 0V 5 VCB S 30V 160 445 200 too nA
Input Offset Current los k; = 100wA - 4 20 - 8 40 nA
V03 = 0V
Average Offset k; = 100WA
- - - - /°
Current Drift TCIOS VCB = 0V 50 100 pA C
Breakdown Pltage BVCEO 'c = IOWA 40 - - 4O - - V
Collector-Base
= - . - - . - A
Leakage Current ICBO VCB 40V o 5 O 5 n
Collector-Emitter
LeakageCurrent ICES T VCE _ 40V - 5 - - 5 - nA
Collector-Substrate
'cs Vcs = 40V - 0.7 - - 0.7 - nA
Leakage Current
ELECTRICAL CHARACTERISTICS at -55''C 5 TA 5 125°C unless otherwise noted. Each transistor is individually tested. For
matching parameters Nos, los) each dual transistor combination is verified to meet stated limits. All tests made at endpoints unless
otherwise noted.
MAT-tMA MAT-04B
PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
IOWA 5 lc s 1 mA
CurrentGaln hFE 0V 5 VCB s 30V 175 475 - 125 425 -
(Note 1)
IOWA s IC s. 1mA
Offset Voltage Vos 0V 5 Vas 5 30V - 70 300 - 140 600 p.V
(Note 3)
k; = 100p.A
'tgi', 33:: TCVos Va, = ov - 0.2 1 - 0.4 2 p.V/°C
9 (Note 2)
. Ic = 100p.A
Input Bias Current IB 0V S VCB S 30V - 210 570 - 235 800 nA
Input OffsetCurrent tos '0 = 1OOHA - 6 30 - 12 60 nA
VCB = 0V
Average Offset lc = 100WA JO
Current Drift TCIOS va, = 0V 50 100 pA; C
Breakdown Voltage BVceo IO T IOWA 40 - - 40 - - V
Collector-Base
I = - - - - A
Leakage Current CBO va, 40V 5 5 n
Collector-thitter
= 4 v - 1 - - - A
Leakage Current ICES VCE o 00 100 n
Collector-Substrate
= - 7 - - -
Leakage Current lcs Vcs 40V 7 nA
NOTES:
I. Currentgain measured atlc = 10M, 10mm and 1mA. 3. Measured at 'c = 10p.A and guaranteed by design over the specified range
2. Guaranteed by Vos test (TCVos S Vos/T for Vos << VBE) T = 298°K for of lc.
TA = 25°C.
DICE CHARACTERISTICS
O‘COLLECTOR
Q1BASE
OIEMWTER
SUBSTRATE
QZEMHTER
QZBASE
QZCOLLECTOR
QSCOLLECTOR
GaSASE
IO. a3EMITTER
ll. SUBSTRATE
12. Q4EMITTER
7 , 8 9 w 13. O‘BASE
14. Q4COLLECTOR
PNPY'PPP.‘
DIE SIZE 0.060 x 0.060 inch, 3600 sq. mils
(1.52 x 1.52 mm, 2.31 sq. mm)
WAFER TEST LIMITS at TA = +25°C unless otherwise noted. Each transistor is individually tested. For matching parameters (V
IOS, Ahrs) each dual transistor combination is verified to meet stated limits. All tests made at endpoints unless otherwise noted.
MATAMN
PARAMETER SYMBOL CONDITIONS LIMITS UNITS
_ I = 1000A
Current Gain hFE 0V C V03 s 30V 300 MIN
CurrantGain Match Ah,, IC = 100pA, VCB = 0V 4 % MAX
10rsA s l0 s 1mA
Offset Voltage Vos 0V f V08 s; 30V 400 pV MAX
(Note 1)
Offset Voltage 1011A 3 ls 5 1mA
Change vs AVDs/AIC Vcs - ov 50 11V MAX
Collector Current (Note 1)
10pA sl LC 1mA
Offset Voltage C
Change us VCB AVOS Ava, 0V - Va, - 30V 200 111V MAX
(Note 1)
10PA 5 IC s 1mA
Bulk Emitter Resistance rBE VCR = 0V 0.6 Cl MAX
(Note 2)
Collector Saturation I = 100pA
Voltage VCHSAT’ IC = 1mA 0.06 V MAX
I - 100PA
I C MAX
nput Bias Current Is, 0V 5 Vca s 30V 330 nA
Input Offset Current I '0 = 100pA 13 nA MAX
os Vce = 0V
Breakdown Voltage BVCEO IC = 100A 40 V MIN
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for
standard product dice. Consult factory to negotiate spec1fications based on dice lot qualifications through sample lot assembly and testing.
IWiT-M
TYPICAL PERFORMANCE CHARACTERISTICS
CURRENT GAIN CURRENT GAIN GAIN BANDWIDTH vs
vs COLLECTOR CURRENT vs TEMPERATURE COLLECTOR CURRENT
1200 2000 A 1000 _
+125°c 'd
1100 . 1800 a
Van = 30V F-
1000 ' 1600 l g 100
12 900 Vcts = 0v s'i'" 1400 g
g 2" E
a 800 a 1200 e
o 2 t m
E 700 E 1000 5
E n: m
' 600 g m E
500 600 t l
400 -55'C 400 I
300 200 t 0.1
1.1 low 1000 1m 10m -75 -25 25 75 125 175 tw 10,1 1000 1m 10m 100m 1
COLLECTOR CURRENT (A) TEMPERATURE CC) COLLECTOR CURRENT (A)
SMALL SIGNAL INPUT SMALL SIGNAL OUTPUT
BASE-EMITTER-ON-VOLTAGE RESISTANCE (hie) vs CONDUCTANCE vs
vs COLLECTOR CURRENT COLLECTOR CURRENT COLLECTOR CURRENT
0.65 _ 10M
'rg fi
0.60 'd ,
A t, 8
g 0.55 Ill 1M a
I 0.50 t g
m 0.45 a 100k ti.
0.40 , L
0.35 10k
1.1 1011 100.1 1m 10m 1.. 100 100» Im " low 1000 1m
COLLECTOR CURRENT (A) COLLECTOR CURRENT tN COLLECTOR CURRENT (A)
SATURATION VOLTAGE VS NOISE VOLTAGE DENSITY NOISE VOLTAGE DENSITY
COLLECTOR CURRENT " FREQUENCY VS COLLECTOR CURRENT
a2 _ ,
cu > 100 s
o s. E
F; l t t
0 tn a
L1 1a tad
o o 10 o
F tu 111
- LI LI
t 100m Ct o
It > '
D In 1 m
t 9 gt
10m 0.1
10.. 10011 1m 10m 100m 1 10 100 " 10k 100k ll am 6m 9m 12m
COLLECTOR CURRENT (A) FREQUENCY (Hz) COLLECTOR CURRENT (A)
