MAT03EH ,Low Noise, Matched Dual PNP TransistorCHARACTERISTICS1ABSOLUTE MAXIMUM RATINGS1. COLLECTOR (1 ) Collector-Base Voltage (BV ) . . . . . . ..
MAT03FH ,Low Noise, Matched Dual PNP TransistorCHARACTERISTICS A MAT03E MAT03FParameter Symbol Conditions Min Typ Max Min Typ Max UnitsCurrent Gai ..
MAT04 ,Matched Monolithic Quad TransistorCHARACTERISTICS (@ T = 25C unless otherwise noted. Each transistor is individually tested. For mat ..
MAT04EY ,Matched Monolithic Quad Transistorapplications where low noise and high gain are required.matching parameters (offset voltage, input ..
MAT04F ,Matched Monolithic Quad TransistorCHARACTERISTICS at TA = 25°C unless otherwise noted. Each transiétor is individually tested. For ma ..
MAT04FS ,Matched Monolithic Quad TransistorFEATURES PIN CONNECTIONSLow Offset Voltage: 200 V max14-Lead Cerdip (Y Suffix)High Current Gain: 4 ..
MAX3320ACAP ,4.25 V, up to 250kbp, true RS-232 transceiver with 4mA autoshutdown plus and power-on resetELECTRICAL CHARACTERISTICS(V = 3V to 5.5V, C1–C4 = 0.1µF (tested at 3.3V ±10%), C1 = 0.047µF, C2–C4 ..
MAX3320BCAP ,2.85 V, up to 250kbp, true RS-232 transceiver with 4mA autoshutdown plus and power-on resetMAX3320A/B/L/T19-1253; Rev 0; 8/973V to 5.5V, up to 250kbps True RS-232 Transceiverwith 4µA AutoShu ..
MAX3320BEAP ,2.85 V, up to 250kbp, true RS-232 transceiver with 4mA autoshutdown plus and power-on resetFeaturesThe MAX3320 combines a microprocessor (µP) super-' Precise Monitoring of 5V and 3.3V Power- ..
MAX3320TCAP ,3.08 V, up to 250kbp, true RS-232 transceiver with 4mA autoshutdown plus and power-on resetGeneral Description ________
MAX3320TCAP+T ,3V to 5.5V, Up to 250kbps True RS-232 Transceiver with 4µA AutoShutdown Plus and Power On ResetApplications ______________Ordering InformationPalmtop ComputersPART* TEMP. RANGE PIN-PACKAGEPortab ..
MAX3320TEAP ,3.08 V, up to 250kbp, true RS-232 transceiver with 4mA autoshutdown plus and power-on resetApplications ______________Ordering InformationPalmtop ComputersPART* TEMP. RANGE PIN-PACKAGEPortab ..
MAT03EH-MAT03FH
Low Noise, Matched Dual PNP Transistor
REV.B
Low Noise, Matched
Dual PNP Transistor
FEATURES
Dual Matched PNP Transistor
Low Offset Voltage: 100 mV max
Low Noise: 1 nV/√Hz @ 1 kHz max
High Gain: 100 min
High Gain Bandwidth: 190 MHz typ
Tight Gain Matching: 3% max
Excellent Logarithmic Conformance: rBE . 0.3 V typ
Available in Die Form
PIN CONNECTION
TO-78
(H Suffix)
GENERAL DESCRIPTIONThe MAT03 dual monolithic PNP transistor offers excellent
parametric matching and high frequency performance. Low
noise characteristics (1 nV/√Hz max @ 1 kHz), high bandwidth
(190 MHz typical), and low offset voltage (100 μV max), makes
the MAT03 an excellent choice for demanding preamplifier ap-
plications. Tight current gain matching (3% max mismatch) and
high current gain (100 min), over a wide range of collector cur-
rent, makes the MAT03 an excellent choice for current mirrors.
A low value of bulk resistance (typically 0.3 Ω) also makes the
MAT03 an ideal component for applications requiring accurate
logarithmic conformance.
Each transistor is individually tested to data sheet specifications.
Device performance is guaranteed at 25°C and over the extended
industrial and military temperature ranges. To insure the long-
term stability of the matching parameters, internal protection
diodes across the base-emitter junction clamp any reverse base-
emitter junction potential. This prevents a base-emitter break-
down condition which can result in degradation of gain and
matching performance due to excessive breakdown current.
NOTES
1Current gain is measured at collector-base voltages (VCB) swept from 0 to VMAX at indicated collector current. Typicals are measured at VCB = 0 V.
2Current gain matching (ΔhFE) is defined as: ΔhFE =
100(ΔIB)hFE(min).
IC1
MAT03–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS(@ TA = +258C, unless otherwise noted.)
ELECTRICAL CHARACTERISTICS
(at –558C ≤ TA ≤ +1258C, unless otherwise noted.)
ELECTRICAL CHARACTERISTICS
(at –408C ≤ TA ≤ +858C, unless otherwise noted.)
NOTE:
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
WAFER TEST LIMITS(at 258C, unless otherwise noted.)
DICE CHARACTERISTICS
SUBSTRATE CAN BE
CONNECTED TO V– OR
FLOATED
1. COLLECTOR (1 )
2. BASE (1 )
3. EMITTER (1 )
4. COLLECTOR (2)
5. BASE (2)
6. EMITTER (2 )
ABSOLUTE MAXIMUM RATINGS1Collector-Base Voltage (BVCBO) . . . . . . . . . . . . . . . . . . . .36 V
Collector-Emitter Voltage (BVCEO) . . . . . . . . . . . . . . . . . .36 V
Collector-Collector Voltage (BVCC) . . . . . . . . . . . . . . . . . .36 V
Emitter-Emitter Voltage (BVEE) . . . . . . . . . . . . . . . . . . . . .36 V
Collector Current (IC) . . . . . . . . . . . . . . . . . . . . . . . . . .20 mA
Emitter Current (IE) . . . . . . . . . . . . . . . . . . . . . . . . . . .20 mA
Total Power Dissipation
Ambient Temperature ≤ 70°C2 . . . . . . . . . . . . . . . .500 mW
Operating Temperature Range
MAT03A . . . . . . . . . . . . . . . . . . . . . . . . . .–55°C to +125°C
MAT03E/F . . . . . . . . . . . . . . . . . . . . . . . . .–40°C to +85°C
Operating Junction Temperature . . . . . . . . . .–55°C to +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . .+300°C
Junction Temperature . . . . . . . . . . . . . . . . . .–65°C to +150°C
NOTESAbsolute maximum ratings apply to both DICE and packaged devices.Rating applies to TO-78 not using a heat sink, and LCC; devices in free air only. For
TO-78, derate linearly at 6.3 mW/°C above 70°C ambient temperature; for LCC,
derate at 7.8 mW/°C.
ORDERING GUIDE1NOTESBurn-in is available on industrial temperature range parts.For devices processed in total compliance to MIL-STD-883, add/883 after part
number. Consult factory for 883 data sheet.
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the MAT03 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
MAT03Figure 2.Current Gain
vs. Temperature
Figure 1.Current Gain vs.
Collector Current
Figure 3.Gain Bandwidth vs.
Collector Current
Figure 4.Base-Emitter Voltage
vs. Collector Current
Figure 5.Small-Signal Input Resistance
(hie) vs. Collector Current
Figure 6.Small Signal Output Con-
ductance (hoe) vs. Collector Current
Figure 9.Noise Voltage DensityFigure 7.Saturation Voltage
vs. Collector Current
Figure 8.Noise Voltage Density
vs. Frequency
Figure 10.Total Noise vs. Collector CurrentFigure 11.Collector-Base Capacitance vs. VCB
MAT03Figure 12.SPICE or SABER Model
APPLICATIONS INFORMATION
MAT03 MODELSThe MAT03 model (Figure 12) includes parasitic diodes D3
through D6. D1 and D2 are internal protection diodes which
prevent zenering of the base-emitter junctions.
The analysis programs, SPICE and SABER, are primarily used
in evaluating the functional performance of systems. The mod-
els are provided only as an aid in utilizing these simulation
programs.
MAT03 NOISE MEASUREMENTAll resistive components (Johnson noise, en2 = 4kTBR, or en =
0.13√R nV/√Hz, where R is in kΩ) and semiconductor junctions
(Shot noise, caused by current flowing through a junction, pro-
duces voltage noise in series impedances such as transistor-
collector load resistors, In = 0.566 √I pA/√Hz where I is in μA)
contribute to the system input noise.
Figure 13 illustrates a technique for measuring the equivalent
input noise voltage of the MAT03. 1 mA of stage current is used
Figure 13.MAT03 Voltage Noise Measurement Circuit
