M93C56-WMN6T ,16Kbit, 8Kbit, 4Kbit, 2Kbit and 1Kbit (8-bit or 16-bit wide) MICROWIRE Serial Access EEPROMM93C86, M93C76, M93C66M93C56, M93C4616Kbit, 8Kbit, 4Kbit, 2Kbit and 1Kbit (8-bit or 16-bit wide)MIC ..
M93C56-WMN6TP ,16Kbit, 8Kbit, 4Kbit, 2Kbit and 1Kbit (8-bit or 16-bit wide) MICROWIRE Serial Access EEPROMFEATURES SUMMARY Industry Standard MICROWIRE Bus Figure 1. Packages Single Supply Voltage:– 4.5 t ..
M93C56-WMN6TP ,16Kbit, 8Kbit, 4Kbit, 2Kbit and 1Kbit (8-bit or 16-bit wide) MICROWIRE Serial Access EEPROMFEATURES SUMMARY . . . . . 1Table 1. Product List . . . . 1Figure 1. Packages . ..
M93C56-WMN6TP ,16Kbit, 8Kbit, 4Kbit, 2Kbit and 1Kbit (8-bit or 16-bit wide) MICROWIRE Serial Access EEPROMLogic Diagram . . 4Table 2. Signal Names . . 4Table 3. Memory Size versus Organizatio ..
M93C66 ,16K/8K/4K/2K/1K/256 (X8/X16) SERIAL MICROWIRE BUS EEPROMM93C86, M93C76, M93C66M93C56, M93C46, M93C0616Kbit, 8Kbit, 4Kbit, 2Kbit, 1Kbit and 256bit (8-bit or ..
M93C66-BN6 , 16Kbit, 8Kbit, 4Kbit, 2Kbit and 1Kbit (8-bit or 16-bit wide) MICROWIRE Serial Access EEPROM
MAX1722EZK+T ,1.5µA IQ, Step-Up DC-DC Converters in TSOT and µDFNElectrical Characteristics(V = 1.2V, V = 3.3V (MAX1722/MAX1723), V = V (MAX1724), SHDN = OUT, R = ∞ ..
MAX1722EZK-T ,1.5uA IQ / Step-Up DC-DC Converters in Thin SOT23-5ELECTRICAL CHARACTERISTICS (continued)(V = 1.2V, V = 3.3V (MAX1722/MAX1723), V = V (MAX1724), SHDN ..
MAX1722EZK-T ,1.5uA IQ / Step-Up DC-DC Converters in Thin SOT23-5MAX1722/MAX1723/MAX172419-1735; Rev 0; 7/011.5µA I , Step-Up DC-DC ConvertersQin Thin SOT23-5
MAX1723EZK+T ,1.5µA IQ, Step-Up DC-DC Converters in TSOT and µDFNFeaturesThe MAX1722/MAX1723/MAX1724 compact, high-efficiency, ● Up to 90% Efficiencystep-up DC-DC c ..
MAX1723EZK-T ,1.5uA IQ / Step-Up DC-DC Converters in Thin SOT23-5applications. The Ordering Informationfamily offers different combinations of fixed or adjustablePI ..
MAX1724EZK27+T ,1.5µA IQ, Step-Up DC-DC Converters in TSOT and µDFNApplications● Pagers ● Single-Cell Battery- Powered Devices● Remote Controls● Low-Power Hand-Held ..
M93C46-BN6-M93C46-MN3-M93C46MN6-M93C46-MN6-M93C46-MN6T-M93C46-TMN6T-M93C46-WBN6P-M93C46WDW6T-M93C46-WDW6T-M93C46-WDW6TP-M93C46-WMN3-M93C46WMN6-M93C46-WMN6-M93C46-WMN6P-M93C46-WMN6T-M93C46-WMN6TP-M93C56MN3-M93C56-MN3-M93C56-MN3T-M93C56-MN6-M93C56-MN6T-M9
16Kbit, 8Kbit, 4Kbit, 2Kbit and 1Kbit (8-bit or 16-bit wide) MICROWIRE Serial Access EEPROM
1/31August 2004
M93C86, M93C76, M93C66
M93C56, M93C4616Kbit, 8Kbit, 4Kbit, 2Kbit and 1Kbit (8-bit or 16-bit wide)
MICROWIRE® Serial Access EEPROM
FEATURES SUMMARY Industry Standard MICROWIRE Bus Single Supply Voltage: 4.5 to 5.5V for M93Cx6 2.5 to 5.5V for M93Cx6-W 1.8 to 5.5V for M93Cx6-R Dual Organization: by Word (x16) or Byte (x8) Programming Instructions that work on: Byte,
Word or Entire Memory Self-timed Programming Cycle with Auto-
Erase Ready/Busy Signal During Programming Speed: 1MHz Clock Rate, 10ms Write Time
(Current product, identified by process
identification letter F or M) 2MHz Clock Rate, 5ms Write Time (New
Product, identified by process
identification letter W or G or S) Sequential Read Operation Enhanced ESD/Latch-Up Behaviour More than 1 Million Erase/Write Cycles More than 40 Year Data Retention
Table 1. Product List
Figure 1. Packages
M93C86, M93C76, M93C66, M93C56, M93C46
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1Table 1. Product List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Figure 1. Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Table 2. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Table 3. Memory Size versus Organization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Table 4. Instruction Set for the M93Cx6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Figure 3. DIP, SO, TSSOP and MLP Connections (Top View). . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
MEMORY ORGANIZATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
POWER-ON DATA PROTECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
INSTRUCTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6Table 5. Instruction Set for the M93C46 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Table 6. Instruction Set for the M93C56 and M93C66 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Table 7. Instruction Set for the M93C76 and M93C86 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Erase/Write Enable and Disable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8Figure 4. READ, WRITE, EWEN, EWDS Sequences. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Erase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9Figure 5. ERASE, ERAL Sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Erase All . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Write All . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10Figure 6. WRAL Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
READY/BUSY STATUS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
COMMON I/O OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
CLOCK PULSE COUNTER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11Figure 7. Write Sequence with One Clock Glitch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12Table 8. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13Table 9. Operating Conditions (M93Cx6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Table 10. Operating Conditions (M93Cx6-W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Table 11. Operating Conditions (M93Cx6-R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Table 12. AC Measurement Conditions (M93Cx6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Table 13. AC Measurement Conditions (M93Cx6-W and M93Cx6-R) . . . . . . . . . . . . . . . . . . . . . .14
Figure 8. AC Testing Input Output Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
3/31
M93C86, M93C76, M93C66, M93C56, M93C46Table 14. Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Table 15. DC Characteristics (M93Cx6, Device Grade 6). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Table 16. DC Characteristics (M93Cx6, Device Grade 7 or 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Table 17. DC Characteristics (M93Cx6-W, Device Grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Table 18. DC Characteristics (M93Cx6-W, Device Grade 7 or 3) . . . . . . . . . . . . . . . . . . . . . . . . . .17
Table 19. DC Characteristics (M93Cx6-R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Table 20. AC Characteristics (M93Cx6, Device Grade 6, 7 or 3) . . . . . . . . . . . . . . . . . . . . . . . . . .18
Table 21. AC Characteristics (M93Cx6-W, Device Grade 6). . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Table 22. AC Characteristics (M93Cx6-W, Device Grade 7 or 3) . . . . . . . . . . . . . . . . . . . . . . . . . .20
Table 23. AC Characteristics (M93Cx6-R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Figure 9. Synchronous Timing (Start and Op-Code Input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Figure 10.Synchronous Timing (Read or Write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Figure 11.Synchronous Timing (Read or Write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23Figure 12.PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Outline . . . . . . . . . . . . . . . . .23
Table 24. PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Mechanical Data. . . . . . . . . .23
Figure 13.SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, Package Outline . . . .24
Table 25. SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, Package Mechanical Data
Figure 14.UFDFPN8 (MLP8) 8-lead Ultra thin Fine pitch Dual Flat Package No lead 2x3mm², Outline
Table 26. UFDFPN8 (MLP8) 8-lead Ultra thin Fine pitch Dual Flat Package No lead 2x3mm², Data.
Figure 15.TSSOP8 3x3mm² – 8 lead Thin Shrink Small Outline, 3x3mm² body size, Package Outline
Table 27. TSSOP8 3x3mm² – 8 lead Thin Shrink Small Outline, 3x3mm² body size, Mechanical Data
Figure 16.TSSOP8 – 8 lead Thin Shrink Small Outline, Package Outline . . . . . . . . . . . . . . . . . . .27
Table 28. TSSOP8 – 8 lead Thin Shrink Small Outline, Package Mechanical Data . . . . . . . . . . . .27
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28Table 29. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Table 30. How to Identify Current and New Products by the Process Identification Letter . . . . . . .29
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30Table 31. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
M93C86, M93C76, M93C66, M93C56, M93C46
SUMMARY DESCRIPTIONThese electrically erasable programmable memo-
ry (EEPROM) devices are accessed through a Se-
rial Data Input (D) and Serial Data Output (Q)
using the MICROWIRE bus protocol.
Figure 2. Logic Diagram
Table 2. Signal NamesThe memory array organization may be divided
into either bytes (x8) or words (x16) which may be
selected by a signal applied on Organization Se-
lect (ORG). The bit, byte and word sizes of the
memories are as shown in Table 3..
Table 3. Memory Size versus OrganizationThe M93Cx6 is accessed by a set of instructions,
as summarized in Table 4., and in more detail in
Table 5. to Table 7.).
Table 4. Instruction Set for the M93Cx6A Read Data from Memory (READ) instruction
loads the address of the first byte or word to be
read in an internal address register. The data at
this address is then clocked out serially. The ad-
dress register is automatically incremented after
the data is output and, if Chip Select Input (S) is
held High, the M93Cx6 can output a sequential
stream of data bytes or words. In this way, the
memory can be read as a data stream from eight
to 16384 bits long (in the case of the M93C86), or
continuously (the address counter automatically
rolls over to 00h when the highest address is
reached).
Programming is internally self-timed (the external
clock signal on Serial Clock (C) may be stopped or
left running after the start of a Write cycle) and
does not require an Erase cycle prior to the Write
instruction. The Write instruction writes 8 or 16 bits
at a time into one of the byte or word locations of
the M93Cx6. After the start of the programming cy-
cle, a Busy/Ready signal is available on Serial
Data Output (Q) when Chip Select Input (S) is driv-
en High.
5/31
M93C86, M93C76, M93C66, M93C56, M93C46An internal Power-on Data Protection mechanism
in the M93Cx6 inhibits the device when the supply
is too low.
Figure 3. DIP, SO, TSSOP and MLP
Connections (Top View)Note:1. See PACKAGE MECHANICAL section for package di-
mensions, and how to identify pin-1. DU = Don’t Use.
The DU (Don’t Use) pin does not contribute to the
normal operation of the device. It is reserved for
use by STMicroelectronics during test sequences.
The pin may be left unconnected or may be con-
nected to VCC or VSS. Direct connection of DU to
VSS is recommended for the lowest stand-by pow-
er consumption.
MEMORY ORGANIZATIONThe M93Cx6 memory is organized either as bytes
(x8) or as words (x16). If Organization Select
(ORG) is left unconnected (or connected to VCC)
the x16 organization is selected; when Organiza-
tion Select (ORG) is connected to Ground (VSS)
the x8 organization is selected. When the M93Cx6
is in stand-by mode, Organization Select (ORG)
should be set either to VSS or VCC for minimum
power consumption. Any voltage between VSS
and VCC applied to Organization Select (ORG)
may increase the stand-by current.
POWER-ON DATA PROTECTIONTo prevent data corruption and inadvertent write
operations during power-up, a Power-On Reset
(POR) circuit resets all internal programming cir-
cuitry, and sets the device in the Write Disable
mode. At Power-up and Power-down, the device
must not be selected (that is, Chip Select Input
(S) must be driven Low) until the supply
voltage reaches the operating value VCC
specified in Table 9. to Table 11.. When VCC reaches its valid level, the device is
properly reset (in the Write Disable mode) and
is ready to decode and execute incoming
instructions.
For the M93Cx6 devices (5V range) the POR
threshold voltage is around 3V. For the M93Cx6-
W (3V range) and M93Cx6-R (2V range) the POR
threshold voltage is around 1.5V.
M93C86, M93C76, M93C66, M93C56, M93C46
INSTRUCTIONSThe instruction set of the M93Cx6 devices con-
tains seven instructions, as summarized in Table
5. to Table 7.. Each instruction consists of the fol-
lowing parts, as shown in Figure 4.: Each instruction is preceded by a rising edge
on Chip Select Input (S) with Serial Clock (C)
being held Low. A start bit, which is the first ‘1’ read on Serial
Data Input (D) during the rising edge of Serial
Clock (C). Two op-code bits, read on Serial Data Input
(D) during the rising edge of Serial Clock (C).
(Some instructions also use the first two bits of
the address to define the op-code). The address bits of the byte or word that is to
be accessed. For the M93C46, the address is
made up of 6 bits for the x16 organization or 7
bits for the x8 organization (see Table 5.). For
the M93C56 and M93C66, the address is
made up of 8 bits for the x16 organization or 9
bits for the x8 organization (see Table 6.). For
the M93C76 and M93C86, the address is
made up of 10 bits for the x16 organization or
11 bits for the x8 organization (see Table 7.).
The M93Cx6 devices are fabricated in CMOS
technology and are therefore able to run as slow
as 0 Hz (static input signals) or as fast as the max-
imum ratings specified in Table 20. to Table 23..
Table 5. Instruction Set for the M93C46Note:1. X = Don’t Care bit.
7/31
M93C86, M93C76, M93C66, M93C56, M93C46
Table 6. Instruction Set for the M93C56 and M93C66Note:1. X = Don’t Care bit. Address bit A8 is not decoded by the M93C56. Address bit A7 is not decoded by the M93C56.
Table 7. Instruction Set for the M93C76 and M93C86Note:1. X = Don’t Care bit. Address bit A10 is not decoded by the M93C76. Address bit A9 is not decoded by the M93C76.
M93C86, M93C76, M93C66, M93C56, M93C46
ReadThe Read Data from Memory (READ) instruction
outputs data on Serial Data Output (Q). When the
instruction is received, the op-code and address
are decoded, and the data from the memory is
transferred to an output shift register. A dummy 0
bit is output first, followed by the 8-bit byte or 16-
bit word, with the most significant bit first. Output
data changes are triggered by the rising edge of
Serial Clock (C). The M93Cx6 automatically incre-
ments the internal address register and clocks out
the next byte (or word) as long as the Chip Select
Input (S) is held High. In this case, the dummy 0 bit
is not output between bytes (or words) and a con-
tinuous stream of data can be read.
Erase/Write Enable and DisableThe Erase/Write Enable (EWEN) instruction en-
ables the future execution of erase or write instruc-
tions, and the Erase/Write Disable (EWDS)
instruction disables it. When power is first applied,
the M93Cx6 initializes itself so that erase and write
instructions are disabled. After an Erase/Write En-
able (EWEN) instruction has been executed, eras-
ing and writing remains enabled until an Erase/
Write Disable (EWDS) instruction is executed, or
until VCC falls below the power-on reset threshold
voltage. To protect the memory contents from ac-
cidental corruption, it is advisable to issue the
Erase/Write Disable (EWDS) instruction after ev-
ery write cycle. The Read Data from Memory
(READ) instruction is not affected by the Erase/
Write Enable (EWEN) or Erase/Write Disable
(EWDS) instructions.
Figure 4. READ, WRITE, EWEN, EWDS SequencesNote: For the meanings of An, Xn, Qn and Dn, see Table 5., Table 6. and Table 7..
9/31
M93C86, M93C76, M93C66, M93C56, M93C46
EraseThe Erase Byte or Word (ERASE) instruction sets
the bits of the addressed memory byte (or word) to
1. Once the address has been correctly decoded,
the falling edge of the Chip Select Input (S) starts
the self-timed Erase cycle. The completion of the
cycle can be detected by monitoring the Ready/
Busy line, as described in the READY/BUSY STA-
TUS section.
WriteFor the Write Data to Memory (WRITE) instruction,
8 or 16 data bits follow the op-code and address
bits. These form the byte or word that is to be writ-
ten. As with the other bits, Serial Data Input (D) is
sampled on the rising edge of Serial Clock (C).
After the last data bit has been sampled, the Chip
Select Input (S) must be taken Low before the next
rising edge of Serial Clock (C). If Chip Select Input
(S) is brought Low before or after this specific time
frame, the self-timed programming cycle will not
be started, and the addressed location will not be
programmed. The completion of the cycle can be
detected by monitoring the Ready/Busy line, as
described later in this document.
Once the Write cycle has been started, it is inter-
nally self-timed (the external clock signal on Serial
Clock (C) may be stopped or left running after the
start of a Write cycle). The cycle is automatically
preceded by an Erase cycle, so it is unnecessary
to execute an explicit erase instruction before a
Write Data to Memory (WRITE) instruction.
Figure 5. ERASE, ERAL SequencesNote: For the meanings of An and Xn, please see Table 5., Table 6. and Table 7..
M93C86, M93C76, M93C66, M93C56, M93C46
Erase AllThe Erase All Memory (ERAL) instruction erases
the whole memory (all memory bits are set to 1).
The format of the instruction requires that a dum-
my address be provided. The Erase cycle is con-
ducted in the same way as the Erase instruction
(ERASE). The completion of the cycle can be de-
tected by monitoring the Ready/Busy line, as de-
scribed in the READY/BUSY STATUS section.
Write AllAs with the Erase All Memory (ERAL) instruction,
the format of the Write All Memory with same Data
(WRAL) instruction requires that a dummy ad-
dress be provided. As with the Write Data to Mem-
ory (WRITE) instruction, the format of the Write All
Memory with same Data (WRAL) instruction re-
quires that an 8-bit data byte, or 16-bit data word,
be provided. This value is written to all the ad-
dresses of the memory device. The completion of
the cycle can be detected by monitoring the
Ready/Busy line, as described next.
Figure 6. WRAL SequenceNote: For the meanings of Xn and Dn, please see Table 5., Table 6. and Table 7..
11/31
M93C86, M93C76, M93C66, M93C56, M93C46
READY/BUSY STATUSWhile the Write or Erase cycle is underway, for a
WRITE, ERASE, WRAL or ERAL instruction, the
Busy signal (Q=0) is returned whenever Chip Se-
lect Input (S) is driven High. (Please note, though,
that there is an initial delay, of tSLSH, before this
status information becomes available). In this
state, the M93Cx6 ignores any data on the bus.
When the Write cycle is completed, and Chip Se-
lect Input (S) is driven High, the Ready signal
(Q=1) indicates that the M93Cx6 is ready to re-
ceive the next instruction. Serial Data Output (Q)
remains set to 1 until the Chip Select Input (S) is
brought Low or until a new start bit is decoded.
COMMON I/O OPERATIONSerial Data Output (Q) and Serial Data Input (D)
can be connected together, through a current lim-
iting resistor, to form a common, single-wire data
bus. Some precautions must be taken when oper-
ating the memory in this way, mostly to prevent a
short circuit current from flowing when the last ad-
dress bit (A0) clashes with the first data bit on Se-
rial Data Output (Q). Please see the application
note AN394 for details.
CLOCK PULSE COUNTERIn a noisy environment, the number of pulses re-
ceived on Serial Clock (C) may be greater than the
number delivered by the master (the microcontrol-
ler). This can lead to a misalignment of the instruc-
tion of one or more bits (as shown in Figure 7.) and
may lead to the writing of erroneous data at an er-
roneous address.
To combat this problem, the M93Cx6 has an on-
chip counter that counts the clock pulses from the
start bit until the falling edge of the Chip Select In-
put (S). If the number of clock pulses received is
not the number expected, the WRITE, ERASE,
ERAL or WRAL instruction is aborted, and the
contents of the memory are not modified.
The number of clock cycles expected for each in-
struction, and for each member of the M93Cx6
family, are summarized in Table 5. to Table 7.. For
example, a Write Data to Memory (WRITE) in-
struction on the M93C56 (or M93C66) expects 20
clock cycles (for the x8 organization) from the start
bit to the falling edge of Chip Select Input (S). That
is:
1 Start bit
+ 2 Op-code bits
+ 9 Address bits
+ 8 Data bits
Figure 7. Write Sequence with One Clock Glitch
M93C86, M93C76, M93C66, M93C56, M93C46
MAXIMUM RATINGStressing the device above the rating listed in the
Absolute Maximum Ratings" table may cause per-
manent damage to the device. These are stress
ratings only and operation of the device at these or
any other conditions above those indicated in the
Operating sections of this specification is not im-
plied. Exposure to Absolute Maximum Rating con-
ditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics
SURE Program and other relevant quality docu-
ments.
Table 8. Absolute Maximum RatingsNote:1. Compliant with JEDEC Std J-STD-020B (for small body, Sn-Pb or Pb assembly), the ST ECOPACK® 7191395 specification, and
the European directive on Restrictions on Hazardous Substances (RoHS) 2002/95/EU JEDEC Std JESD22-A114A (C1=100 pF, R1=1500 Ω, R2=500 Ω)
13/31
M93C86, M93C76, M93C66, M93C56, M93C46
DC AND AC PARAMETERSThis section summarizes the operating and mea-
surement conditions, and the DC and AC charac-
teristics of the device. The parameters in the DC
and AC Characteristic tables that follow are de-
rived from tests performed under the Measure-
ment Conditions summarized in the relevant
tables. Designers should check that the operating
conditions in their circuit match the measurement
conditions when relying on the quoted parame-
ters.
Table 9. Operating Conditions (M93Cx6)
Table 10. Operating Conditions (M93Cx6-W)
Table 11. Operating Conditions (M93Cx6-R)
M93C86, M93C76, M93C66, M93C56, M93C46
Table 12. AC Measurement Conditions (M93Cx6)Note:1. Output Hi-Z is defined as the point where data out is no longer driven.
Table 13. AC Measurement Conditions (M93Cx6-W and M93Cx6-R)Note:1. Output Hi-Z is defined as the point where data out is no longer driven.
Figure 8. AC Testing Input Output Waveforms
Table 14. CapacitanceNote: Sampled only, not 100% tested, at TA=25°C and a frequency of 1MHz.
15/31
M93C86, M93C76, M93C66, M93C56, M93C46
Table 15. DC Characteristics (M93Cx6, Device Grade 6)Note:1. Current product: identified by Process Identification letter F or M. New product: identified by Process Identification letter W or G or S.
Table 16. DC Characteristics (M93Cx6, Device Grade 7 or 3)Note:1. Current product: identified by Process Identification letter F or M. New product: identified by Process Identification letter W or G or S.
M93C86, M93C76, M93C66, M93C56, M93C46
Table 17. DC Characteristics (M93Cx6-W, Device Grade 6)Note:1. Current product: identified by Process Identification letter F or M. New product: identified by Process Identification letter W or G or S.
