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M74HCT373RM13TR ,OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT (NON INVERTING)ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value UnitV Supply Voltage-0.5 to +7 VCCV DC Input V ..
M74HCT373TTR ,OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT (NON INVERTING)LOGIC DIAGRAM 2/11M74HCT373
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M74HCT367M1R
HEX BUS BUFFER (3-STATE NON INVERTING)
1/9September 2001 HIGH SPEED:
tPD = 14ns (TYP.) at VCC = 4.5V LOW POWER DISSIPATION:CC = 4μA(MAX.) at TA =25°C COMPATIBLE WITH TTL OUTPUTS : IH = 2V (MIN.) VIL = 0.8V (MAX) SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 6mA (MIN) BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 367
DESCRIPTIONThe M74HCT367 is an high speed CMOS HEX
BUS BUFFER 3-STATE OUTPUTS fabricated
with silicon gate C2 MOS technology.
This device contains six buffers, four buffers are
controlled by an enable input (G1) and the other
two buffers are controlled by the other enable
input (G2); the outputs of each buffer group are
enabled when G1 and/or G2 inputs are held low,
and when held high, these outputs are disabled in
a high-impedance state.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HCT367HEX BUS BUFFER
WITH 3 STATE OUTPUT NON INVERTING
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HCT3672/9
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE X: Don’t Care
Z: High Impedance
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
RECOMMENDED OPERATING CONDITIONS
M74HCT3673/9
DC SPECIFICATIONS
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
M74HCT3674/9
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/6 (per
Channel)
TEST CIRCUIT CL = 50pF/150pF or equivalent (includes jig and probe capacitance)
R1 = 1KΩ or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
M74HCT3675/9
WAVEFORM 1 : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
WAVEFORM 2 : OUTPUT ENABLE AND DISABLE TIMES (f=1MHz; 50% duty cycle)