M74HC7292B1R ,PROGRAMMABLE DIVIDER/TIMERM74HC7292PROGRAMMABLE DIVIDER/TIMER ■ HIGH SPEED : f = ..
M74HC73 ,DUAL J-K FLIP FLOP WITH PRESET AND CLEARM74HC73DUAL J-K FLIP FLOP WITH PRESET AND CLEAR ■ HIGH SPEED : ..
M74HC73B1R ,DUAL J-K FLIP FLOP WITH PRESET AND CLEARABSOLUTE MAXIMUM RATINGS Symbol Parameter Value UnitV Supply Voltage-0.5 to +7 VCCV DC Input V ..
M74HC73M1R ,DUAL J-K FLIP FLOP WITH PRESET AND CLEARLOGIC DIAGRAM 2/11M74HC73
M74HC73RM13TR ,DUAL J-K FLIP FLOP WITH PRESET AND CLEARM74HC73DUAL J-K FLIP FLOP WITH PRESET AND CLEAR ■ HIGH SPEED : ..
M74HC73RM13TR ,DUAL J-K FLIP FLOP WITH PRESET AND CLEARAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
MAX149ACAP+ ,+2.7V to +5.25V Low-Power 8-Channel Serial 10-Bit ADCsELECTRICAL CHARACTERISTICS(V = +2.7V to +5.25V; COM = 0; f = 2.0MHz; external clock (50% duty cycle ..
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MAX149BCAP ,+2.7V to +5.25V / Low-Power / 8-Channel / Serial 10-Bit ADCsMAX148/MAX14919-0464; Rev 2; 5/98+2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs
MAX149BEAP ,+2.7V to +5.25V / Low-Power / 8-Channel / Serial 10-Bit ADCsMAX148/MAX14919-0464; Rev 2; 5/98+2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs
MAX149BEAP+ ,+2.7V to +5.25V Low-Power 8-Channel Serial 10-Bit ADCsELECTRICAL CHARACTERISTICS(V = +2.7V to +5.25V; COM = 0; f = 2.0MHz; external clock (50% duty cycle ..
MAX149BEAP+T ,+2.7V to +5.25V Low-Power 8-Channel Serial 10-Bit ADCsFeaturesThe MAX148/MAX149 10-bit data-acquisition systems S 8-Channel Single-Ended or 4-Channel Dif ..
M74HC7292B1R
PROGRAMMABLE DIVIDER/TIMER
1/12August 2001 HIGH SPEED :
fMAX = 75 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION:
ICC =4μA(MAX.) at TA=25°C HIGH NOISE IMMUNITY:NIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:OH | = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: PLH ≅ t PHL WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 7292
DESCRIPTIONThe M74HC7292 is an high speed CMOS
PROGRAMMABLE DIVIDER/TIMER fabricated
with silicon gate C2 MOS technology.
This device is a programmable frequency divider
and have two clock inputs, either one may be used
for clock gating. (see the function table).The
M74HC7292 can divide from 22 to 231. This
device feature an active-low clear input to initialize
the state of all flip-flops. To facilitate incoming
inspection, test points (TP1, TP2, TP3) are
provided. All inputs are equipped with protection
circuits against static discharge and transient
excess voltage.
This device have all outputs "Totem Pole"
M74HC7292PROGRAMMABLE DIVIDER/TIMER
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC72922/12
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE
M74HC72923/12
FUNCTIONAL TABLE
M74HC72924/12
LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays
M74HC72925/12
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
RECOMMENDED OPERATING CONDITIONS
M74HC72926/12
DC SPECIFICATIONS