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M74HC620B1R
OCTAL BUS TRANSCEIVER (3 STATE INVERTING)
1/11August 2001 HIGH SPEED:
tPD = 10 ns (TYP.) at VCC = 6V LOW POWER DISSIPATION:CC = 4μA(MAX.) at TA =25°C HIGH NOISE IMMUNITY:NIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 6mA (MIN) BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE:CC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 620
DESCRIPTIONThe 74HC620 is an advanced high-speed CMOS
OCTAL BUS TRANSCEIVER (3-STATE)
fabricated with silicon gate C2 MOS technology.
This IC is intended for two-way asynchronous
communication between data buses. The control
function implementation allows maximum
flexibility in timing.
This device allows data transmission from the A
bus to B bus or from the B to the A bus depending
upon the logic level levels at the enable inputs
(GBA and GAB). The enable inputs can be used to
disable the device so that the buses are effectively
isolated. The dual enable configuration gives this
device the capability to store data by
simultaneous enabling of GBA and GAB.
Each output reinforces its input in this transceiver
configuration. Thus, when both control inputs are
enabled and all other data sources to the two sets
of bus lines are at high impedance, both sets of
bus lines (16 in all) will remain at their last states.
The 8-bit codes appearing on the two sets of
buses will be complementary.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC620OCTAL BUS TRANSCEIVER
WITH 3 STATE OUTPUTS (INVERTING)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC6202/11
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE X : Don’t Care
Z : High Impedance
LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays
M74HC6203/11
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
RECOMMENDED OPERATING CONDITIONS
M74HC6204/11
DC SPECIFICATIONS
M74HC6205/11
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
M74HC6206/11
TEST CIRCUIT CL = 50pF/150pF or equivalent (includes jig and probe capacitance)
R1 = 1KΩ or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM 1: PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)
