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M74HC597M1R-M74HC597RM13TR
8 BIT LATCH/SHIFT REGISTER
1/14July 2001 HIGH SPEED :
fMAX = 50 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION:
ICC =4μA(MAX.) at TA=25°C HIGH NOISE IMMUNITY:NIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:OH | = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: PLH ≅ t PHL WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 597
DESCRIPTIONThe M74HC597 is an high speed CMOS 8 BIT
PIPO SHIFT REGISTER fabricated with silicon
gate C2 MOS technology.
This devices comes in a 16-pin package and
consist of an 8-bit storage latch feeding a parallel
in, serial out 8-bit shift register. Both the storage
register and shift register have positive edge
triggered clocks. The shift register also has direct
load (from storage) and clear inputs.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC5978 BIT LATCH/SHIFT REGISTER
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC5972/14
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE X : Don’t Care
M74HC5973/14
LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays
M74HC5974/14
TIMING CHART
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
M74HC5975/14
RECOMMENDED OPERATING CONDITIONS
DC SPECIFICATIONS
M74HC5976/14
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
M74HC5977/14
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM 1 : MINIMUM PULSE WIDTH, PROPAGATION DELAY TIME(f=1MHz; 50% duty cycle)
