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Partno	Mfg	Dc	Qty	Available	Descript
M74HC595	ST	N/a	20	avai	8 BIT SHIFT REGISTER WITH OUTPUT LATCHES (3 STATE)

M74HC595 ,8 BIT SHIFT REGISTER WITH OUTPUT LATCHES (3 STATE)M74HC5958 BIT SHIFT REGISTERWITH OUTPUT LATCHES (3 STATE)

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M74HC595
8 BIT SHIFT REGISTER WITH OUTPUT LATCHES (3 STATE)
1/16March 2004 HIGH SPEED:
fMAX= 59MHz (TYP.)at VCC =6V LOW POWER DISSIPATION:CC =4μA(MAX.)atTA =25°C HIGH NOISE IMMUNITY:NIH =VNIL= 28%VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:OH|=IOL= 6mA (MIN.) FOR QAto QHOH|=IOL= 4mA (MIN.) FOR QH’ BALANCED PROPAGATION DELAYS: PLH≅t PHL WIDE OPERATING VOLTAGE RANGE:CC (OPR)= 2Vto 6V PIN AND FUNCTION COMPATIBLE WITH SERIES 595
DESCRIPTION
The M74HC595is an high speed CMOS 8-BIT
SHIFT REGISTERS/OUTPUT LATCHES
(3-STATE) fabricated with silicon gateC2 MOS
technology.
This device containsan 8-bit serial-in, parallel-out
shift register that feeds an 8-bit D-type storage
register. The storage register has8 3-STATE
outputs. Separate clocks are provided for both the
shift register and the storage register.
The shift register hasa direct-overriding clear,
serial input, and serial output (standard) pins for
cascading. Both the shift register and storage
register use positive-edge triggered clocks.If both
clocks are connected together, the shift register
state will alwaysbe one clock pulse aheadof the
storage register.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC595 BIT SHIFT REGISTER
WITH OUTPUT LATCHES (3 STATE)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC595
2/16
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE Don’t Care
LOGIC DIAGRAM
This logic diagramhasnotbe usedto estimate propagation delays
M74HC595
3/16
LOGIC DIAGRAM
This logic diagramhasnotbe usedto estimate propagation delays
TIMING CHART
M74HC595
4/16
ABSOLUTE MAXIMUM RATINGS
AbsoluteMaximum Ratingsare those values beyond which damagetothe device mayoccur.Functional operation under these conditionsis
not implied
(*) Power dissipationat 65°C. Deratingfrom 65°Cto125°C: DIP Package -10mW/°C;SO Package -7mW/°C; TSSOP Package -6.1mW/°C.
RECOMMENDED OPERATING CONDITIONS
M74HC595
5/16 SPECIFICATIONS
M74HC595
6/16 ELECTRICAL CHARACTERISTICS(CL=50 pF, Inputtr=tf =6ns)
M74HC595
7/16
CAPACITIVE CHARACTERISTICS CPD isdefinedasthe valueofthe IC’s internal equivalent capacitance whichis calculatedfrom theoperating current consumption without
load. (Referto Test Circuit). Average operating currentcanbe obtainedbythe following equation. ICC(opr) =CPD xVCC xfIN +ICC
TEST CIRCUIT= 50pF/150pFor equivalent (includesjigand probe capacitance) =1KΩor equivalent =ZOUTof pulse generator (typically 50Ω)
M74HC595
8/16
WAVEFORM1: SCK TO QH’ PROPAGATION DELAY TIMES, SCK MINIMUM PULSE WIDTH
(f=1MHz; 50% duty cycle)
WAVEFORM2: RCK TO Qn PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
WAVEFORM3:SI TO SCK SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle)