M74HC541 ,HC540: INVERTEDM74HC541OCTAL BUS BUFFERWITH 3 STATE OUTPUTS (NON INVERTED) ■ HIGH SPEED:t = 9ns (TYP.) at V = 6VP ..
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MAX1487ECSA+ ,±15kV ESD-Protected, Slew-Rate-Limited, Low-Power, RS-485/RS-422 TransceiversApplications:EMI and reduce reflections caused by improperly termi-MAX3460–MAX3464: +5V, Fail-Safe, ..
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M74HC541
HC540: INVERTED
1/10July 2001 HIGH SPEED:
tPD = 9ns (TYP .) at VCC = 6V LOW POWER DISSIPATION:CC = 4μA(MAX.) at TA =25°C HIGH NOISE IMMUNITY:NIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 6mA (MIN) BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE:CC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 541
DESCRIPTIONThe 74HC541 is an advanced high-speed CMOS
OCTAL BUS BUFFER (3-STATE) fabricated with
silicon gate C2 MOS technology. The M74HC541
is a non inverting buffer.
The 3-STATE control gate operates as a two input
AND such that if either G1 and G2 are high, all
eight output are in the high impedance state. In
order to enhance PC board layout the M74HC541
offer a pinout having inputs and outputs on
opposite sides of the package.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC541OCTAL BUS BUFFER
WITH 3 STATE OUTPUTS (NON INVERTED)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC5412/10
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE X : Don’t Care
Z : High Impedance
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
M74HC5413/10
RECOMMENDED OPERATING CONDITIONS
DC SPECIFICATIONS
M74HC5414/10
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per circuit)
M74HC5415/10
TEST CIRCUIT CL = 50pF/150pF or equivalent (includes jig and probe capacitance)
R1 = 1KΩ or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM 1: PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
M74HC5416/10
WAVEFORM 2 : OUTPUT ENABLE AND DISABLE TIMES (f=1MHz; 50% duty cycle)