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M74HC4514M1R ,4 TO 16 LINE DECODER/LATCHAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
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M74HC4511M1R
BCD TO 7 SEGMENT LATCH/DECODER DRIVER
1/13August 2001 HIGH SPEED:
tPD= 23ns (TYP.) at VCC = 6V LOW POWER DISSIPATION:CC = 4μA(MAX.) at TA =25°C HIGH NOISE IMMUNITY:NIH = VNIL = 28 % VCC (MIN.) HIGH SOURGE CURRENT :
|IOH| = 20 mA (MIN) BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE:CC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 4511
DESCRIPTIONThe M74HC4511 is an high speed CMOS
BCD-TO-7 SEGMENT LATCH/DECODER/
DRIVER fabricated with silicon gate C2 MOS
technology.
The segment output driver has large IOH capability
which enables common cathode leds to be directly
driven.
When lamp test (LT) is taken "L", all segment
outputs will go to "H", and when blanking (BI) is
taken "L" and LT is taken "H" all segment outputs
will go to "L".
These functions operate regardless of other inputs
and are used to test the display.
Input BI is used to pulse-modulate the brightness
of the display.
When an error input code (over 10) is applied to
the BCD input, all segment outputs will go "L" (turn
off).
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC4511 BCD TO 7 SEGMENT LATCH/DECODER DRIVER
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC45112/13
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE X : Don’t Care
M74HC45113/13
LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays
DISPLAY MODE
M74HC45114/13
BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
RECOMMENDED OPERATING CONDITIONS
M74HC45115/13
DC SPECIFICATIONS
M74HC45116/13
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
M74HC45117/13
TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM 1 : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
