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M74HC393B1R-M74HC393M1R-M74HC393RM13TR
DUAL BINARY COUNTER
1/11July 2001 HIGH SPEED :
fMAX = 79 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION:CC =4μA(MAX.) at TA =25°C HIGH NOISE IMMUNITY:NIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE:CC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 393
DESCRIPTIONThe M74HC393 is an high speed CMOS DUAL
BINARY COUNTER fabricated with silicon gate2 MOS technology.
This counter circuit contains independent ripple
carry counters and two 4-bit ripple carry binary
counters, which can be cascaded to create a
single divide by 256 counter.
Each 4-bit counter is incremented on the high to
low transition (negative edge) of the clock input,
and each has an independent clear input. When
CLEAR is set to low, all four bits of each counter
are set to a low level. This enables count
truncation and allows the implementation of divide
by N counter configurations.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC393DUAL BINARY COUNTER
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC3932/11
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE X : Don’t Care
M74HC3933/11
LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays
TIMING CHART
M74HC3934/11
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
RECOMMENDED OPERATING CONDITIONS
M74HC3935/11
DC SPECIFICATIONS
M74HC3936/11
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per FLIP
FLOP)
